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Add more links to Hostboot sources
Signed-off-by: Sergii Dmytruk <[email protected]>
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devnotes/tpm.md

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@@ -47,7 +47,10 @@ The problem is that LPC accesses on Talos II don't have this property and fix
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START nibble at `0`, thus precluding a direct LPC TPM connection. See [lpcdd.C]
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in Hostboot, LPC cycles are abstracted away via more high-level memory-mapped
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I/O, where clients don't write START field themselves and have no control over
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its value.
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its value. Hostboot hard-codes base addresses for different kinds of
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interactions (see examples in [lpc.c], [lpc_const.H] and [sbeConsole.H]), which
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demonstrates lack of any pattern in a way that they are assigned, lack of a way
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to customize START field and absence of an address space dedicated to TPM.
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## Quick overview
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@@ -280,6 +283,9 @@ Implement TPM on a chip that's used primarily for booting POWER9 processor.
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[TPM specification]: https://trustedcomputinggroup.org/wp-content/uploads/PC-Client-Specific-Platform-TPM-Profile-for-TPM-2p0-v1p05p_r14_pub.pdf
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[TPM publication]: https://www.sciencedirect.com/science/article/pii/S0898122112004634
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[lpcdd.C]: https://github.com/open-power/hostboot/blob/master/src/usr/lpc/lpcdd.C
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[lpc.c]: https://github.com/open-power/skiboot/blob/master/hw/lpc.c#L160
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[lpc_const.H]: https://github.com/open-power/hostboot/blob/master/src/include/usr/lpc/lpc_const.H#L38
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[sbeConsole.H]: https://github.com/open-power/sbe/blob/master/src/sbefw/core/sbeConsole.H#L93
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[Kestrel]: https://gitlab.raptorengineering.com/kestrel-collaboration
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[Direct I2C]: #i2c-tpm-module

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