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Merge pull request #15472 from jtmyz9/jmcloud/STM32-use-more-than-one-fifo
Don't overlap STM32 FDCAN RAM sections
2 parents 6403ec7 + 9859c60 commit 61ab4f7

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targets/TARGET_STM/can_api.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -183,8 +183,11 @@ static void _can_init_freq_direct(can_t *obj, const can_pinmap_t *pinmap, int hz
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obj->CanHandle.Init.DataTimeSeg1 = 0x1; // Not used - only in FDCAN
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obj->CanHandle.Init.DataTimeSeg2 = 0x1; // Not used - only in FDCAN
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#ifdef TARGET_STM32H7
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/* Message RAM offset is only supported in STM32H7 platforms of supported FDCAN platforms */
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obj->CanHandle.Init.MessageRAMOffset = 0;
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/* Message RAM offset is only supported in STM32H7 platforms of supported FDCAN platforms
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* Total RAM size is 2560 words, each FDCAN object allocates approx 300 words, so offset each by
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* 512 to make sure RAM sections don't overlap if using multiple FDCAN instances on one chip
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*/
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obj->CanHandle.Init.MessageRAMOffset = obj->index * 512;
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/* The number of Standard and Extended ID filters are initialized to the maximum possile extent
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* for STM32H7 platforms
@@ -1222,7 +1225,6 @@ static void can_irq(CANName name, int id)
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// rx interrupts will be unamsked in read operation. reads must be deffered to thread context.
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// refer to the CAN receive interrupt problem due to mutex and resolution section of README doc.
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__HAL_CAN_DISABLE_IT(&CanHandle, CAN_IT_FMP0);
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irq_handler(can_irq_contexts[id], IRQ_RX);
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}
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