@@ -32,39 +32,39 @@ void QspiCommand::configure(qspi_bus_width_t inst_width, qspi_bus_width_t addr_w
32
32
qspi_address_size_t addr_size, qspi_alt_size_t alt_size,
33
33
int dummy_cycles)
34
34
{
35
- memset (&cmd , 0 , sizeof (qspi_command_t ) );
36
- cmd .instruction .disabled = cmd .address .disabled = cmd .alt .disabled = true ;
35
+ memset (&_cmd , 0 , sizeof (qspi_command_t ) );
36
+ _cmd .instruction .disabled = _cmd .address .disabled = _cmd .alt .disabled = true ;
37
37
38
- cmd .instruction .bus_width = inst_width;
39
- cmd .address .bus_width = addr_width;
40
- cmd .address .size = addr_size;
41
- cmd .alt .bus_width = alt_width;
42
- cmd .alt .size = alt_size;
43
- cmd .data .bus_width = data_width;
44
- cmd .dummy_count = dummy_cycles;
38
+ _cmd .instruction .bus_width = inst_width;
39
+ _cmd .address .bus_width = addr_width;
40
+ _cmd .address .size = addr_size;
41
+ _cmd .alt .bus_width = alt_width;
42
+ _cmd .alt .size = alt_size;
43
+ _cmd .data .bus_width = data_width;
44
+ _cmd .dummy_count = dummy_cycles;
45
45
}
46
46
47
47
void QspiCommand::build (int instruction, int address, int alt)
48
48
{
49
- cmd .instruction .disabled = (instruction == QSPI_NONE);
50
- if (!cmd .instruction .disabled ) {
51
- cmd .instruction .value = instruction;
49
+ _cmd .instruction .disabled = (instruction == QSPI_NONE);
50
+ if (!_cmd .instruction .disabled ) {
51
+ _cmd .instruction .value = instruction;
52
52
}
53
53
54
- cmd .address .disabled = (address == QSPI_NONE);
55
- if (!cmd .address .disabled ) {
56
- cmd .address .value = address;
54
+ _cmd .address .disabled = (address == QSPI_NONE);
55
+ if (!_cmd .address .disabled ) {
56
+ _cmd .address .value = address;
57
57
}
58
58
59
- cmd .alt .disabled = (alt == QSPI_NONE);
60
- if (!cmd .alt .disabled ) {
61
- cmd .alt .value = alt;
59
+ _cmd .alt .disabled = (alt == QSPI_NONE);
60
+ if (!_cmd .alt .disabled ) {
61
+ _cmd .alt .value = alt;
62
62
}
63
63
}
64
64
65
65
qspi_command_t * QspiCommand::get ()
66
66
{
67
- return &cmd ;
67
+ return &_cmd ;
68
68
}
69
69
70
70
@@ -165,7 +165,7 @@ qspi_status_t write_disable(Qspi &qspi)
165
165
return ((reg[0 ] & STATUS_BIT_WEL) == 0 ? QSPI_STATUS_OK : QSPI_STATUS_ERROR);
166
166
}
167
167
168
- void log_register (uint32_t cmd, uint32_t reg_size, Qspi &qspi)
168
+ void log_register (uint32_t cmd, uint32_t reg_size, Qspi &qspi, const char *str )
169
169
{
170
170
qspi_status_t ret;
171
171
static uint8_t reg[QSPI_MAX_REG_SIZE];
@@ -174,9 +174,9 @@ void log_register(uint32_t cmd, uint32_t reg_size, Qspi &qspi)
174
174
TEST_ASSERT_EQUAL (QSPI_STATUS_OK, ret);
175
175
176
176
for (uint32_t j = 0 ; j < reg_size; j++) {
177
- utest_printf (" register byte %u data: " , j);
177
+ utest_printf (" %s byte %u (MSB first): " , str != NULL ? str : " " , j);
178
178
for (int i = 0 ; i < 8 ; i++) {
179
- utest_printf (" %s " , ((reg[j] & (1 << i )) & 0xFF ) == 0 ? " 0" : " 1" );
179
+ utest_printf (" %s " , ((reg[j] & (1 << ( 7 - i) )) & 0xFF ) == 0 ? " 0" : " 1" );
180
180
}
181
181
utest_printf (" \r\n " );
182
182
}
0 commit comments