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Merge pull request #15164 from jeromecoutant/PR_L151CB
STM32L1: add support of MCU_STM32L151xB
2 parents ac0fa10 + 9675b6c commit e5dcd7e

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15 files changed

+1532
-9
lines changed

15 files changed

+1532
-9
lines changed

‎targets/TARGET_STM/TARGET_STM32L1/CMakeLists.txt

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@@ -4,6 +4,7 @@
44
add_subdirectory(TARGET_STM32L100xB EXCLUDE_FROM_ALL)
55
add_subdirectory(TARGET_STM32L100xC EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32L151xB EXCLUDE_FROM_ALL)
7+
add_subdirectory(TARGET_STM32L151xBA EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32L151xC EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32L151xD EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32L151xE EXCLUDE_FROM_ALL)

‎targets/TARGET_STM/TARGET_STM32L1/PeripheralNames.h

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Original file line numberDiff line numberDiff line change
@@ -46,7 +46,9 @@ typedef enum {
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typedef enum {
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SPI_1 = (int)SPI1_BASE,
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SPI_2 = (int)SPI2_BASE,
49+
#if defined SPI3_BASE
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SPI_3 = (int)SPI3_BASE
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#endif
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} SPIName;
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typedef enum {
@@ -58,7 +60,9 @@ typedef enum {
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PWM_2 = (int)TIM2_BASE,
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PWM_3 = (int)TIM3_BASE,
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PWM_4 = (int)TIM4_BASE,
63+
#if defined TIM5_BASE
6164
PWM_5 = (int)TIM5_BASE,
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#endif
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PWM_9 = (int)TIM9_BASE,
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PWM_10 = (int)TIM10_BASE,
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PWM_11 = (int)TIM11_BASE

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L151xB/cmsis_nvic.h

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@@ -30,10 +30,7 @@
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#endif
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#if !defined(MBED_RAM_SIZE)
33-
#define MBED_RAM_SIZE 0x8000 // 32 KB
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// 0x4000 // 16 KB STM32L151CB STM32L151RB STM32L151VB
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// 0x8000 // 32 KB STM32L151CBxxA STM32L151RBxxA STM32L151VBxxA
36-
#warning "check MBED_RAM_SIZE value in cmsis_nvic.h"
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#define MBED_RAM_SIZE 0x4000 // 16 KB
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#endif
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#define NVIC_NUM_VECTORS 61

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L151xBA/CMakeLists.txt

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@@ -0,0 +1,26 @@
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# Copyright (c) 2020 ARM Limited. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
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set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32l151xba.S)
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set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32l151xba.ld)
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elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
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set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32l151xba.S)
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set(LINKER_FILE TOOLCHAIN_ARM/stm32l151xba.sct)
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endif()
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add_library(mbed-stm32l151xba INTERFACE)
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target_include_directories(mbed-stm32l151xba
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INTERFACE
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.
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)
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target_sources(mbed-stm32l151xba
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INTERFACE
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${STARTUP_FILE}
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)
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mbed_set_linker_script(mbed-stm32l151xba ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
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target_link_libraries(mbed-stm32l151xba INTERFACE mbed-stm32l1)

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L151xBA/TOOLCHAIN_ARM/startup_stm32l151xba.S

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;********************* (C) COPYRIGHT 2017 STMicroelectronics ********************
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;* File Name : startup_stm32l151xba.s
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;* Author : MCD Application Team
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;* Description : STM32L151XBA Devices vector for MDK-ARM toolchain.
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;* This module performs:
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;* - Set the initial SP
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;* - Set the initial PC == Reset_Handler
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;* - Set the vector table entries with the exceptions ISR
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;* address.
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;* - Configure the system clock
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;* - Branches to __main in the C library (which eventually
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;* calls main()).
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;* After Reset the Cortex-M3 processor is in Thread mode,
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;* priority is Privileged, and the Stack is set to Main.
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;********************************************************************************
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;*
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;* Copyright (c) 2017 STMicroelectronics. All rights reserved.
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;*
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;* This software component is licensed by ST under BSD 3-Clause license,
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;* the "License"; You may not use this file except in compliance with the
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;* License. You may obtain a copy of the License at:
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;* opensource.org/licenses/BSD-3-Clause
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;*
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;*******************************************************************************
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;* <<< Use Configuration Wizard in Context Menu >>>
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;
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
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__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD WWDG_IRQHandler ; Window Watchdog
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DCD PVD_IRQHandler ; PVD through EXTI Line detect
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DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp
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DCD RTC_WKUP_IRQHandler ; RTC Wakeup
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DCD FLASH_IRQHandler ; FLASH
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DCD RCC_IRQHandler ; RCC
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DCD EXTI0_IRQHandler ; EXTI Line 0
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DCD EXTI1_IRQHandler ; EXTI Line 1
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DCD EXTI2_IRQHandler ; EXTI Line 2
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DCD EXTI3_IRQHandler ; EXTI Line 3
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DCD EXTI4_IRQHandler ; EXTI Line 4
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DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
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DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
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DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
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DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
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DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
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DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
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DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
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DCD ADC1_IRQHandler ; ADC1
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DCD USB_HP_IRQHandler ; USB High Priority
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DCD USB_LP_IRQHandler ; USB Low Priority
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DCD DAC_IRQHandler ; DAC
78+
DCD COMP_IRQHandler ; COMP through EXTI Line
79+
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
80+
DCD 0 ; Reserved
81+
DCD TIM9_IRQHandler ; TIM9
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DCD TIM10_IRQHandler ; TIM10
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DCD TIM11_IRQHandler ; TIM11
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DCD TIM2_IRQHandler ; TIM2
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DCD TIM3_IRQHandler ; TIM3
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DCD TIM4_IRQHandler ; TIM4
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DCD I2C1_EV_IRQHandler ; I2C1 Event
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DCD I2C1_ER_IRQHandler ; I2C1 Error
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DCD I2C2_EV_IRQHandler ; I2C2 Event
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DCD I2C2_ER_IRQHandler ; I2C2 Error
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DCD SPI1_IRQHandler ; SPI1
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DCD SPI2_IRQHandler ; SPI2
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DCD USART1_IRQHandler ; USART1
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DCD USART2_IRQHandler ; USART2
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DCD USART3_IRQHandler ; USART3
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DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
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DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
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DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend
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DCD TIM6_IRQHandler ; TIM6
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DCD TIM7_IRQHandler ; TIM7
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__Vectors_End
103+
104+
__Vectors_Size EQU __Vectors_End - __Vectors
105+
106+
AREA |.text|, CODE, READONLY
107+
108+
; Reset handler routine
109+
Reset_Handler PROC
110+
EXPORT Reset_Handler [WEAK]
111+
IMPORT __main
112+
IMPORT SystemInit
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
117+
ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
129+
ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
134+
ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
139+
ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
153+
ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
161+
ENDP
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Default_Handler PROC
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EXPORT WWDG_IRQHandler [WEAK]
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EXPORT PVD_IRQHandler [WEAK]
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EXPORT TAMPER_STAMP_IRQHandler [WEAK]
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EXPORT RTC_WKUP_IRQHandler [WEAK]
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EXPORT FLASH_IRQHandler [WEAK]
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EXPORT RCC_IRQHandler [WEAK]
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EXPORT EXTI0_IRQHandler [WEAK]
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EXPORT EXTI1_IRQHandler [WEAK]
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EXPORT EXTI2_IRQHandler [WEAK]
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EXPORT EXTI3_IRQHandler [WEAK]
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EXPORT EXTI4_IRQHandler [WEAK]
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EXPORT DMA1_Channel1_IRQHandler [WEAK]
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EXPORT DMA1_Channel2_IRQHandler [WEAK]
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EXPORT DMA1_Channel3_IRQHandler [WEAK]
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EXPORT DMA1_Channel4_IRQHandler [WEAK]
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EXPORT DMA1_Channel5_IRQHandler [WEAK]
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EXPORT DMA1_Channel6_IRQHandler [WEAK]
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EXPORT DMA1_Channel7_IRQHandler [WEAK]
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EXPORT ADC1_IRQHandler [WEAK]
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EXPORT USB_HP_IRQHandler [WEAK]
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EXPORT USB_LP_IRQHandler [WEAK]
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EXPORT DAC_IRQHandler [WEAK]
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EXPORT COMP_IRQHandler [WEAK]
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EXPORT EXTI9_5_IRQHandler [WEAK]
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EXPORT TIM9_IRQHandler [WEAK]
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EXPORT TIM10_IRQHandler [WEAK]
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EXPORT TIM11_IRQHandler [WEAK]
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EXPORT TIM2_IRQHandler [WEAK]
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EXPORT TIM3_IRQHandler [WEAK]
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EXPORT TIM4_IRQHandler [WEAK]
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EXPORT I2C1_EV_IRQHandler [WEAK]
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EXPORT I2C1_ER_IRQHandler [WEAK]
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EXPORT I2C2_EV_IRQHandler [WEAK]
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EXPORT I2C2_ER_IRQHandler [WEAK]
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EXPORT SPI1_IRQHandler [WEAK]
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EXPORT SPI2_IRQHandler [WEAK]
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EXPORT USART1_IRQHandler [WEAK]
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EXPORT USART2_IRQHandler [WEAK]
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EXPORT USART3_IRQHandler [WEAK]
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EXPORT EXTI15_10_IRQHandler [WEAK]
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EXPORT RTC_Alarm_IRQHandler [WEAK]
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EXPORT USB_FS_WKUP_IRQHandler [WEAK]
207+
EXPORT TIM6_IRQHandler [WEAK]
208+
EXPORT TIM7_IRQHandler [WEAK]
209+
210+
WWDG_IRQHandler
211+
PVD_IRQHandler
212+
TAMPER_STAMP_IRQHandler
213+
RTC_WKUP_IRQHandler
214+
FLASH_IRQHandler
215+
RCC_IRQHandler
216+
EXTI0_IRQHandler
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EXTI1_IRQHandler
218+
EXTI2_IRQHandler
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EXTI3_IRQHandler
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EXTI4_IRQHandler
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DMA1_Channel1_IRQHandler
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DMA1_Channel2_IRQHandler
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DMA1_Channel3_IRQHandler
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DMA1_Channel4_IRQHandler
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DMA1_Channel5_IRQHandler
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DMA1_Channel6_IRQHandler
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DMA1_Channel7_IRQHandler
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ADC1_IRQHandler
229+
USB_HP_IRQHandler
230+
USB_LP_IRQHandler
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DAC_IRQHandler
232+
COMP_IRQHandler
233+
EXTI9_5_IRQHandler
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TIM9_IRQHandler
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TIM10_IRQHandler
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TIM11_IRQHandler
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TIM2_IRQHandler
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TIM3_IRQHandler
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TIM4_IRQHandler
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I2C1_EV_IRQHandler
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I2C1_ER_IRQHandler
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I2C2_EV_IRQHandler
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I2C2_ER_IRQHandler
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SPI1_IRQHandler
245+
SPI2_IRQHandler
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USART1_IRQHandler
247+
USART2_IRQHandler
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USART3_IRQHandler
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EXTI15_10_IRQHandler
250+
RTC_Alarm_IRQHandler
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USB_FS_WKUP_IRQHandler
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TIM6_IRQHandler
253+
TIM7_IRQHandler
254+
255+
B .
256+
257+
ENDP
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ALIGN
260+
261+
;*******************************************************************************
262+
; User Stack and Heap initialization
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;*******************************************************************************
264+
265+
END
266+
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;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L151xBA/TOOLCHAIN_ARM/stm32l151xba.sct

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1+
#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m3
2+
; Scatter-Loading Description File
3+
;
4+
; SPDX-License-Identifier: BSD-3-Clause
5+
;******************************************************************************
6+
;* @attention
7+
;*
8+
;* Copyright (c) 2016-2020 STMicroelectronics.
9+
;* All rights reserved.
10+
;*
11+
;* This software component is licensed by ST under BSD 3-Clause license,
12+
;* the "License"; You may not use this file except in compliance with the
13+
;* License. You may obtain a copy of the License at:
14+
;* opensource.org/licenses/BSD-3-Clause
15+
;*
16+
;******************************************************************************
17+
18+
#include "../cmsis_nvic.h"
19+
20+
#if !defined(MBED_APP_START)
21+
#define MBED_APP_START MBED_ROM_START
22+
#endif
23+
24+
#if !defined(MBED_APP_SIZE)
25+
#define MBED_APP_SIZE MBED_ROM_SIZE
26+
#endif
27+
28+
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
29+
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
30+
#if defined(MBED_BOOT_STACK_SIZE)
31+
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
32+
#else
33+
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
34+
#endif
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#endif
36+
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/* Round up VECTORS_SIZE to 8 bytes */
38+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
39+
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
41+
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
43+
*.o (RESET, +First)
44+
*(InRoot$$Sections)
45+
.ANY (+RO)
46+
}
47+
48+
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
49+
.ANY (+RW +ZI)
50+
}
51+
52+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
53+
}
54+
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ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
56+
}
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}

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