dts: renesas: move ioport device of r7fa6m4af3cfb to r7fa6m4ax

Move ioport6, ioport7, ioport8 to r7fa6m4ax due to it is common
part of RA6M4
Impacted file:
- dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi
- dts/arm/renesas/ra/ra6/r7fa6m4af3cfb.dtsi

Signed-off-by: The Nguyen <[email protected]>

Author: thenguyenyf

dts/arm/renesas/ra/ra6/r7fa6m4af3cfb.dtsi

@@ -18,35 +18,5 @@
 				reg = <0x0 DT_SIZE_M(1)>;
 			};
 		};
-
-		ioport6: gpio@400800c0 {
-			compatible = "renesas,ra-gpio-ioport";
-			reg = <0x400800c0 0x20>;
-			port = <6>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <16>;
-			status = "disabled";
-		};
-
-		ioport7: gpio@400800e0 {
-			compatible = "renesas,ra-gpio-ioport";
-			reg = <0x400800e0 0x20>;
-			port = <7>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <16>;
-			status = "disabled";
-		};
-
-		ioport8: gpio@40080100 {
-			compatible = "renesas,ra-gpio-ioport";
-			reg = <0x40080100 0x20>;
-			port = <8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <16>;
-			status = "disabled";
-		};
 	};
 };

dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi

@@ -135,6 +135,36 @@
 			channel-count = <10>;
 			channel-available-mask = <0x7f0007>;
 		};
+
+		ioport6: gpio@400800c0 {
+			compatible = "renesas,ra-gpio-ioport";
+			reg = <0x400800c0 0x20>;
+			port = <6>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			ngpios = <16>;
+			status = "disabled";
+		};
+
+		ioport7: gpio@400800e0 {
+			compatible = "renesas,ra-gpio-ioport";
+			reg = <0x400800e0 0x20>;
+			port = <7>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			ngpios = <16>;
+			status = "disabled";
+		};
+
+		ioport8: gpio@40080100 {
+			compatible = "renesas,ra-gpio-ioport";
+			reg = <0x40080100 0x20>;
+			port = <8>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			ngpios = <16>;
+			status = "disabled";
+		};
 	};
 
 	clocks: clocks {