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+# BARC 2021
+
+12th Annual Boston Area Architecture Workshop
+
+January 29, 2021
+
+Bringing together computer architecture community in the Greater Boston area and beyond.
+
+
+Each year BARC is composed of numerous informal 15-30 minute presentations, long dis-cussion breaks sessions, and talks by notable community members doing interesting things incomputer architecture. As always, elegant as well as preliminary solutions to architecturalproblems are welcome. This year we have excellent talks lined up, and we hope you’ll enjoythem and learn something new in the process. Please reach out to the presenters with questions,collaboration ideas, insights, or comments. The goal of BARC is to provide a forum for computer architects in the Greater Bostonarea and beyond to get together and present/discuss the ’latest and greatest’ in the area ofcomputer architecture. Each year, community members discuss current ideas and concepts in Microarchitecture, Multicore/manycore processors, GPUs, Memory systems, I/O, Networkingand communication, Low power systems, Adaptive and hybrid systems, Architectures basedon emerging technologies, Accelerator-based architectures, Embedded processing, Performanceevaluation techniques, and more!
+
+This repo contains the workshop's website code.
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Tutorial starts at 4PM at https://mit.zoom.us/j/96193004619
J-Core AMA starts at 5PM at https://mit.zoom.us/j/97731992575
-->
All times EST.
+ The program, including the schedule, can be downloaded here.
diff --git a/program.tex b/program.tex
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+\documentclass{article}
+\usepackage[utf8]{inputenc}
+\usepackage{graphics}
+\usepackage{hyperref}
+\hypersetup{
+ colorlinks=true,
+ linkcolor=blue,
+ filecolor=magenta,
+ urlcolor=cyan,
+}
+\usepackage{fancyhdr}
+
+\title{\Huge\textbf{BARC 2021}}
+
+\author{12th Annual Boston Area Architecture Workshop}
+\date{January 29, 2021}
+
+\usepackage[normalem]{ulem}
+\useunder{\uline}{\ul}{}
+
+\usepackage{geometry}
+ \geometry{
+ letter,
+ total={170mm,257mm},
+ left=20mm,
+ top=20mm,
+ }
+
+\usepackage{fancyhdr}
+\usepackage{lastpage}
+
+\pagestyle{fancy}
+\fancyhf{}
+\rfoot{Page \thepage \hspace{1pt} of \pageref{LastPage}}
+
+
+\begin{document}
+
+\maketitle
+
+\large
+
+\textit{Bringing together computer architecture community in the Greater Boston area and beyond.}
+\newline
+
+Each year BARC is composed of numerous informal 15-30 minute presentations, long discussion breaks sessions, and talks by notable community members doing interesting things in computer architecture. As always, elegant as well as preliminary solutions to architectural problems are welcome. This year we have excellent talks lined up, and we hope you'll enjoy them and learn something new in the process. Please reach out to the presenters with questions, collaboration ideas, insights, or comments.
+\newline
+
+
+
+The goal of BARC is to provide a forum for computer architects in the Greater Boston area and beyond to get together and present/discuss the 'latest and greatest' in the area of computer architecture. Each year, community members discuss current ideas and concepts in Microarchitecture, Multicore/manycore processors, GPUs, Memory systems, I/O, Networking and communication, Low power systems, Adaptive and hybrid systems, Architectures based on emerging technologies, Accelerator-based architectures, Embedded processing, Performance evaluation techniques, and more!
+
+
+
+\section*{Directions}
+BARC 2021 will be held virtually. Login info and any schedule changes will be announced on the workshop's website, \url{https://bostonarch.github.io/2021/}.
+
+
+
+
+
+\section*{Schedule}
+BARC 2021 is a single-day workshop occurring on January 29, 2021. The workshop will begin at 8:45 am Eastern Standard Time (EST), with the first talk at 9:00am EST and the last talk expected to end at 6:00pm EST.
+\newline
+\newline
+
+
+Morning session starts at 9AM EST at \url{https://mit.zoom.us/j/98053942371}
+
+
+Afternoon session starts at 1PM EST at \url{https://mit.zoom.us/j/93979355599}
+
+
+Tutorial starts at 4PM EST at \url{https://mit.zoom.us/j/96193004619}
+
+
+J-Core AMA starts at 5PM EST at \url{https://mit.zoom.us/j/97731992575}
+\newline
+\newline
+The complete schedule is listed on the following page.
+
+\begin{table}[]
+
+\centering
+\resizebox{0.75\columnwidth}{!}{%
+
+
+\begin{tabular}{lll}
+\hline
+\multicolumn{3}{c}{\textbf{BARC 2021, Presentation Schedule}} \\ \hline
+\multicolumn{3}{c}{\textit{URLs will be posted Friday morning. All times EST}} \\
+ & & \\
+8:45-9:00 & & Welcome \\ \hline
+9:00–9:30 & Olof Kindgren & SERV : The World’s Smallest RISC-V (AMA) \\ \hline
+9:30–10:00 & Anne Elster & \begin{tabular}[c]{@{}l@{}}The European Factor: Europe´s Impact on \\ Computing \& Processors\end{tabular} \\ \hline
+10:00–10:30 & \begin{tabular}[c]{@{}l@{}}Xi Wang, \\ Brody Williams,\\ Nathan Stoddard\end{tabular} & \begin{tabular}[c]{@{}l@{}}xBGAS: Extended Base Global Address Space \\ for High Performance Computing\end{tabular} \\ \hline
+10:30-11:00 & \begin{tabular}[c]{@{}l@{}}Theodore Omtzigt,\\ Peter Marosan\end{tabular} & Introducing the Cambridge Architecture \\ \hline
+11:00-11:30 & \begin{tabular}[c]{@{}l@{}}Pantea Kiaei,\\ Yuan Yao,\\ Patrick Schaumont\end{tabular} & \begin{tabular}[c]{@{}l@{}}Real-time Detection and Adaptive Mitigation \\ of Power-based Side-Channel Leakage in SoC\end{tabular} \\ \hline
+11:30-12:00 & Xinfei Guo & Cross-layer Codesign for Resilient Hardware \\ \hline
+12:00-12:30 & Ron Minnich & \begin{tabular}[c]{@{}l@{}}Building small stateless network-controlled \\ appliances with linuxboot \\ and Plan 9's cpu command\end{tabular} \\ \hline
+12:30-1:00 & Lunch/ Discussion & \\ \hline
+1:00-1:30 & \begin{tabular}[c]{@{}l@{}}Udit Gupta, \\ Young Geun Kim, \\ Sylvia Lee, \\ Jordan Tse, \\ Hsien-Hsin S. Lee,\\ Gu-Yeon Wei,\\ David Brooks,\\ Carole-Jean Wu\end{tabular} & \begin{tabular}[c]{@{}l@{}}Illuminating the Elusive Carbon \\ Footprint of Computing\end{tabular} \\ \hline
+1:30-2:00 & \begin{tabular}[c]{@{}l@{}}Connor Kenyon,\\ Glenn Volkema,\\ Gaurav Khanna\end{tabular} & \begin{tabular}[c]{@{}l@{}}Overcoming Limitations of GPGPU-Computing \\ in Scientific Applications\end{tabular} \\ \hline
+2:00–2:30 & \begin{tabular}[c]{@{}l@{}}Casey Nelson,\\ R. Iris Bahar,\\ Tamara Lehman\end{tabular} & \begin{tabular}[c]{@{}l@{}}Investigating the Potential for Near Data \\ Processing to Reduce Secure \\ Memory Overheads\end{tabular} \\ \hline
+2:30–3:00 & \begin{tabular}[c]{@{}l@{}}Trinayan Baruah,\\ Yifan Sun, \\ Ali Tolga Dincer, \\ Saiful A Mojumder, \\ José L Abellán, \\ Yash Ukidave, \\ Ajay Joshi, \\ Norman Rubin, \\ John Kim,\\ David Kaeli\end{tabular} & \begin{tabular}[c]{@{}l@{}}Griffin: Hardware-Software Support \\ for Efficient Page Migration \\ in Multi-GPU Systems\end{tabular} \\ \hline
+3:00–3:30 & \begin{tabular}[c]{@{}l@{}}Samuel Hsia, \\ Mark Wilkening, \\ Udit Gupta, \\ Caroline Trippel, \\ Carole-Jean Wu, \\ David Brooks,\\ Gu-Yeon Wei\end{tabular} & \begin{tabular}[c]{@{}l@{}}Cross-Stack Characterization and Solid State \\ Drive-Based Near Data Processing for \\ Recommendation Workloads\end{tabular} \\ \hline
+3:30–4:00 & \begin{tabular}[c]{@{}l@{}}Samuel Thomas,\\ Tamara Lehman, \\ R. Iris Bahar,\\ Joseph Izraelevitz\end{tabular} & \begin{tabular}[c]{@{}l@{}}Partial Recovery of Secure Non-Volatile \\ Main Memories\end{tabular} \\ \hline
+4:00–5:00 & Steven Hoover & \begin{tabular}[c]{@{}l@{}}Tutorial: Transaction-Level Verilog \\ and its Ecosystem\end{tabular} \\ \hline
+5:00–6:00 & \begin{tabular}[c]{@{}l@{}}Rob Landley,\\ D. Jeff Dionne\end{tabular} & Why the J-core Open Processor is Cool (AMA) \\ \hline
+\end{tabular}
+
+
+
+}
+\end{table}
+
+\end{document}