From 7b4fcbb7d6b97bba1133f5c16ce8a5b11a9290f6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bob=20Dr=C3=B6ge?= Date: Tue, 28 Jan 2025 11:15:21 +0100 Subject: [PATCH 1/4] add x86_64/intel/sapphire_rapids, modify supported CPUs for skylake_avx512 and sapphire_rapids --- docs/software_layer/cpu_targets.md | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/docs/software_layer/cpu_targets.md b/docs/software_layer/cpu_targets.md index 65b95c4ca..d70c5d381 100644 --- a/docs/software_layer/cpu_targets.md +++ b/docs/software_layer/cpu_targets.md @@ -10,6 +10,7 @@ In the 2023.06 version of the EESSI repository, the following CPU microarchitect * `x86_64/amd/zen3`: AMD Milan, Milan-X * `x86_64/amd/zen4`: AMD Genoa, Genoa-X, Bergamo, Siena * `x86_64/intel/haswell`: Intel Haswell, Broadwell -* `x86_64/intel/skylake_avx512`: Intel Skylake, Cascade Lake, Ice Lake, ... +* `x86_64/intel/skylake_avx512`: Intel Skylake, Cascade Lake, Ice Lake, Cooper Lake +* `x86_64/intel/sapphire_rapids`: Intel Sapphire Rapids, Emerald Rapids The names of these CPU targets correspond to the names used by [archspec](https://github.com/archspec/archspec). From 8b8b5aa93aed242b1025d1035ae71d7441ead791 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bob=20Dr=C3=B6ge?= Date: Tue, 28 Jan 2025 11:17:23 +0100 Subject: [PATCH 2/4] remove sapphire_rapids from excluded CPU targets --- scripts/available_software/available_software.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/available_software/available_software.py b/scripts/available_software/available_software.py index 5ae45552c..61cdc76fc 100644 --- a/scripts/available_software/available_software.py +++ b/scripts/available_software/available_software.py @@ -25,7 +25,7 @@ EESSI_TOPDIR = "/cvmfs/software.eessi.io/versions/2023.06" # some CPU targets are excluded for now, because software layer is too incomplete currently -EXCLUDE_CPU_TARGETS = ['aarch64/a64fx', 'x86_64/intel/sapphire_rapids'] +EXCLUDE_CPU_TARGETS = ['aarch64/a64fx'] # -------------------------------------------------------------------------------------------------------- From 25aaa750c911459783f04ae1159b591c84aee217 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bob=20Dr=C3=B6ge?= Date: Thu, 6 Feb 2025 16:45:38 +0100 Subject: [PATCH 3/4] rename sapphire_rapids to sapphirerapids --- docs/software_layer/cpu_targets.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/software_layer/cpu_targets.md b/docs/software_layer/cpu_targets.md index d70c5d381..922ed1d23 100644 --- a/docs/software_layer/cpu_targets.md +++ b/docs/software_layer/cpu_targets.md @@ -11,6 +11,6 @@ In the 2023.06 version of the EESSI repository, the following CPU microarchitect * `x86_64/amd/zen4`: AMD Genoa, Genoa-X, Bergamo, Siena * `x86_64/intel/haswell`: Intel Haswell, Broadwell * `x86_64/intel/skylake_avx512`: Intel Skylake, Cascade Lake, Ice Lake, Cooper Lake -* `x86_64/intel/sapphire_rapids`: Intel Sapphire Rapids, Emerald Rapids +* `x86_64/intel/sapphirerapids`: Intel Sapphire Rapids, Emerald Rapids The names of these CPU targets correspond to the names used by [archspec](https://github.com/archspec/archspec). From 14134cb588629a64b9bc50eeca60df3cbbfe4c1c Mon Sep 17 00:00:00 2001 From: ocaisa Date: Sun, 2 Mar 2025 09:06:03 +0100 Subject: [PATCH 4/4] Update available_software.py --- scripts/available_software/available_software.py | 1 - 1 file changed, 1 deletion(-) diff --git a/scripts/available_software/available_software.py b/scripts/available_software/available_software.py index ff4758974..b18e370e6 100644 --- a/scripts/available_software/available_software.py +++ b/scripts/available_software/available_software.py @@ -28,7 +28,6 @@ EESSI_TOPDIR = "/cvmfs/software.eessi.io/versions/2023.06" # some CPU targets are excluded for now, because software layer is too incomplete currently - EXCLUDE_CPU_TARGETS = ['aarch64/a64fx']