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ErwinMErwinM
committed
Refactor.
1 parent 396153f commit 4aeb6fd

22 files changed

+322
-435
lines changed

‎Makefile

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
OBJECTS = loader.o kmain.o kernel.o write.o descriptor_tables.o trap.o common.o timer.o paging.o ordered_list.o proc.o alloc.o vm.o spinlock.o switch.o
1+
OBJECTS = loader.o kmain.o kernel.o write.o descriptor_tables.o trap.o common.o timer.o proc.o alloc.o vm.o spinlock.o switch.o
22
CC = gcc
33
CFLAGS = -m32 -nostdlib -nostdinc -fno-builtin -fno-stack-protector \
44
-nostartfiles -nodefaultlibs -Wall -Wextra -c

‎alloc.c

+25-1
Original file line numberDiff line numberDiff line change
@@ -3,12 +3,13 @@
33
* becomes very hard (TM).
44
*/
55

6-
#include "paging.h"
76
#include "mem_layout.h"
87
#include "param.h"
98
#include "spinlock.h"
109
#include "mmu.h"
1110

11+
extern uint32_t end;
12+
1213
struct chunk {
1314
struct chunk *next;
1415
};
@@ -19,6 +20,29 @@ struct {
1920
struct chunk *freelist;
2021
} kmem;
2122

23+
uint32_t placement_address = (uint32_t)&end;
24+
25+
// Allocates memory starting directly at the end of loaded kernel
26+
// This memory is permenantly allocated and cannot be freed!
27+
uint32_t* kmalloc(uint32_t size, int align)
28+
{
29+
if (align == 1 && (placement_address & ~0xFFFFF000)) // if address is not 4k-aligned
30+
{
31+
// Align it
32+
placement_address &= 0xFFFFF000;
33+
placement_address += 0x1000;
34+
}
35+
uint32_t placed_at = placement_address;
36+
kprintf("KMALLOC: requested: %d.", size);
37+
kprintf(" Placed at: %h.\n", placed_at);
38+
placement_address += size;
39+
return placed_at;
40+
}
41+
42+
uint32_t* kmalloc_a(uint32_t size)
43+
{
44+
return kmalloc(size, 1);
45+
}
2246

2347
void initkheap()
2448
{

‎alloc.h

-5
This file was deleted.

‎bitmap.c

+57
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,57 @@
1+
// Macros used in the bitset algorithms.
2+
#define INDEX_FROM_BIT(a) (a/(8*4))
3+
#define OFFSET_FROM_BIT(a) (a%(8*4))
4+
5+
// Static function to set a bit in the frames bitset
6+
static void set_frame(uint32_t frame_addr)
7+
{
8+
uint32_t frame = frame_addr/0x1000;
9+
uint32_t idx = INDEX_FROM_BIT(frame);
10+
uint32_t off = OFFSET_FROM_BIT(frame);
11+
frames[idx] |= (0x1 << off);
12+
}
13+
14+
// Static function to clear a bit in the frames bitset
15+
static void clear_frame(uint32_t frame_addr)
16+
{
17+
uint32_t frame = frame_addr/0x1000;
18+
uint32_t idx = INDEX_FROM_BIT(frame);
19+
uint32_t off = OFFSET_FROM_BIT(frame);
20+
frames[idx] &= ~(0x1 << off);
21+
}
22+
23+
// Static function to test if a bit is set.
24+
static uint32_t test_frame(uint32_t frame_addr)
25+
{
26+
uint32_t frame = frame_addr/0x1000;
27+
uint32_t idx = INDEX_FROM_BIT(frame);
28+
uint32_t off = OFFSET_FROM_BIT(frame);
29+
return (frames[idx] & (0x1 << off));
30+
}
31+
32+
// Static function to find the first free frame.
33+
static uint32_t first_free_frame()
34+
{
35+
uint32_t i, j;
36+
for (i = 0; i < INDEX_FROM_BIT(total_frames); i++) // loop over every bitmask byte
37+
{
38+
//fb_write("\n");
39+
//fb_write_hex(frames[i]);
40+
if (frames[i] != 0xFFFFFFFF) // nothing free, exit early.
41+
{
42+
// at least one bit is free here.
43+
for (j = 0; j < 32; j++)
44+
{
45+
uint32_t toTest = 0x1 << j;
46+
if ( !(frames[i]&toTest) )
47+
{
48+
// return the index of the free frame
49+
// e.g. the nth frame out of 4096 frames (16mb) is free
50+
//fb_write("first free frame idx: ");
51+
//fb_write_dec(i*4*8+j);
52+
return i*4*8+j;
53+
}
54+
}
55+
}
56+
}
57+
}

‎bochslog.txt

+80-79
Original file line numberDiff line numberDiff line change
@@ -33,46 +33,46 @@
3333
00000000000i[ ] SB16 support: yes
3434
00000000000i[ ] USB support: yes
3535
00000000000i[ ] VGA extension support: vbe cirrus
36-
00000000000i[MEM0 ] allocated memory at 0x7fc2aa7b6010. after alignment, vector=0x7fc2aa7b7000
36+
00000000000i[MEM0 ] allocated memory at 0x7ff6d8008010. after alignment, vector=0x7ff6d8009000
3737
00000000000i[MEM0 ] 32.00MB
3838
00000000000i[MEM0 ] mem block size = 0x00100000, blocks=32
3939
00000000000i[MEM0 ] rom at 0xfffe0000/131072 ('/usr/share/bochs/BIOS-bochs-latest')
4040
00000000000i[VTIME] using 'realtime pit' synchronization method
41-
00000000000i[ ] lt_dlhandle is 0x4334590
41+
00000000000i[ ] lt_dlhandle is 0x43f8590
4242
00000000000i[PLGIN] loaded plugin libbx_hdimage.so
43-
00000000000i[ ] lt_dlhandle is 0x4334f20
43+
00000000000i[ ] lt_dlhandle is 0x43f8f20
4444
00000000000i[PLGIN] loaded plugin libbx_pci.so
45-
00000000000i[ ] lt_dlhandle is 0x4335aa0
45+
00000000000i[ ] lt_dlhandle is 0x43f9aa0
4646
00000000000i[PLGIN] loaded plugin libbx_pci2isa.so
47-
00000000000i[ ] lt_dlhandle is 0x43364b0
47+
00000000000i[ ] lt_dlhandle is 0x43fa4b0
4848
00000000000i[PLGIN] loaded plugin libbx_acpi.so
49-
00000000000i[ ] lt_dlhandle is 0x4336eb0
49+
00000000000i[ ] lt_dlhandle is 0x43faeb0
5050
00000000000i[PLGIN] loaded plugin libbx_cmos.so
51-
00000000000i[ ] lt_dlhandle is 0x43377f0
51+
00000000000i[ ] lt_dlhandle is 0x43fb7f0
5252
00000000000i[PLGIN] loaded plugin libbx_dma.so
53-
00000000000i[ ] lt_dlhandle is 0x4338280
53+
00000000000i[ ] lt_dlhandle is 0x43fc280
5454
00000000000i[PLGIN] loaded plugin libbx_pic.so
55-
00000000000i[ ] lt_dlhandle is 0x4338b20
55+
00000000000i[ ] lt_dlhandle is 0x43fcb20
5656
00000000000i[PLGIN] loaded plugin libbx_pit.so
57-
00000000000i[ ] lt_dlhandle is 0x4339550
57+
00000000000i[ ] lt_dlhandle is 0x43fd550
5858
00000000000i[PLGIN] loaded plugin libbx_floppy.so
59-
00000000000i[ ] lt_dlhandle is 0x433a140
59+
00000000000i[ ] lt_dlhandle is 0x43fe140
6060
00000000000i[PLGIN] loaded plugin libbx_vga.so
61-
00000000000i[ ] lt_dlhandle is 0x433a8d0
61+
00000000000i[ ] lt_dlhandle is 0x43fe8d0
6262
00000000000i[PLGIN] loaded plugin libbx_ioapic.so
63-
00000000000i[ ] lt_dlhandle is 0x433b310
63+
00000000000i[ ] lt_dlhandle is 0x43ff310
6464
00000000000i[PLGIN] loaded plugin libbx_keyboard.so
65-
00000000000i[ ] lt_dlhandle is 0x433bbb0
65+
00000000000i[ ] lt_dlhandle is 0x43ffbb0
6666
00000000000i[PLGIN] loaded plugin libbx_harddrv.so
67-
00000000000i[ ] lt_dlhandle is 0x434dca0
67+
00000000000i[ ] lt_dlhandle is 0x4411ca0
6868
00000000000i[PLGIN] loaded plugin libbx_pci_ide.so
6969
00000000000i[PLGIN] init_dev of 'pci' plugin device by virtual method
7070
00000000000i[PCI ] 440FX Host bridge present at device 0, function 0
7171
00000000000i[PLGIN] init_dev of 'pci2isa' plugin device by virtual method
7272
00000000000i[PCI ] PIIX3 PCI-to-ISA bridge present at device 1, function 0
7373
00000000000i[PLGIN] init_dev of 'cmos' plugin device by virtual method
7474
00000000000i[CMOS ] Using local time for initial clock
75-
00000000000i[CMOS ] Setting initial clock to: Sun Feb 7 09:01:36 2016 (time0=1454864496)
75+
00000000000i[CMOS ] Setting initial clock to: Sun Feb 7 11:52:46 2016 (time0=1454874766)
7676
00000000000i[PLGIN] init_dev of 'dma' plugin device by virtual method
7777
00000000000i[DMA ] channel 4 used by cascade
7878
00000000000i[PLGIN] init_dev of 'pic' plugin device by virtual method
@@ -179,66 +179,67 @@
179179
00000319504i[BIOS ] Shutdown flag 0
180180
00000320101i[BIOS ] ram_size=0x02000000
181181
00000320529i[BIOS ] ram_end=32MB
182-
00000332564i[BIOS ] Found 1 cpu(s)
183-
00000346745i[BIOS ] bios_table_addr: 0x000fa438 end=0x000fcc00
184-
00000674540i[PCI ] 440FX PMC write to PAM register 59 (TLB Flush)
185-
00001002472i[P2I ] PCI IRQ routing: PIRQA# set to 0x0b
186-
00001002496i[P2I ] PCI IRQ routing: PIRQB# set to 0x09
187-
00001002520i[P2I ] PCI IRQ routing: PIRQC# set to 0x0b
188-
00001002544i[P2I ] PCI IRQ routing: PIRQD# set to 0x09
189-
00001002554i[P2I ] write: ELCR2 = 0x0a
190-
00001003333i[BIOS ] PIIX3/PIIX4 init: elcr=00 0a
191-
00001011013i[BIOS ] PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 class=0x0600
192-
00001013292i[BIOS ] PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 class=0x0601
193-
00001015410i[BIOS ] PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 class=0x0101
194-
00001015639i[PIDE ] new BM-DMA address: 0xc000
195-
00001016259i[BIOS ] region 4: 0x0000c000
196-
00001018293i[BIOS ] PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 class=0x0680
197-
00001018523i[ACPI ] new irq line = 11
198-
00001018537i[ACPI ] new irq line = 9
199-
00001018564i[ACPI ] new PM base address: 0xb000
200-
00001018578i[ACPI ] new SM base address: 0xb100
201-
00001018606i[PCI ] setting SMRAM control register to 0x4a
202-
00001182700i[CPU0 ] Enter to System Management Mode
203-
00001182700i[CPU0 ] enter_system_management_mode: temporary disable VMX while in SMM mode
204-
00001182710i[CPU0 ] RSM: Resuming from System Management Mode
205-
00001346731i[PCI ] setting SMRAM control register to 0x0a
206-
00001361633i[BIOS ] MP table addr=0x000fa510 MPC table addr=0x000fa440 size=0xc8
207-
00001363448i[BIOS ] SMBIOS table addr=0x000fa520
208-
00001363499i[MEM0 ] allocate_block: block=0x1f used 0x2 of 0x20
209-
00001366427i[BIOS ] Firmware waking vector 0x1ff00cc
210-
00001371286i[BIOS ] ACPI tables: RSDP addr=0x000fa640 ACPI DATA addr=0x01ff0000 size=0x1f22
211-
00001371323i[PCI ] 440FX PMC write to PAM register 59 (TLB Flush)
212-
00001372054i[BIOS ] bios_table_cur_addr: 0x000fa664
213-
00001499672i[VBIOS] VGABios $Id: vgabios.c,v 1.75 2011/10/15 14:07:21 vruppert Exp $
214-
00001499743i[BXVGA] VBE known Display Interface b0c0
215-
00001499775i[BXVGA] VBE known Display Interface b0c5
216-
00001502700i[VBIOS] VBE Bios $Id: vbe.c,v 1.64 2011/07/19 18:25:05 vruppert Exp $
217-
00005714388i[BIOS ] IDE time out
218-
00678907865i[BIOS ] Booting from 07c0:0000
219-
00679008283i[BIOS ] int13_harddisk: function 41, unmapped device for ELDL=80
220-
00679011963i[BIOS ] int13_harddisk: function 08, unmapped device for ELDL=80
221-
00679015628i[BIOS ] *** int 15h function AX=00c0, BX=0000 not yet supported!
222-
00680615418i[MEM0 ] allocate_block: block=0xd used 0x3 of 0x20
223-
00680968028i[MEM0 ] allocate_block: block=0xe used 0x4 of 0x20
224-
00815301418i[ ] Ctrl-C detected in signal handler.
225-
00815301419i[ ] dbg: Quit
226-
00815301419i[CPU0 ] CPU is in protected mode (active)
227-
00815301419i[CPU0 ] CS.mode = 32 bit
228-
00815301419i[CPU0 ] SS.mode = 32 bit
229-
00815301419i[CPU0 ] EFER = 0x00000000
230-
00815301419i[CPU0 ] | EAX=00000000 EBX=0002cd80 ECX=00cb8000 EDX=000003d5
231-
00815301419i[CPU0 ] | ESP=00d04528 EBP=00067ee0 ESI=0002cef0 EDI=0002cef1
232-
00815301419i[CPU0 ] | IOPL=0 id vip vif ac vm rf nt of df if tf sf zf af PF cf
233-
00815301419i[CPU0 ] | SEG sltr(index|ti|rpl) base limit G D
234-
00815301419i[CPU0 ] | CS:0008( 0001| 0| 0) 00000000 ffffffff 1 1
235-
00815301419i[CPU0 ] | DS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
236-
00815301419i[CPU0 ] | SS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
237-
00815301419i[CPU0 ] | ES:0010( 0002| 0| 0) 00000000 ffffffff 1 1
238-
00815301419i[CPU0 ] | FS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
239-
00815301419i[CPU0 ] | GS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
240-
00815301419i[CPU0 ] | EIP=00d0002b (00d0002b)
241-
00815301419i[CPU0 ] | CR0=0xe0000011 CR2=0x00000000
242-
00815301419i[CPU0 ] | CR3=0x00d09000 CR4=0x00000000
243-
00815301419i[CMOS ] Last time is 1454865311 (Sun Feb 7 09:15:11 2016)
244-
00815301419i[CTRL ] quit_sim called with exit code 0
182+
00000332591i[BIOS ] Found 1 cpu(s)
183+
00000346772i[BIOS ] bios_table_addr: 0x000fa438 end=0x000fcc00
184+
00000674567i[PCI ] 440FX PMC write to PAM register 59 (TLB Flush)
185+
00001002499i[P2I ] PCI IRQ routing: PIRQA# set to 0x0b
186+
00001002523i[P2I ] PCI IRQ routing: PIRQB# set to 0x09
187+
00001002547i[P2I ] PCI IRQ routing: PIRQC# set to 0x0b
188+
00001002571i[P2I ] PCI IRQ routing: PIRQD# set to 0x09
189+
00001002581i[P2I ] write: ELCR2 = 0x0a
190+
00001003360i[BIOS ] PIIX3/PIIX4 init: elcr=00 0a
191+
00001011040i[BIOS ] PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 class=0x0600
192+
00001013319i[BIOS ] PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 class=0x0601
193+
00001015437i[BIOS ] PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 class=0x0101
194+
00001015666i[PIDE ] new BM-DMA address: 0xc000
195+
00001016286i[BIOS ] region 4: 0x0000c000
196+
00001018320i[BIOS ] PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 class=0x0680
197+
00001018550i[ACPI ] new irq line = 11
198+
00001018564i[ACPI ] new irq line = 9
199+
00001018591i[ACPI ] new PM base address: 0xb000
200+
00001018605i[ACPI ] new SM base address: 0xb100
201+
00001018633i[PCI ] setting SMRAM control register to 0x4a
202+
00001182727i[CPU0 ] Enter to System Management Mode
203+
00001182727i[CPU0 ] enter_system_management_mode: temporary disable VMX while in SMM mode
204+
00001182737i[CPU0 ] RSM: Resuming from System Management Mode
205+
00001346758i[PCI ] setting SMRAM control register to 0x0a
206+
00001361660i[BIOS ] MP table addr=0x000fa510 MPC table addr=0x000fa440 size=0xc8
207+
00001363475i[BIOS ] SMBIOS table addr=0x000fa520
208+
00001363526i[MEM0 ] allocate_block: block=0x1f used 0x2 of 0x20
209+
00001366454i[BIOS ] Firmware waking vector 0x1ff00cc
210+
00001371313i[BIOS ] ACPI tables: RSDP addr=0x000fa640 ACPI DATA addr=0x01ff0000 size=0x1f22
211+
00001371350i[PCI ] 440FX PMC write to PAM register 59 (TLB Flush)
212+
00001372081i[BIOS ] bios_table_cur_addr: 0x000fa664
213+
00001499699i[VBIOS] VGABios $Id: vgabios.c,v 1.75 2011/10/15 14:07:21 vruppert Exp $
214+
00001499770i[BXVGA] VBE known Display Interface b0c0
215+
00001499802i[BXVGA] VBE known Display Interface b0c5
216+
00001502727i[VBIOS] VBE Bios $Id: vbe.c,v 1.64 2011/07/19 18:25:05 vruppert Exp $
217+
00005714438i[BIOS ] IDE time out
218+
00817822235i[BIOS ] Booting from 07c0:0000
219+
00817922653i[BIOS ] int13_harddisk: function 41, unmapped device for ELDL=80
220+
00817926333i[BIOS ] int13_harddisk: function 08, unmapped device for ELDL=80
221+
00817929998i[BIOS ] *** int 15h function AX=00c0, BX=0000 not yet supported!
222+
00819529789i[MEM0 ] allocate_block: block=0x5 used 0x3 of 0x20
223+
00819955745i[MEM0 ] allocate_block: block=0x7 used 0x4 of 0x20
224+
00828257181i[MEM0 ] allocate_block: block=0x6 used 0x5 of 0x20
225+
00976912842i[ ] Ctrl-C detected in signal handler.
226+
00976912842i[ ] dbg: Quit
227+
00976912842i[CPU0 ] CPU is in protected mode (active)
228+
00976912842i[CPU0 ] CS.mode = 32 bit
229+
00976912842i[CPU0 ] SS.mode = 32 bit
230+
00976912842i[CPU0 ] EFER = 0x00000000
231+
00976912842i[CPU0 ] | EAX=00000000 EBX=0002cd80 ECX=004b8000 EDX=000003d5
232+
00976912842i[CPU0 ] | ESP=00504370 EBP=00067ee0 ESI=0002cef0 EDI=0002cef1
233+
00976912842i[CPU0 ] | IOPL=0 id vip vif ac vm rf nt of df if tf sf zf af PF cf
234+
00976912842i[CPU0 ] | SEG sltr(index|ti|rpl) base limit G D
235+
00976912842i[CPU0 ] | CS:0008( 0001| 0| 0) 00000000 ffffffff 1 1
236+
00976912842i[CPU0 ] | DS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
237+
00976912842i[CPU0 ] | SS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
238+
00976912842i[CPU0 ] | ES:0010( 0002| 0| 0) 00000000 ffffffff 1 1
239+
00976912842i[CPU0 ] | FS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
240+
00976912842i[CPU0 ] | GS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
241+
00976912842i[CPU0 ] | EIP=0050002b (0050002b)
242+
00976912842i[CPU0 ] | CR0=0xe0000011 CR2=0x00000000
243+
00976912842i[CPU0 ] | CR3=0x00508000 CR4=0x00000000
244+
00976912842i[CMOS ] Last time is 1454875742 (Sun Feb 7 12:09:02 2016)
245+
00976912842i[CTRL ] quit_sim called with exit code 0

‎common.h

+6-39
Original file line numberDiff line numberDiff line change
@@ -1,50 +1,17 @@
1-
/** common.h:
2-
* Define some typedefs
3-
* int types copied from stdint.h
4-
*/
1+
// common.h:
2+
// Define some typedefs
3+
// int types copied from stdint.h
54

6-
#ifndef COMMON_H
7-
#define COMMON_H
5+
#ifndef INCLUDE_COMMON_H
6+
#define INCLUDE_COMMON_H
87

98
/* this is copied from GNU stdint.h */
109
typedef signed char int8_t;
1110
typedef short int int16_t;
1211
typedef int int32_t;
13-
# if __WORDSIZE == 64
14-
typedef long int int64_t;
15-
# else
16-
__extension__
17-
typedef long long int int64_t;
18-
# endif
19-
20-
/* Unsigned. */
2112
typedef unsigned char uint8_t;
2213
typedef unsigned short int uint16_t;
23-
#ifndef __uint32_t_defined
24-
typedef unsigned int uint32_t;
25-
# define __uint32_t_defined
26-
#endif
27-
#if __WORDSIZE == 64
28-
typedef unsigned long int uint64_t;
29-
#else
30-
__extension__
31-
typedef unsigned long long int uint64_t;
32-
#endif
33-
34-
typedef struct registers
35-
{
36-
uint32_t ds; // Data segment selector
37-
uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax; // Pushed by pusha.
38-
uint32_t int_no, err_code; // Interrupt number and error code (if applicable)
39-
uint32_t eip, cs, eflags, useresp, ss; // Pushed by the processor automatically.
40-
} regs_t;
41-
42-
// functions
43-
void memcpy(uint16_t *dest, uint16_t *src, uint32_t len);
44-
void memset(uint8_t *dest, uint8_t val, uint32_t len);
45-
46-
void* memmove(void *dst, const void *src, uint32_t n);
47-
char* safestrcpy(char *s, const char *t, int n);
14+
typedef unsigned int uint32_t, pde_t, pte_t;
4815

4916
#define PANIC(msg) panic(msg, __FILE__, __LINE__);
5017
#define ASSERT(b) ((b) ? (void)0 : panic_assert(__FILE__, __LINE__, #b));

‎defs.h

+26
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
#ifndef INCLUDE_DEFS_H
2+
#define INCLUDE_DEFS_H
3+
4+
#include "common.h"
5+
#include "proc.h"
6+
7+
// alloc.c
8+
void initkheap();
9+
void kfree(uint32_t *address);
10+
uint32_t* kalloc();
11+
12+
// common.h
13+
void memcpy(uint16_t *dest, uint16_t *src, uint32_t len);
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void memset(uint8_t *dest, uint8_t val, uint32_t len);
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void* memmove(void *dst, const void *src, uint32_t n);
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char* safestrcpy(char *s, const char *t, int n);
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// vm.c
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void initgtd();
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void initpaging();
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void inituvm(pte_t *pgdir, char *init, uint32_t sz);
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pte_t* setupkvm();
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void switchuvm(struct proc *p);
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#endif

‎iso/boot/kernel.elf

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