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| 1 | +* Allwinner A10 I2S controller |
| 2 | + |
| 3 | +The I2S bus (Inter-IC sound bus) is a serial link for digital |
| 4 | +audio data transfer between devices in the system. |
| 5 | + |
| 6 | +Required properties: |
| 7 | + |
| 8 | +- compatible: should be one of the followings |
| 9 | + - "allwinner,sun4i-a10-i2s" |
| 10 | +- reg: physical base address of the controller and length of memory mapped |
| 11 | + region. |
| 12 | +- interrupts: should contain the I2S interrupt. |
| 13 | +- dmas: DMA specifiers for tx and rx dma. See the DMA client binding, |
| 14 | + Documentation/devicetree/bindings/dma/dma.txt |
| 15 | +- dma-names: should include "tx" and "rx". |
| 16 | +- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. |
| 17 | +- clock-names: should contain followings: |
| 18 | + - "apb" : clock for the I2S bus interface |
| 19 | + - "mod" : module clock for the I2S controller |
| 20 | +- #sound-dai-cells : Must be equal to 0 |
| 21 | + |
| 22 | +Example: |
| 23 | + |
| 24 | +i2s0: i2s@01c22400 { |
| 25 | + #sound-dai-cells = <0>; |
| 26 | + compatible = "allwinner,sun4i-a10-i2s"; |
| 27 | + reg = <0x01c22400 0x400>; |
| 28 | + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
| 29 | + clocks = <&apb0_gates 3>, <&i2s0_clk>; |
| 30 | + clock-names = "apb", "mod"; |
| 31 | + dmas = <&dma SUN4I_DMA_NORMAL 3>, |
| 32 | + <&dma SUN4I_DMA_NORMAL 3>; |
| 33 | + dma-names = "rx", "tx"; |
| 34 | +}; |
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