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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull more MIPS updates from Ralf Baechle: "This is the secondnd batch of MIPS patches for 4.7. Summary: CPS: - Copy EVA configuration when starting secondary VPs. EIC: - Clear Status IPL. Lasat: - Fix a few off by one bugs. lib: - Mark intrinsics notrace. Not only are the intrinsics uninteresting, it would cause infinite recursion. MAINTAINERS: - Add file patterns for MIPS BRCM device tree bindings. - Add file patterns for mips device tree bindings. MT7628: - Fix MT7628 pinmux typos. - wled_an pinmux gpio. - EPHY LEDs pinmux support. Pistachio: - Enable KASLR VDSO: - Build microMIPS VDSO for microMIPS kernels. - Fix aliasing warning by building with `-fno-strict-aliasing' for debugging but also tracing them might result in recursion. Misc: - Add missing FROZEN hotplug notifier transitions. - Fix clk binding example for varioius PIC32 devices. - Fix cpu interrupt controller node-names in the DT files. - Fix XPA CPU feature separation. - Fix write_gc0_* macros when writing zero. - Add inline asm encoding helpers. - Add missing VZ accessor microMIPS encodings. - Fix little endian microMIPS MSA encodings. - Add 64-bit HTW fields and fix its configuration. - Fix sigreturn via VDSO on microMIPS kernel. - Lots of typo fixes. - Add definitions of SegCtl registers and use them" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (49 commits) MIPS: Add missing FROZEN hotplug notifier transitions MIPS: Build microMIPS VDSO for microMIPS kernels MIPS: Fix sigreturn via VDSO on microMIPS kernel MIPS: devicetree: fix cpu interrupt controller node-names MIPS: VDSO: Build with `-fno-strict-aliasing' MIPS: Pistachio: Enable KASLR MIPS: lib: Mark intrinsics notrace MIPS: Fix 64-bit HTW configuration MIPS: Add 64-bit HTW fields MAINTAINERS: Add file patterns for mips device tree bindings MAINTAINERS: Add file patterns for mips brcm device tree bindings MIPS: Simplify DSP instruction encoding macros MIPS: Add missing tlbinvf/XPA microMIPS encodings MIPS: Fix little endian microMIPS MSA encodings MIPS: Add missing VZ accessor microMIPS encodings MIPS: Add inline asm encoding helpers MIPS: Spelling fix lets -> let's MIPS: VR41xx: Fix typo MIPS: oprofile: Fix typo MIPS: math-emu: Fix typo ...
2 parents d66492b + a8c5ddf commit 4029632

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Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@ gpio0: gpio0@1f860000 {
3333
gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
36-
clocks = <&PBCLK4>;
36+
clocks = <&rootclk PB4CLK>;
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microchip,gpio-bank = <0>;
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gpio-ranges = <&pic32_pinctrl 0 0 16>;
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};

Documentation/devicetree/bindings/mips/cpu_irq.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ Required properties:
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- compatible : Should be "mti,cpu-interrupt-controller"
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Example devicetree:
16-
cpu-irq: cpu-irq@0 {
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cpu-irq: cpu-irq {
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#address-cells = <0>;
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interrupt-controller;

Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt

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Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ Example:
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compatible = "microchip,pic32mzda-sdhci";
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reg = <0x1f8ec000 0x100>;
2222
interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
23-
clocks = <&REFCLKO4>, <&PBCLK5>;
23+
clocks = <&rootclk REF4CLK>, <&rootclk PB5CLK>;
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clock-names = "base_clk", "sys_clk";
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bus-width = <4>;
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cap-sd-highspeed;

Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ pic32_pinctrl: pinctrl@1f801400{
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#size-cells = <1>;
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compatible = "microchip,pic32mzda-pinctrl";
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reg = <0x1f801400 0x400>;
37-
clocks = <&PBCLK1>;
37+
clocks = <&rootclk PB1CLK>;
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pinctrl_uart2: pinctrl_uart2 {
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uart2-tx {

Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ Example:
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interrupts = <112 IRQ_TYPE_LEVEL_HIGH>,
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<113 IRQ_TYPE_LEVEL_HIGH>,
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<114 IRQ_TYPE_LEVEL_HIGH>;
23-
clocks = <&PBCLK2>;
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clocks = <&rootclk PB2CLK>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1
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&pinctrl_uart1_cts

Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt

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@@ -8,12 +8,12 @@ Required properties:
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- compatible: must be "microchip,pic32mzda-dmt".
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- reg: physical base address of the controller and length of memory mapped
1010
region.
11-
- clocks: phandle of parent clock (should be &PBCLK7).
11+
- clocks: phandle of source clk. Should be <&rootclk PB7CLK>.
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1313
Example:
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1515
watchdog@1f800a00 {
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compatible = "microchip,pic32mzda-dmt";
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reg = <0x1f800a00 0x80>;
18-
clocks = <&PBCLK7>;
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clocks = <&rootclk PB7CLK>;
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};

Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt

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Original file line numberDiff line numberDiff line change
@@ -7,12 +7,12 @@ Required properties:
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- compatible: must be "microchip,pic32mzda-wdt".
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- reg: physical base address of the controller and length of memory mapped
99
region.
10-
- clocks: phandle of source clk. should be <&LPRC> clk.
10+
- clocks: phandle of source clk. Should be <&rootclk LPRCCLK>.
1111

1212
Example:
1313

1414
watchdog@1f800800 {
1515
compatible = "microchip,pic32mzda-wdt";
1616
reg = <0x1f800800 0x200>;
17-
clocks = <&LPRC>;
17+
clocks = <&rootclk LPRCCLK>;
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};

MAINTAINERS

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@@ -2505,6 +2505,7 @@ M: Hauke Mehrtens <[email protected]>
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M: Rafał Miłecki <[email protected]>
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S: Maintained
2508+
F: Documentation/devicetree/bindings/mips/brcm/
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F: arch/mips/bcm47xx/*
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F: arch/mips/include/asm/mach-bcm47xx/*
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@@ -7521,6 +7522,7 @@ W: http://www.linux-mips.org/
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T: git git://git.linux-mips.org/pub/scm/ralf/linux.git
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Q: http://patchwork.linux-mips.org/project/linux-mips/list/
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S: Supported
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F: Documentation/devicetree/bindings/mips/
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F: Documentation/mips/
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F: arch/mips/
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arch/mips/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -398,6 +398,7 @@ config MACH_PISTACHIO
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select SYS_SUPPORTS_LITTLE_ENDIAN
399399
select SYS_SUPPORTS_MIPS_CPS
400400
select SYS_SUPPORTS_MULTITHREADING
401+
select SYS_SUPPORTS_RELOCATABLE
401402
select SYS_SUPPORTS_ZBOOT
402403
select SYS_HAS_EARLY_PRINTK
403404
select USE_GENERIC_EARLY_PRINTK_8250

arch/mips/boot/dts/ingenic/jz4740.dtsi

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@@ -5,7 +5,7 @@
55
#size-cells = <1>;
66
compatible = "ingenic,jz4740";
77

8-
cpuintc: interrupt-controller@0 {
8+
cpuintc: interrupt-controller {
99
#address-cells = <0>;
1010
#interrupt-cells = <1>;
1111
interrupt-controller;

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