OpenChirp
diff --git a/‎Project Outputs for LoRaBugBoard/CAMtastic1.Cam renamed to ‎Project Outputs for LoRaBugBoard/V2/CAMtastic1.Cam b/‎Project Outputs for LoRaBugBoard/CAMtastic1.Cam renamed to ‎Project Outputs for LoRaBugBoard/V2/CAMtastic1.Cam
diff --git a/‎Project Outputs for LoRaBugBoard/CAMtastic2.Cam renamed to ‎Project Outputs for LoRaBugBoard/V2/CAMtastic2.Cam b/‎Project Outputs for LoRaBugBoard/CAMtastic2.Cam renamed to ‎Project Outputs for LoRaBugBoard/V2/CAMtastic2.Cam
diff --git a/‎Project Outputs for LoRaBugBoard/LoRaBugV2.zip renamed to ‎Project Outputs for LoRaBugBoard/V2/LoRaBugV2.zip b/‎Project Outputs for LoRaBugBoard/LoRaBugV2.zip renamed to ‎Project Outputs for LoRaBugBoard/V2/LoRaBugV2.zip
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2-RoundHoles.TXT renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2-RoundHoles.TXT b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2-RoundHoles.TXT renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2-RoundHoles.TXT
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2-SlotHoles.TXT renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2-SlotHoles.TXT b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2-SlotHoles.TXT renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2-SlotHoles.TXT
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2-macro.APR_LIB renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2-macro.APR_LIB b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2-macro.APR_LIB renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2-macro.APR_LIB
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.DRR renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.DRR b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.DRR renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.DRR
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.EXTREP renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.EXTREP b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.EXTREP renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.EXTREP
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GBL renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GBL b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GBL renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GBL
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GBO renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GBO b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GBO renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GBO
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GBS renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GBS b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GBS renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GBS
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GM1 renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GM1 b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GM1 renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GM1
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GTL renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GTL b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GTL renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GTL
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GTO renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GTO b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GTO renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GTO
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GTP renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GTP b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GTP renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GTP
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GTS renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GTS b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.GTS renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.GTS
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.LDP renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.LDP b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.LDP renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.LDP
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.REP renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.REP b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.REP renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.REP
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.RUL renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.RUL b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.RUL renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.RUL
diff --git a/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.apr renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.apr b/‎Project Outputs for LoRaBugBoard/PCBFireflyCaseV2.apr renamed to ‎Project Outputs for LoRaBugBoard/V2/PCBFireflyCaseV2.apr
diff --git a/‎Project Outputs for LoRaBugBoard/V2/README.txt
+5 b/‎Project Outputs for LoRaBugBoard/V2/README.txt
+5
diff --git a/‎Project Outputs for LoRaBugBoard/Status Report.Txt renamed to ‎Project Outputs for LoRaBugBoard/V2/Status Report.Txt b/‎Project Outputs for LoRaBugBoard/Status Report.Txt renamed to ‎Project Outputs for LoRaBugBoard/V2/Status Report.Txt
@@ -0,0 +1,5 @@
+Standard FR4 laminate
+Thickness 0.062"
+Drill sizes are actual tool sizes
+Drill Tolerance +/- 0.008"
+Adjust tools to free sizes where possible