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openflow: add generics support
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pyfpga/templates/openflow.jinja

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -42,19 +42,18 @@ read_verilog -defer {{ name }}
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read_verilog -defer -sv {{ name }}
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{% elif attr.hdl == "vhdl" %}
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{% if loop.first %}
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# VHDL Generics
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{% set generics = "-gFREQ=125000000 -gSECS=1" %}
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ghdl {{ gflags }} {{ generics }} {{ top }}
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{% if params %}# VHDL Generics
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ghdl {{ gflags }}{% for key, value in params.items() %} -g{{ key }}={{ value }}{% endfor %} {{ top }}
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{% else %}
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ghdl {{ gflags }} {{ top }}
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{% endif %}
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{% endif %}
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{% endfor %}
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{% endif %}
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{#
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{% if params %}# Verilog Parameters
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{% if loop.last and attr.hdl in ["vlog", "slog"] and params %}# Verilog Parameters
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chparam{% for key, value in params.items() %} -set {{ key }} {{ value }}{% endfor %}
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{% endif %}
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#}
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{% endfor %}
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{% endif %}
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# Top-level specification and Syntesis
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{% if family in ['ice40', 'ecp5'] %}

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