Add mock-ups and improve regression

Author: rodrigomelo9

examples/projects/regress.sh

@@ -1,5 +1,11 @@
 #!/bin/bash
 
+#
+# Copyright (C) 2024-2025 PyFPGA Project
+#
+# SPDX-License-Identifier: GPL-3.0-or-later
+#
+
 set -e
 
 declare -A TOOLS
@@ -44,9 +50,9 @@ for TOOL in "${!TOOLS[@]}"; do
       fi
       echo "> $TOOL - $BOARD - $SOURCE"
       if [[ "$NOTOOL" == true ]]; then
-        python3 $TOOL.py --board $BOARD --source $SOURCE --notool
+        python3 $TOOL.py --board $BOARD --source $SOURCE --action all --notool
       else
-        python3 $TOOL.py --board $BOARD --source $SOURCE
+        python3 $TOOL.py --board $BOARD --source $SOURCE --action all
       fi
     done
   done

pyfpga/templates/diamond-prog.jinja

@@ -1,19 +1,18 @@
 {#
-# Copyright (C) 2024 PyFPGA Project
+# Copyright (C) 2024-2025 PyFPGA Project
 #
 # SPDX-License-Identifier: GPL-3.0-or-later
 #
 #}
 
 if [ "$DIAMOND_XCF" == "" ]; then
-	DIAMOND_XCF=impl1/impl1.xcf
+  DIAMOND_XCF=impl1/impl1.xcf
 fi
 
 if [ -f "$DIAMOND_XCF" ]; then
-	pgrcmd -infile $DIAMOND_XCF
+  pgrcmd -infile $DIAMOND_XCF
 else
-	echo "ERROR: Automatic programming with Diamond is not yet supported."
-	echo "       Please create the `realpath $DIAMOND_XCF` file manually and rerun the prog command."
-	echo "       Hint: You can change the location of the XCF file by setting the DIAMOND_XCF environment variable."
-	exit 1
+  echo "Automatic programming with Diamond is not yet supported."
+  echo "Please create the `realpath $DIAMOND_XCF` file manually and rerun the prog command."
+  echo "Hint: You can change the location of the XCF file by setting the DIAMOND_XCF environment variable."
 fi

pyfpga/templates/quartus-prog.jinja

@@ -1,6 +1,6 @@
 {#
 #
-# Copyright (C) 2015-2024 PyFPGA Project
+# Copyright (C) 2015-2025 PyFPGA Project
 #
 # SPDX-License-Identifier: GPL-3.0-or-later
 #
@@ -9,7 +9,6 @@
 RESULT=$(jtagconfig)
 echo "$RESULT"
 
-# cable = re.match(r"1\) (.*) \[", result).groups()[0]
 CABLE=$(echo "$RESULT" | awk -F '1\\) | \\[' '/1\)/ {print $2}')
 
 quartus_pgm -c $CABLE --mode jtag -o "p;{{ bitstream }}@{{ position }}"

tests/mocks/diamondc

@@ -1,12 +1,13 @@
 #!/usr/bin/env python3
 
 #
-# Copyright (C) 2024 PyFPGA Project
+# Copyright (C) 2024-2025 PyFPGA Project
 #
 # SPDX-License-Identifier: GPL-3.0-or-later
 #
 
 import argparse
+import re
 import subprocess
 
 
@@ -34,4 +35,12 @@ subprocess.run(
    universal_newlines=True
 )
 
+pattern = r'prj_project\s+new\s+-name\s+(\S+)\s'
+with open(args.source, 'r', encoding='utf-8') as file:
+    match = re.search(pattern, file.read())
+    if match:
+        project = match.group(1)
+        with open(f'{project}.bit', 'w', encoding='utf-8') as file:
+            pass
+
 print(f'INFO:the {tool.upper()} mock has been executed')

tests/mocks/docker

@@ -0,0 +1,14 @@
+#!/usr/bin/env python3
+
+#
+# Copyright (C) 2025 PyFPGA Project
+#
+# SPDX-License-Identifier: GPL-3.0-or-later
+#
+
+with open('openflow.bit', 'w', encoding='utf-8') as file:
+    pass
+with open('openflow.svf', 'w', encoding='utf-8') as file:
+    pass
+
+print('INFO:the DOCKER mock has been executed')

tests/mocks/jtagconfig

@@ -0,0 +1,10 @@
+#!/usr/bin/env python3
+
+#
+# Copyright (C) 2025 PyFPGA Project
+#
+# SPDX-License-Identifier: GPL-3.0-or-later
+#
+
+print('1) USB-Blaster [USB-0]')
+print('   02D120DD   EP4CE22')

tests/mocks/source-me.sh

@@ -2,4 +2,4 @@
 
 MDIR=$(cd -- "$(dirname -- "${BASH_SOURCE[0]}")" &> /dev/null && pwd)
 
-export PATH=$PATH:$MDIR
+export PATH=$MDIR:$PATH