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ise: replace file rename by copy
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pyfpga/templates/ise.jinja

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -94,7 +94,7 @@ if { [process get "Place & Route" status] == "errors" } { exit 1 }
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process run "Generate Programming File"
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if { [process get "Generate Programming File" status] == "errors" } { exit 1 }
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catch { file rename -force {{ top }}.bit {{ project }}.bit }
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catch { file copy -force {{ top }}.bit {{ project }}.bit }
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{% if hooks %}{{ hooks.postbit | join('\n') }}{% endif %}
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