@@ -237,6 +237,17 @@ def make(self, first='cfg', last='bit'):
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self ._create_file (self .conf ['tool' ], self .conf ['make_ext' ])
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self ._run (self .conf ['make_cmd' ], 'make.log' )
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+ def _get_bitstream (self , bitstream ):
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+ if not bitstream :
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+ for ext in self .conf ['prog_bit' ]:
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+ candidate = Path (self .odir ) / f'{ self .data ["project" ]} .{ ext } '
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+ if candidate .is_file ():
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+ bitstream = candidate
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+ break
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+ if not bitstream or not Path (bitstream ).is_file ():
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+ raise FileNotFoundError (bitstream )
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+ return self ._get_absolute (bitstream , self .conf ['prog_ext' ])
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+
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def prog (self , bitstream = None , position = 1 ):
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"""Program the FPGA
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@@ -252,16 +263,7 @@ def prog(self, bitstream=None, position=1):
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if position not in range (1 , 9 ):
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raise ValueError ('Invalid position.' )
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self .logger .info ('Programming' )
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- if not bitstream :
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- for ext in self .conf ['prog_bit' ]:
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- candidate = Path (self .odir ) / f'{ self .data ["project" ]} .{ ext } '
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- if candidate .is_file ():
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- bitstream = candidate
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- break
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- if not bitstream or not Path (bitstream ).is_file ():
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- raise FileNotFoundError (bitstream )
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- bitstream = self ._get_absolute (bitstream , self .conf ['prog_ext' ])
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- self .data ['bitstream' ] = bitstream
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+ self .data ['bitstream' ] = self ._get_bitstream (bitstream )
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self .data ['position' ] = position
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self ._prog_custom ()
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self ._create_file (f'{ self .conf ["tool" ]} -prog' , self .conf ['prog_ext' ])
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