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| 1 | +;***************************************************************************** |
| 2 | +; @file startup_stm32c031xx.s for ARM-KEIL ARM assembler |
| 3 | +; @brief CMSIS Cortex-M4F Core Device Startup File for stm32c031xx |
| 4 | +; @version CMSIS 5.9.0 |
| 5 | +; @date 1 Feb 2023 |
| 6 | +; |
| 7 | +; Modified by Quantum Leaps: |
| 8 | +; - Added relocating of the Vector Table to free up the 256B region at 0x0 |
| 9 | +; for NULL-pointer protection by the MPU. |
| 10 | +; - Modified all exception handlers to branch to assert_failed() |
| 11 | +; instead of locking up the CPU inside an endless loop. |
| 12 | +; |
| 13 | +; @description |
| 14 | +; Created from the CMSIS template for the specified device |
| 15 | +; Quantum Leaps, www.state-machine.com |
| 16 | +; |
| 17 | +; @note |
| 18 | +; The symbols Stack_Size and Heap_Size should be provided on the command- |
| 19 | +; line options to the assembler, for example as: |
| 20 | +; --pd "Stack_Size SETA 1024" --pd "Heap_Size SETA 0" |
| 21 | + |
| 22 | + |
| 23 | +;****************************************************************************** |
| 24 | +; Allocate space for the stack. |
| 25 | +; |
| 26 | + AREA STACK, NOINIT, READWRITE, ALIGN=3 |
| 27 | +__stack_base |
| 28 | +StackMem |
| 29 | + SPACE Stack_Size ; provided in command-line option, for example: |
| 30 | + ; --pd "Stack_Size SETA 512" |
| 31 | +__stack_limit |
| 32 | +__initial_sp |
| 33 | + |
| 34 | +;****************************************************************************** |
| 35 | +; Allocate space for the heap. |
| 36 | +; |
| 37 | + AREA HEAP, NOINIT, READWRITE, ALIGN=3 |
| 38 | +__heap_base |
| 39 | +HeapMem |
| 40 | + SPACE Heap_Size ; provided in command-line option, for example: |
| 41 | + ; --pd "Heap_Size SETA 0" |
| 42 | +__heap_limit |
| 43 | + |
| 44 | +; Indicate that the code in this file preserves 8-byte alignment of the stack. |
| 45 | + PRESERVE8 |
| 46 | + |
| 47 | +;****************************************************************************** |
| 48 | +; The vector table. |
| 49 | +; |
| 50 | +; Place code into the reset code section. |
| 51 | + AREA RESET, DATA, READONLY, ALIGN=8 |
| 52 | + EXPORT __Vectors |
| 53 | + EXPORT __Vectors_End |
| 54 | + EXPORT __Vectors_Size |
| 55 | + |
| 56 | +__Vectors |
| 57 | + DCD __initial_sp ; Top of Stack |
| 58 | + DCD Reset_Handler ; Reset Handler |
| 59 | + DCD NMI_Handler ; NMI Handler |
| 60 | + DCD HardFault_Handler ; Hard Fault Handler |
| 61 | + DCD Default_Handler ; Reserved |
| 62 | + DCD Default_Handler ; Reserved |
| 63 | + DCD Default_Handler ; Reserved |
| 64 | + DCD Default_Handler ; Reserved |
| 65 | + DCD Default_Handler ; Reserved |
| 66 | + DCD Default_Handler ; Reserved |
| 67 | + DCD Default_Handler ; Reserved |
| 68 | + DCD SVC_Handler ; SVCall handler |
| 69 | + DCD DebugMon_Handler ; Debug Monitor handler |
| 70 | + DCD Default_Handler ; Reserved |
| 71 | + DCD PendSV_Handler ; PendSV handler |
| 72 | + DCD SysTick_Handler ; SysTick handler |
| 73 | + |
| 74 | + ; IRQ handlers... |
| 75 | + DCD WWDG_IRQHandler ; [ 0] Window Watchdog |
| 76 | + DCD Reserved1_IRQHandler ; [ 1] Reserved |
| 77 | + DCD RTC_IRQHandler ; [ 2] RTC through EXTI Line |
| 78 | + DCD FLASH_IRQHandler ; [ 3] FLASH |
| 79 | + DCD RCC_IRQHandler ; [ 4] RCC |
| 80 | + DCD EXTI0_1_IRQHandler ; [ 5] EXTI Line 0 and 1 |
| 81 | + DCD EXTI2_3_IRQHandler ; [ 6] EXTI Line 2 and 3 |
| 82 | + DCD EXTI4_15_IRQHandler ; [ 7] EXTI Line 4 to 15 |
| 83 | + DCD Reserved8_IRQHandler ; [ 8] Reserved |
| 84 | + DCD DMA1_Channel1_IRQHandler ; [ 9] DMA1 Channel 1 |
| 85 | + DCD DMA1_Channel2_3_IRQHandler ; [10] DMA1 Channel 2 and Channel 3 |
| 86 | + DCD DMAMUX1_IRQHandler ; [11] DMAMUX |
| 87 | + DCD ADC1_IRQHandler ; [12] ADC1 |
| 88 | + DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; [13] TIM1 Break, Update, Trigger and Commutation |
| 89 | + DCD TIM1_CC_IRQHandler ; [14] TIM1 Capture Compare |
| 90 | + DCD Reserved15_IRQHandler ; [15] Reserved |
| 91 | + DCD TIM3_IRQHandler ; [16] TIM3 |
| 92 | + DCD Reserved17_IRQHandler ; [17] Reserved |
| 93 | + DCD Reserved18_IRQHandler ; [18] Reserved |
| 94 | + DCD TIM14_IRQHandler ; [19] TIM14 |
| 95 | + DCD Reserved20_IRQHandler ; [20] Reserved |
| 96 | + DCD TIM16_IRQHandler ; [21] TIM16 |
| 97 | + DCD TIM17_IRQHandler ; [22] TIM17 |
| 98 | + DCD I2C1_IRQHandler ; [23] I2C1 |
| 99 | + DCD Reserved24_IRQHandler ; [24] Reserved |
| 100 | + DCD SPI1_IRQHandler ; [25] SPI1 |
| 101 | + DCD Reserved26_IRQHandler ; [26] Reserved |
| 102 | + DCD USART1_IRQHandler ; [27] USART1 |
| 103 | + DCD USART2_IRQHandler ; [28] USART2 |
| 104 | + DCD Reserved29_IRQHandler ; [29] Reserved |
| 105 | + DCD Reserved30_IRQHandler ; [30] Reserved |
| 106 | + DCD Reserved31_IRQHandler ; [31] Reserved |
| 107 | + |
| 108 | +__Vectors_End |
| 109 | + |
| 110 | +__Vectors_Size EQU __Vectors_End - __Vectors |
| 111 | + |
| 112 | + |
| 113 | +;****************************************************************************** |
| 114 | +; This is the code for exception handlers. |
| 115 | +; |
| 116 | + AREA |.text|, CODE, READONLY |
| 117 | + |
| 118 | +;****************************************************************************** |
| 119 | +; This is the code that gets called when the processor first starts execution |
| 120 | +; following a reset event. |
| 121 | +; |
| 122 | +Reset_Handler PROC |
| 123 | + EXPORT Reset_Handler [WEAK] |
| 124 | + IMPORT SystemInit |
| 125 | + IMPORT __main |
| 126 | + IMPORT assert_failed |
| 127 | + |
| 128 | + LDR r0,=SystemInit ; CMSIS system initialization |
| 129 | + BLX r0 |
| 130 | + |
| 131 | + ; Call the C library entry point that handles startup. This will copy |
| 132 | + ; the .data section initializers from flash to SRAM and zero fill the |
| 133 | + ; .bss section. |
| 134 | + ; NOTE: The __main function clears the C stack as well |
| 135 | + LDR r0,=__main |
| 136 | + BX r0 |
| 137 | + |
| 138 | + ; __main calls the main() function, which should not return, |
| 139 | + ; but just in case jump to assert_failed() if main returns. |
| 140 | + CPSID i ; disable all interrupts |
| 141 | + LDR r0,=str_EXIT |
| 142 | + MOVS r1,#1 |
| 143 | + LDR r2,=__initial_sp ; re-set the SP in case of stack overflow |
| 144 | + MOV sp,r2 |
| 145 | + LDR r2,=assert_failed |
| 146 | + BX r2 |
| 147 | +str_EXIT |
| 148 | + DCB "EXIT" |
| 149 | + ALIGN |
| 150 | + ENDP |
| 151 | + |
| 152 | +;****************************************************************************** |
| 153 | +NMI_Handler PROC |
| 154 | + EXPORT NMI_Handler [WEAK] |
| 155 | + CPSID i ; disable all interrupts |
| 156 | + LDR r0,=str_NMI |
| 157 | + MOVS r1,#1 |
| 158 | + LDR r2,=__initial_sp ; re-set the SP in case of stack overflow |
| 159 | + MOV sp,r2 |
| 160 | + LDR r2,=assert_failed |
| 161 | + BX r2 |
| 162 | +str_NMI |
| 163 | + DCB "NMI" |
| 164 | + ALIGN |
| 165 | + ENDP |
| 166 | + |
| 167 | +;****************************************************************************** |
| 168 | +HardFault_Handler PROC |
| 169 | + EXPORT HardFault_Handler [WEAK] |
| 170 | + CPSID i ; disable all interrupts |
| 171 | + LDR r0,=str_HardFault |
| 172 | + MOVS r1,#1 |
| 173 | + LDR r2,=__initial_sp ; re-set the SP in case of stack overflow |
| 174 | + MOV sp,r2 |
| 175 | + LDR r2,=assert_failed |
| 176 | + BX r2 |
| 177 | +str_HardFault |
| 178 | + DCB "HardFault" |
| 179 | + ALIGN |
| 180 | + ENDP |
| 181 | + |
| 182 | + |
| 183 | + |
| 184 | +;****************************************************************************** |
| 185 | +; |
| 186 | +; Weak non-fault handlers... |
| 187 | +; |
| 188 | + |
| 189 | +;****************************************************************************** |
| 190 | +SVC_Handler PROC |
| 191 | + EXPORT SVC_Handler [WEAK] |
| 192 | + CPSID i ; disable all interrupts |
| 193 | + LDR r0,=str_SVC |
| 194 | + MOVS r1,#1 |
| 195 | + LDR r2,=__initial_sp ; re-set the SP in case of stack overflow |
| 196 | + MOV sp,r2 |
| 197 | + LDR r2,=assert_failed |
| 198 | + BX r2 |
| 199 | +str_SVC |
| 200 | + DCB "SVC" |
| 201 | + ALIGN |
| 202 | + ENDP |
| 203 | + |
| 204 | +;****************************************************************************** |
| 205 | +DebugMon_Handler PROC |
| 206 | + EXPORT DebugMon_Handler [WEAK] |
| 207 | + CPSID i ; disable all interrupts |
| 208 | + LDR r0,=str_DebugMon |
| 209 | + MOVS r1,#1 |
| 210 | + LDR r2,=__initial_sp ; re-set the SP in case of stack overflow |
| 211 | + MOV sp,r2 |
| 212 | + LDR r2,=assert_failed |
| 213 | + BX r2 |
| 214 | +str_DebugMon |
| 215 | + DCB "DebugMon" |
| 216 | + ALIGN |
| 217 | + ENDP |
| 218 | + |
| 219 | +;****************************************************************************** |
| 220 | +PendSV_Handler PROC |
| 221 | + EXPORT PendSV_Handler [WEAK] |
| 222 | + CPSID i ; disable all interrupts |
| 223 | + LDR r0,=str_PendSV |
| 224 | + MOVS r1,#1 |
| 225 | + LDR r2,=__initial_sp ; re-set the SP in case of stack overflow |
| 226 | + MOV sp,r2 |
| 227 | + LDR r2,=assert_failed |
| 228 | + BX r2 |
| 229 | +str_PendSV |
| 230 | + DCB "PendSV" |
| 231 | + ALIGN |
| 232 | + ENDP |
| 233 | + |
| 234 | +;****************************************************************************** |
| 235 | +SysTick_Handler PROC |
| 236 | + EXPORT SysTick_Handler [WEAK] |
| 237 | + CPSID i ; disable all interrupts |
| 238 | + LDR r0,=str_SysTick |
| 239 | + MOVS r1,#1 |
| 240 | + LDR r2,=__initial_sp ; re-set the SP in case of stack overflow |
| 241 | + MOV sp,r2 |
| 242 | + LDR r2,=assert_failed |
| 243 | + BX r2 |
| 244 | +str_SysTick |
| 245 | + DCB "SysTick" |
| 246 | + ALIGN |
| 247 | + ENDP |
| 248 | + |
| 249 | +;****************************************************************************** |
| 250 | +Default_Handler PROC |
| 251 | + EXPORT WWDG_IRQHandler [WEAK] |
| 252 | + EXPORT RTC_IRQHandler [WEAK] |
| 253 | + EXPORT FLASH_IRQHandler [WEAK] |
| 254 | + EXPORT RCC_IRQHandler [WEAK] |
| 255 | + EXPORT EXTI0_1_IRQHandler [WEAK] |
| 256 | + EXPORT EXTI2_3_IRQHandler [WEAK] |
| 257 | + EXPORT EXTI4_15_IRQHandler [WEAK] |
| 258 | + EXPORT DMA1_Channel1_IRQHandler [WEAK] |
| 259 | + EXPORT DMA1_Channel2_3_IRQHandler [WEAK] |
| 260 | + EXPORT DMAMUX1_IRQHandler [WEAK] |
| 261 | + EXPORT ADC1_IRQHandler [WEAK] |
| 262 | + EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK] |
| 263 | + EXPORT TIM1_CC_IRQHandler [WEAK] |
| 264 | + EXPORT TIM3_IRQHandler [WEAK] |
| 265 | + EXPORT TIM14_IRQHandler [WEAK] |
| 266 | + EXPORT TIM16_IRQHandler [WEAK] |
| 267 | + EXPORT TIM17_IRQHandler [WEAK] |
| 268 | + EXPORT I2C1_IRQHandler [WEAK] |
| 269 | + EXPORT SPI1_IRQHandler [WEAK] |
| 270 | + EXPORT USART1_IRQHandler [WEAK] |
| 271 | + EXPORT USART2_IRQHandler [WEAK] |
| 272 | + EXPORT Reserved1_IRQHandler [WEAK] |
| 273 | + EXPORT Reserved8_IRQHandler [WEAK] |
| 274 | + EXPORT Reserved15_IRQHandler [WEAK] |
| 275 | + EXPORT Reserved17_IRQHandler [WEAK] |
| 276 | + EXPORT Reserved18_IRQHandler [WEAK] |
| 277 | + EXPORT Reserved20_IRQHandler [WEAK] |
| 278 | + EXPORT Reserved24_IRQHandler [WEAK] |
| 279 | + EXPORT Reserved26_IRQHandler [WEAK] |
| 280 | + EXPORT Reserved29_IRQHandler [WEAK] |
| 281 | + EXPORT Reserved30_IRQHandler [WEAK] |
| 282 | + EXPORT Reserved31_IRQHandler [WEAK] |
| 283 | + |
| 284 | +WWDG_IRQHandler |
| 285 | +RTC_IRQHandler |
| 286 | +FLASH_IRQHandler |
| 287 | +RCC_IRQHandler |
| 288 | +EXTI0_1_IRQHandler |
| 289 | +EXTI2_3_IRQHandler |
| 290 | +EXTI4_15_IRQHandler |
| 291 | +DMA1_Channel1_IRQHandler |
| 292 | +DMA1_Channel2_3_IRQHandler |
| 293 | +DMAMUX1_IRQHandler |
| 294 | +ADC1_IRQHandler |
| 295 | +TIM1_BRK_UP_TRG_COM_IRQHandler |
| 296 | +TIM1_CC_IRQHandler |
| 297 | +TIM3_IRQHandler |
| 298 | +TIM14_IRQHandler |
| 299 | +TIM16_IRQHandler |
| 300 | +TIM17_IRQHandler |
| 301 | +I2C1_IRQHandler |
| 302 | +SPI1_IRQHandler |
| 303 | +USART1_IRQHandler |
| 304 | +USART2_IRQHandler |
| 305 | +Reserved1_IRQHandler |
| 306 | +Reserved8_IRQHandler |
| 307 | +Reserved15_IRQHandler |
| 308 | +Reserved17_IRQHandler |
| 309 | +Reserved18_IRQHandler |
| 310 | +Reserved20_IRQHandler |
| 311 | +Reserved24_IRQHandler |
| 312 | +Reserved26_IRQHandler |
| 313 | +Reserved29_IRQHandler |
| 314 | +Reserved30_IRQHandler |
| 315 | +Reserved31_IRQHandler |
| 316 | + CPSID i ; disable all interrupts |
| 317 | + LDR r0,=str_Undefined |
| 318 | + MOVS r1,#1 |
| 319 | + LDR r2,=__initial_sp ; re-set the SP in case of stack overflow |
| 320 | + MOV sp,r2 |
| 321 | + LDR r2,=assert_failed |
| 322 | + BX r2 |
| 323 | +str_Undefined |
| 324 | + DCB "Undefined" |
| 325 | + ALIGN |
| 326 | + ENDP |
| 327 | + |
| 328 | + ALIGN ; make sure the end of this section is aligned |
| 329 | + |
| 330 | +;****************************************************************************** |
| 331 | +; The function expected of the C library startup code for defining the stack |
| 332 | +; and heap memory locations. For the C library version of the startup code, |
| 333 | +; provide this function so that the C library initialization code can find out |
| 334 | +; the location of the stack and heap. |
| 335 | +; |
| 336 | + IF :DEF: __MICROLIB |
| 337 | + EXPORT __initial_sp |
| 338 | + EXPORT __stack_limit |
| 339 | + EXPORT __heap_base |
| 340 | + EXPORT __heap_limit |
| 341 | + ELSE |
| 342 | + IMPORT __use_two_region_memory |
| 343 | + EXPORT __user_initial_stackheap |
| 344 | + |
| 345 | +__user_initial_stackheap PROC |
| 346 | + LDR R0, =__heap_base |
| 347 | + LDR R1, =__stack_limit |
| 348 | + LDR R2, =__heap_limit |
| 349 | + LDR R3, =__stack_base |
| 350 | + BX LR |
| 351 | + ENDP |
| 352 | + ENDIF |
| 353 | + ALIGN ; make sure the end of this section is aligned |
| 354 | + |
| 355 | + END ; end of module |
| 356 | + |
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