From c93184d3703aff6856107d173357a23b60c8cb81 Mon Sep 17 00:00:00 2001 From: Dr Maxim Orlovsky Date: Sat, 16 Dec 2023 19:16:46 +0100 Subject: [PATCH 1/6] schema: improve display for typed values --- src/schema/operations.rs | 4 ++-- src/schema/schema.rs | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/schema/operations.rs b/src/schema/operations.rs index a5ea98c4..855e9e1d 100644 --- a/src/schema/operations.rs +++ b/src/schema/operations.rs @@ -29,7 +29,7 @@ use crate::LIB_NAME_RGB; #[derive(Wrapper, Copy, Clone, Ord, PartialOrd, Eq, PartialEq, Hash, Debug, From, Display)] #[wrapper(FromStr, LowerHex, UpperHex)] -#[display(LowerHex)] +#[display("0x{0:04X}")] #[derive(StrictType, StrictDumb, StrictEncode, StrictDecode)] #[strict_type(lib = LIB_NAME_RGB)] #[cfg_attr( @@ -46,7 +46,7 @@ impl AssignmentType { #[derive(Wrapper, Copy, Clone, Ord, PartialOrd, Eq, PartialEq, Hash, Debug, From, Display)] #[wrapper(FromStr, LowerHex, UpperHex)] -#[display(LowerHex)] +#[display("0x{0:04X}")] #[derive(StrictType, StrictDumb, StrictEncode, StrictDecode)] #[strict_type(lib = LIB_NAME_RGB)] #[cfg_attr( diff --git a/src/schema/schema.rs b/src/schema/schema.rs index 46ffe21b..b5440d8e 100644 --- a/src/schema/schema.rs +++ b/src/schema/schema.rs @@ -39,7 +39,7 @@ use crate::{Ffv, GlobalStateSchema, Occurrences, LIB_NAME_RGB}; #[derive(Wrapper, Copy, Clone, Ord, PartialOrd, Eq, PartialEq, Hash, Debug, From, Display)] #[wrapper(FromStr, LowerHex, UpperHex)] -#[display(LowerHex)] +#[display("0x{0:04X}")] #[derive(StrictType, StrictDumb, StrictEncode, StrictDecode)] #[strict_type(lib = LIB_NAME_RGB)] #[cfg_attr( @@ -54,7 +54,7 @@ impl GlobalStateType { #[derive(Wrapper, Copy, Clone, Ord, PartialOrd, Eq, PartialEq, Hash, Debug, From, Display)] #[wrapper(FromStr, LowerHex, UpperHex)] -#[display(LowerHex)] +#[display("0x{0:04X}")] #[derive(StrictType, StrictDumb, StrictEncode, StrictDecode)] #[strict_type(lib = LIB_NAME_RGB)] #[derive(CommitEncode)] @@ -70,7 +70,7 @@ impl ExtensionType { #[derive(Wrapper, Copy, Clone, Ord, PartialOrd, Eq, PartialEq, Hash, Debug, From, Display)] #[wrapper(FromStr, LowerHex, UpperHex)] -#[display(LowerHex)] +#[display("0x{0:04X}")] #[derive(StrictType, StrictDumb, StrictEncode, StrictDecode)] #[strict_type(lib = LIB_NAME_RGB)] #[derive(CommitEncode)] From d1f97047a71374363f760a85103fdb52a2969578 Mon Sep 17 00:00:00 2001 From: Dr Maxim Orlovsky Date: Sat, 16 Dec 2023 19:49:52 +0100 Subject: [PATCH 2/6] schema: add Script::as_alu_script method --- src/schema/script.rs | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/schema/script.rs b/src/schema/script.rs index 1fd4356d..77e50bbe 100644 --- a/src/schema/script.rs +++ b/src/schema/script.rs @@ -69,4 +69,9 @@ impl Script { Script::AluVM(_) => VmType::AluVM, } } + + pub fn as_alu_script(&self) -> &AluScript { + let Script::AluVM(alu) = self; + alu + } } From b973bc4b464a43258e9d92824b0d665b56eb696c Mon Sep 17 00:00:00 2001 From: Dr Maxim Orlovsky Date: Sat, 16 Dec 2023 23:59:47 +0100 Subject: [PATCH 3/6] vm: support updated AluVM debugger --- Cargo.lock | 28 +++++++------- Cargo.toml | 1 + src/vm/isa.rs | 20 +++++++++- src/vm/op_contract.rs | 87 +++++++++++++++++++++++++++++------------- src/vm/op_timechain.rs | 8 +++- src/vm/runtime.rs | 2 +- 6 files changed, 100 insertions(+), 46 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 808de33c..6f9d3752 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -5,8 +5,7 @@ version = 3 [[package]] name = "aluvm" version = "0.11.0-beta.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "134a93e142c6aabca39c69c501c7d34ec99b04a5cb25738e1c0d1382f14b02a1" +source = "git+https://github.com/AluVM/rust-aluvm?branch=v0.11#4077ebb1e68aaf42e6fa721d503db6cf236be52f" dependencies = [ "amplify", "baid58", @@ -65,11 +64,12 @@ dependencies = [ [[package]] name = "amplify_num" -version = "0.5.0" +version = "0.5.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ddce3bc63e807ea02065e8d8b702695f3d302ae4158baddff8b0ce5c73947251" +checksum = "9681187211554ab98f138ba159e90861b136c20afc680dcff2ba82d020721e27" dependencies = [ "serde", + "wasm-bindgen", ] [[package]] @@ -195,7 +195,7 @@ dependencies = [ [[package]] name = "bp-consensus" version = "0.11.0-beta.2" -source = "git+https://github.com/BP-WG/bp-core?branch=v0.11#ea4e7c753cecfeabe252916a3c9651719364e70c" +source = "git+https://github.com/BP-WG/bp-core?branch=v0.11#14175ef6668ccbdc15a33d6b94926b0ea663a8d6" dependencies = [ "amplify", "chrono", @@ -209,7 +209,7 @@ dependencies = [ [[package]] name = "bp-core" version = "0.11.0-beta.1" -source = "git+https://github.com/BP-WG/bp-core?branch=v0.11#ea4e7c753cecfeabe252916a3c9651719364e70c" +source = "git+https://github.com/BP-WG/bp-core?branch=v0.11#14175ef6668ccbdc15a33d6b94926b0ea663a8d6" dependencies = [ "amplify", "bp-consensus", @@ -225,7 +225,7 @@ dependencies = [ [[package]] name = "bp-dbc" version = "0.11.0-beta.1" -source = "git+https://github.com/BP-WG/bp-core?branch=v0.11#ea4e7c753cecfeabe252916a3c9651719364e70c" +source = "git+https://github.com/BP-WG/bp-core?branch=v0.11#14175ef6668ccbdc15a33d6b94926b0ea663a8d6" dependencies = [ "amplify", "base85", @@ -239,7 +239,7 @@ dependencies = [ [[package]] name = "bp-seals" version = "0.11.0-beta.1" -source = "git+https://github.com/BP-WG/bp-core?branch=v0.11#ea4e7c753cecfeabe252916a3c9651719364e70c" +source = "git+https://github.com/BP-WG/bp-core?branch=v0.11#14175ef6668ccbdc15a33d6b94926b0ea663a8d6" dependencies = [ "amplify", "baid58", @@ -858,18 +858,18 @@ dependencies = [ [[package]] name = "thiserror" -version = "1.0.50" +version = "1.0.51" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f9a7210f5c9a7156bb50aa36aed4c95afb51df0df00713949448cf9e97d382d2" +checksum = "f11c217e1416d6f036b870f14e0413d480dbf28edbee1f877abaf0206af43bb7" dependencies = [ "thiserror-impl", ] [[package]] name = "thiserror-impl" -version = "1.0.50" +version = "1.0.51" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "266b2e40bc00e5a6c09c3584011e08b06f123c00362c92b975ba9843aaaa14b8" +checksum = "01742297787513b79cf8e29d1056ede1313e2420b7b3b15d0a768b4921f549df" dependencies = [ "proc-macro2", "quote", @@ -924,9 +924,9 @@ checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b" [[package]] name = "unsafe-libyaml" -version = "0.2.9" +version = "0.2.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f28467d3e1d3c6586d8f25fa243f544f5800fec42d97032474e17222c2b75cfa" +checksum = "ab4c90930b95a82d00dc9e9ac071b4991924390d46cbd0dfe566148667605e4b" [[package]] name = "version_check" diff --git a/Cargo.toml b/Cargo.toml index 7c9a757c..192b016c 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -65,3 +65,4 @@ bp-consensus = { git = "https://github.com/BP-WG/bp-core", branch = "v0.11" } bp-dbc = { git = "https://github.com/BP-WG/bp-core", branch = "v0.11" } bp-seals = { git = "https://github.com/BP-WG/bp-core", branch = "v0.11" } bp-core = { git = "https://github.com/BP-WG/bp-core", branch = "v0.11" } +aluvm = { git = "https://github.com/AluVM/rust-aluvm", branch = "v0.11" } diff --git a/src/vm/isa.rs b/src/vm/isa.rs index cb4bdbc8..00a7ec27 100644 --- a/src/vm/isa.rs +++ b/src/vm/isa.rs @@ -20,13 +20,13 @@ // See the License for the specific language governing permissions and // limitations under the License. -use std::collections::BTreeSet; +use std::collections::{BTreeSet, HashSet}; use std::ops::RangeInclusive; use aluvm::isa; use aluvm::isa::{Bytecode, BytecodeError, ExecStep, InstructionSet}; use aluvm::library::{CodeEofError, LibSite, Read, Write}; -use aluvm::reg::CoreRegs; +use aluvm::reg::{CoreRegs, Reg}; use super::{ContractOp, TimechainOp}; use crate::validation::OpInfo; @@ -52,6 +52,22 @@ impl InstructionSet for RgbIsa { bset! {"RGB"} } + fn src_regs(&self) -> HashSet { + match self { + RgbIsa::Contract(op) => op.src_regs(), + RgbIsa::Timechain(op) => op.src_regs(), + RgbIsa::Fail(_) => set![], + } + } + + fn dst_regs(&self) -> HashSet { + match self { + RgbIsa::Contract(op) => op.dst_regs(), + RgbIsa::Timechain(op) => op.dst_regs(), + RgbIsa::Fail(_) => set![], + } + } + fn exec(&self, regs: &mut CoreRegs, site: LibSite, context: &Self::Context<'_>) -> ExecStep { match self { RgbIsa::Contract(op) => op.exec(regs, site, context), diff --git a/src/vm/op_contract.rs b/src/vm/op_contract.rs index 08e57076..f1ff3c9f 100644 --- a/src/vm/op_contract.rs +++ b/src/vm/op_contract.rs @@ -22,13 +22,13 @@ #![allow(clippy::unusual_byte_groupings)] -use std::collections::BTreeSet; +use std::collections::{BTreeSet, HashSet}; use std::ops::RangeInclusive; use aluvm::isa::{Bytecode, BytecodeError, ExecStep, InstructionSet}; use aluvm::library::{CodeEofError, LibSite, Read, Write}; -use aluvm::reg::{CoreRegs, Reg16, RegA, RegS}; -use amplify::num::u4; +use aluvm::reg::{CoreRegs, Reg, Reg32, RegA, RegS}; +use amplify::num::{u3, u4}; use amplify::Wrapper; use commit_verify::CommitVerify; use strict_encoding::StrictSerialize; @@ -45,22 +45,22 @@ pub enum ContractOp { /// Counts number of inputs (previous state entries) of the provided type /// and puts the number to the destination `a16` register. #[display("cnp {0},a16{1}")] - CnP(AssignmentType, Reg16), + CnP(AssignmentType, Reg32), /// Counts number of outputs (owned state entries) of the provided type /// and puts the number to the destination `a16` register. #[display("cns {0},a16{1}")] - CnS(AssignmentType, Reg16), + CnS(AssignmentType, Reg32), /// Counts number of global state items of the provided type affected by the /// current operation and puts the number to the destination `a8` register. #[display("cng {0},a8{1}")] - CnG(GlobalStateType, Reg16), + CnG(GlobalStateType, Reg32), /// Counts number of global state items of the provided type in the contract /// state and puts the number to the destination `a16` register. #[display("cnc {0},a16{1}")] - CnC(AssignmentType, Reg16), + CnC(AssignmentType, Reg32), /// Loads input (previous) state with type id from the first argument and /// index from the second argument into a register provided in the third @@ -93,7 +93,7 @@ pub enum ContractOp { /// /// If the state at the index is concealed, sets destination to `None`. #[display("ldf {0},{1},a64{2}")] - LdF(AssignmentType, u16, Reg16), + LdF(AssignmentType, u16, Reg32), /// Loads global state from the current operation with type id from the /// first argument and index from the second argument into a register @@ -158,6 +158,35 @@ impl InstructionSet for ContractOp { fn isa_ids() -> BTreeSet<&'static str> { none!() } + fn src_regs(&self) -> HashSet { set![] } + + fn dst_regs(&self) -> HashSet { + match self { + ContractOp::CnP(_, reg) | + ContractOp::CnS(_, reg) | + ContractOp::CnG(_, reg) | + ContractOp::CnC(_, reg) => { + set![Reg::A(RegA::A16, *reg)] + } + ContractOp::LdF(_, _, reg) => { + set![Reg::A(RegA::A64, *reg)] + } + ContractOp::LdP(_, _, reg) | + ContractOp::LdS(_, _, reg) | + ContractOp::LdG(_, _, reg) | + ContractOp::LdC(_, _, reg) | + ContractOp::LdM(reg) => { + set![Reg::S(*reg)] + } + + ContractOp::PcVs(_) | ContractOp::PcCs(_, _) => { + set![] + } + + ContractOp::Fail(_) => set![], + } + } + fn exec(&self, regs: &mut CoreRegs, _site: LibSite, context: &Self::Context<'_>) -> ExecStep { macro_rules! fail { () => {{ @@ -204,17 +233,21 @@ impl InstructionSet for ContractOp { match self { ContractOp::CnP(state_type, reg) => { - regs.set(RegA::A16, *reg, context.prev_state.get(state_type).map(|a| a.len_u16())); + regs.set_n( + RegA::A16, + *reg, + context.prev_state.get(state_type).map(|a| a.len_u16()), + ); } ContractOp::CnS(state_type, reg) => { - regs.set( + regs.set_n( RegA::A16, *reg, context.owned_state.get(*state_type).map(|a| a.len_u16()), ); } ContractOp::CnG(state_type, reg) => { - regs.set(RegA::A16, *reg, context.global.get(state_type).map(|a| a.len_u16())); + regs.set_n(RegA::A16, *reg, context.global.get(state_type).map(|a| a.len_u16())); } ContractOp::CnC(_state_type, _reg) => { // TODO: implement global contract state @@ -256,7 +289,7 @@ impl InstructionSet for ContractOp { else { fail!() }; - regs.set(RegA::A64, *reg, state.map(|s| s.value.as_u64())); + regs.set_n(RegA::A64, *reg, state.map(|s| s.value.as_u64())); } ContractOp::LdG(state_type, index, reg) => { let Some(state) = context @@ -376,23 +409,23 @@ impl Bytecode for ContractOp { match self { ContractOp::CnP(state_type, reg) => { writer.write_u16(*state_type)?; - writer.write_u4(reg)?; - writer.write_u4(u4::ZERO)?; + writer.write_u5(reg)?; + writer.write_u3(u3::ZERO)?; } ContractOp::CnS(state_type, reg) => { writer.write_u16(*state_type)?; - writer.write_u4(reg)?; - writer.write_u4(u4::ZERO)?; + writer.write_u5(reg)?; + writer.write_u3(u3::ZERO)?; } ContractOp::CnG(state_type, reg) => { writer.write_u16(*state_type)?; - writer.write_u4(reg)?; - writer.write_u4(u4::ZERO)?; + writer.write_u5(reg)?; + writer.write_u3(u3::ZERO)?; } ContractOp::CnC(state_type, reg) => { writer.write_u16(*state_type)?; - writer.write_u4(reg)?; - writer.write_u4(u4::ZERO)?; + writer.write_u5(reg)?; + writer.write_u3(u3::ZERO)?; } ContractOp::LdP(state_type, index, reg) => { writer.write_u16(*state_type)?; @@ -409,8 +442,8 @@ impl Bytecode for ContractOp { ContractOp::LdF(state_type, index, reg) => { writer.write_u16(*state_type)?; writer.write_u16(*index)?; - writer.write_u4(reg)?; - writer.write_u4(u4::ZERO)?; + writer.write_u5(reg)?; + writer.write_u3(u3::ZERO)?; } ContractOp::LdG(state_type, index, reg) => { writer.write_u16(*state_type)?; @@ -447,22 +480,22 @@ impl Bytecode for ContractOp { { Ok(match reader.read_u8()? { INSTR_CNP => { - let i = Self::CnP(reader.read_u16()?.into(), reader.read_u4()?.into()); + let i = Self::CnP(reader.read_u16()?.into(), reader.read_u5()?.into()); reader.read_u4()?; // Discard garbage bits i } INSTR_CNS => { - let i = Self::CnS(reader.read_u16()?.into(), reader.read_u4()?.into()); + let i = Self::CnS(reader.read_u16()?.into(), reader.read_u5()?.into()); reader.read_u4()?; // Discard garbage bits i } INSTR_CNG => { - let i = Self::CnG(reader.read_u16()?.into(), reader.read_u4()?.into()); + let i = Self::CnG(reader.read_u16()?.into(), reader.read_u5()?.into()); reader.read_u4()?; // Discard garbage bits i } INSTR_CNC => { - let i = Self::CnC(reader.read_u16()?.into(), reader.read_u4()?.into()); + let i = Self::CnC(reader.read_u16()?.into(), reader.read_u5()?.into()); reader.read_u4()?; // Discard garbage bits i } @@ -489,7 +522,7 @@ impl Bytecode for ContractOp { let i = Self::LdF( reader.read_u16()?.into(), reader.read_u16()?, - reader.read_u4()?.into(), + reader.read_u5()?.into(), ); reader.read_u4()?; // Discard garbage bits i diff --git a/src/vm/op_timechain.rs b/src/vm/op_timechain.rs index fffd4363..aae131b6 100644 --- a/src/vm/op_timechain.rs +++ b/src/vm/op_timechain.rs @@ -20,12 +20,12 @@ // See the License for the specific language governing permissions and // limitations under the License. -use std::collections::BTreeSet; +use std::collections::{BTreeSet, HashSet}; use std::ops::RangeInclusive; use aluvm::isa::{Bytecode, BytecodeError, ExecStep, InstructionSet}; use aluvm::library::{CodeEofError, LibSite, Read, Write}; -use aluvm::reg::CoreRegs; +use aluvm::reg::{CoreRegs, Reg}; use crate::vm::opcodes::{INSTR_TIMECHAIN_FROM, INSTR_TIMECHAIN_TO}; @@ -43,6 +43,10 @@ impl InstructionSet for TimechainOp { fn isa_ids() -> BTreeSet<&'static str> { none!() } + fn src_regs(&self) -> HashSet { set![] } + + fn dst_regs(&self) -> HashSet { set![] } + fn exec(&self, regs: &mut CoreRegs, _site: LibSite, _context: &Self::Context<'_>) -> ExecStep { match self { TimechainOp::Fail => { diff --git a/src/vm/runtime.rs b/src/vm/runtime.rs index ed4d908b..4595fa0e 100644 --- a/src/vm/runtime.rs +++ b/src/vm/runtime.rs @@ -86,7 +86,7 @@ impl<'script> AluRuntime<'script> { let mut vm = Vm::>::new(); for ((reg, idx), val) in ®s.nums { - vm.registers.set(*reg, *idx, *val); + vm.registers.set_n(*reg, *idx, *val); } for (reg, val) in ®s.data { vm.registers.set_s( From 5547a093612888c0dec52c7e43330f813e8c8890 Mon Sep 17 00:00:00 2001 From: Dr Maxim Orlovsky Date: Sun, 17 Dec 2023 01:48:22 +0100 Subject: [PATCH 4/6] vm: fix serialization of state data --- src/vm/op_contract.rs | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/src/vm/op_contract.rs b/src/vm/op_contract.rs index f1ff3c9f..660bcb9f 100644 --- a/src/vm/op_contract.rs +++ b/src/vm/op_contract.rs @@ -31,7 +31,6 @@ use aluvm::reg::{CoreRegs, Reg, Reg32, RegA, RegS}; use amplify::num::{u3, u4}; use amplify::Wrapper; use commit_verify::CommitVerify; -use strict_encoding::StrictSerialize; use super::opcodes::*; use crate::validation::OpInfo; @@ -261,10 +260,7 @@ impl InstructionSet for ContractOp { else { fail!() }; - let state = state.map(|s| { - s.to_strict_serialized::<{ u16::MAX as usize }>() - .expect("type guarantees") - }); + let state = state.map(|s| s.to_inner()); regs.set_s(*reg, state); } ContractOp::LdS(state_type, index, reg) => { @@ -275,10 +271,7 @@ impl InstructionSet for ContractOp { else { fail!() }; - let state = state.map(|s| { - s.to_strict_serialized::<{ u16::MAX as usize }>() - .expect("type guarantees") - }); + let state = state.map(|s| s.to_inner()); regs.set_s(*reg, state); } ContractOp::LdF(state_type, index, reg) => { From 1612b680cb6785331d06888a16d397584ecd28e0 Mon Sep 17 00:00:00 2001 From: Dr Maxim Orlovsky Date: Sun, 17 Dec 2023 10:36:40 +0100 Subject: [PATCH 5/6] vm: provide macro assembly in-line compiler --- Cargo.lock | 2 +- src/vm/macroasm.rs | 39 +++++++++++++++++++++++++++++++++++++++ src/vm/mod.rs | 3 +++ 3 files changed, 43 insertions(+), 1 deletion(-) create mode 100644 src/vm/macroasm.rs diff --git a/Cargo.lock b/Cargo.lock index 6f9d3752..2f969970 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -5,7 +5,7 @@ version = 3 [[package]] name = "aluvm" version = "0.11.0-beta.1" -source = "git+https://github.com/AluVM/rust-aluvm?branch=v0.11#4077ebb1e68aaf42e6fa721d503db6cf236be52f" +source = "git+https://github.com/AluVM/rust-aluvm?branch=v0.11#34894fe14cbbd3312122a7854072056756798a03" dependencies = [ "amplify", "baid58", diff --git a/src/vm/macroasm.rs b/src/vm/macroasm.rs new file mode 100644 index 00000000..0aa25aed --- /dev/null +++ b/src/vm/macroasm.rs @@ -0,0 +1,39 @@ +// RGB Core Library: consensus layer for RGB smart contracts. +// +// SPDX-License-Identifier: Apache-2.0 +// +// Written in 2019-2023 by +// Dr Maxim Orlovsky +// +// Copyright (C) 2019-2023 LNP/BP Standards Association. All rights reserved. +// Copyright (C) 2019-2023 Dr Maxim Orlovsky. All rights reserved. +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#[macro_export] +macro_rules! rgbasm { + ($( $tt:tt )+) => {{ #[allow(unused_imports)] { + use $crate::vm::{RgbIsa, ContractOp, TimechainOp}; + use $crate::vm::aluasm_isa; + use $crate::isa_instr; + aluasm_isa! { RgbIsa => $( $tt )+ } + } }}; +} + +#[macro_export] +macro_rules! isa_instr { + (ldg $t:literal, $no:literal,s16[$s_idx:literal]) => {{ RgbIsa::Contract(ContractOp::LdG($t.into(), $no, RegS::from($s_idx))) }}; + (lds $t:literal, $no:literal,s16[$s_idx:literal]) => {{ RgbIsa::Contract(ContractOp::LdS($t.into(), $no, RegS::from($s_idx))) }}; + (ldp $t:literal, $no:literal,s16[$s_idx:literal]) => {{ RgbIsa::Contract(ContractOp::LdP($t.into(), $no, RegS::from($s_idx))) }}; + ($op:ident $($tt:tt)+) => {{ compile_error!(concat!("unknown RGB assembly opcode `", stringify!($op), "`")) }}; +} diff --git a/src/vm/mod.rs b/src/vm/mod.rs index b4b43fd2..f535a188 100644 --- a/src/vm/mod.rs +++ b/src/vm/mod.rs @@ -30,7 +30,10 @@ mod op_contract; mod op_timechain; mod script; mod runtime; +#[macro_use] +mod macroasm; +pub use aluvm::aluasm_isa; pub use isa::RgbIsa; pub use op_contract::ContractOp; pub use op_timechain::TimechainOp; From 709363e951aee34cee1ad89d16b2cbe250eb3b48 Mon Sep 17 00:00:00 2001 From: Dr Maxim Orlovsky Date: Sun, 17 Dec 2023 10:58:20 +0100 Subject: [PATCH 6/6] vm: add support for pedersen validation in rgb macro assembly --- src/vm/macroasm.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/vm/macroasm.rs b/src/vm/macroasm.rs index 0aa25aed..cf996f46 100644 --- a/src/vm/macroasm.rs +++ b/src/vm/macroasm.rs @@ -32,6 +32,8 @@ macro_rules! rgbasm { #[macro_export] macro_rules! isa_instr { + (pcvs $no:literal) => {{ RgbIsa::Contract(ContractOp::PcVs($no.into())) }}; + (pccs $no1:literal, $no2:literal) => {{ RgbIsa::Contract(ContractOp::PcCs($no1.into(), $no2.into())) }}; (ldg $t:literal, $no:literal,s16[$s_idx:literal]) => {{ RgbIsa::Contract(ContractOp::LdG($t.into(), $no, RegS::from($s_idx))) }}; (lds $t:literal, $no:literal,s16[$s_idx:literal]) => {{ RgbIsa::Contract(ContractOp::LdS($t.into(), $no, RegS::from($s_idx))) }}; (ldp $t:literal, $no:literal,s16[$s_idx:literal]) => {{ RgbIsa::Contract(ContractOp::LdP($t.into(), $no, RegS::from($s_idx))) }};