Update changelog for 0.11.3 release and update copyright year.

Author: fdxmw

CHANGELOG.md

@@ -6,6 +6,26 @@ releases published to PyPI are tracked here. No release candidates!
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
+## [0.11.3] - 2025-06-12
+
+### Added
+
+- An optimization pass to [optimize inverter chains](https://github.com/UCSBarchlab/PyRTL/blob/d5f8dbe53f54e61e1d54722449e4894b885243c7/pyrtl/passes.py#L130)
+- `one_hot_to_binary` encoder ([documentation](https://pyrtl.readthedocs.io/en/latest/helpers.html#pyrtl.helperfuncs.one_hot_to_binary))
+- `binary_to_one_hot` decoder ([documentation](https://pyrtl.readthedocs.io/en/latest/helpers.html#pyrtl.helperfuncs.binary_to_one_hot))
+
+### Changed
+
+- More support for signed integers: Signed integers can now be used in `RomBlock`'s
+  `romdata`, `Simulation`'s `mem_value_map`, and Verilog-style register reset values.
+- Improved documentation:
+  - [conditional_assignment](https://pyrtl.readthedocs.io/en/latest/basic.html#module-pyrtl.conditional)
+  - [WireVector equality](https://pyrtl.readthedocs.io/en/latest/basic.html#wirevector-equality)
+
+### Fixed
+
+- Use iteration instead of recursion to avoid stack overflow in `find_producer`.
+
 ## [0.11.2] - 2024-07-16
 
 ### Added

docs/conf.py

@@ -18,7 +18,7 @@
 # -- Project information -----------------------------------------------------
 
 project = 'PyRTL'
-copyright = '2024, Timothy Sherwood'
+copyright = '2025, Timothy Sherwood'
 author = 'Timothy Sherwood'
 
 # -- General configuration ---------------------------------------------------