diff --git a/vunit/sim_if/activehdl.py b/vunit/sim_if/activehdl.py
index 8782ae2b0..c496a350d 100644
--- a/vunit/sim_if/activehdl.py
+++ b/vunit/sim_if/activehdl.py
@@ -109,7 +109,7 @@ def _std_str(vhdl_standard):
         """
         Convert standard to format of Active-HDL command line flag
         """
-        if vhdl_standard <= VHDL.STD_2019:
+        if vhdl_standard <= VHDL.STD_2008:
             return f"-{vhdl_standard!s}"
 
         raise ValueError(f"Invalid VHDL standard {vhdl_standard!s}")