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[AutoBump] Merge with a6bb8a7 (Jan 20)
2 parents c657267 + a6bb8a7 commit 5558ce1

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13 files changed

+248
-6
lines changed

13 files changed

+248
-6
lines changed

‎clang/lib/AST/ByteCode/Compiler.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -253,6 +253,9 @@ bool Compiler<Emitter>::VisitCastExpr(const CastExpr *CE) {
253253

254254
case CK_UncheckedDerivedToBase:
255255
case CK_DerivedToBase: {
256+
if (DiscardResult)
257+
return this->discard(SubExpr);
258+
256259
if (!this->delegate(SubExpr))
257260
return false;
258261

@@ -282,6 +285,9 @@ bool Compiler<Emitter>::VisitCastExpr(const CastExpr *CE) {
282285
}
283286

284287
case CK_BaseToDerived: {
288+
if (DiscardResult)
289+
return this->discard(SubExpr);
290+
285291
if (!this->delegate(SubExpr))
286292
return false;
287293

‎clang/test/AST/ByteCode/records.cpp

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1684,3 +1684,18 @@ namespace ExplicitThisInTemporary {
16841684
constexpr bool g(B b) { return &b == b.p; }
16851685
static_assert(g({}), "");
16861686
}
1687+
1688+
namespace IgnoredMemberExpr {
1689+
class A {
1690+
public:
1691+
int a;
1692+
};
1693+
class B : public A {
1694+
public:
1695+
constexpr int foo() {
1696+
a; // both-warning {{expression result unused}}
1697+
return 0;
1698+
}
1699+
};
1700+
static_assert(B{}.foo() == 0, "");
1701+
}

‎compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp

Lines changed: 51 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -302,6 +302,9 @@ INTERCEPTOR(int, fpurge, FILE *stream) {
302302
__rtsan_notify_intercepted_call("fpurge");
303303
return REAL(fpurge)(stream);
304304
}
305+
#define RTSAN_MAYBE_INTERCEPT_FPURGE INTERCEPT_FUNCTION(fpurge)
306+
#else
307+
#define RTSAN_MAYBE_INTERCEPT_FPURGE
305308
#endif
306309

307310
INTERCEPTOR(FILE *, fdopen, int fd, const char *mode) {
@@ -840,6 +843,17 @@ INTERCEPTOR(int, getsockname, int socket, struct sockaddr *sa,
840843
#define RTSAN_MAYBE_INTERCEPT_GETSOCKNAME
841844
#endif
842845

846+
#if SANITIZER_INTERCEPT_GETPEERNAME
847+
INTERCEPTOR(int, getpeername, int socket, struct sockaddr *sa,
848+
socklen_t *salen) {
849+
__rtsan_notify_intercepted_call("getpeername");
850+
return REAL(getpeername)(socket, sa, salen);
851+
}
852+
#define RTSAN_MAYBE_INTERCEPT_GETPEERNAME INTERCEPT_FUNCTION(getpeername)
853+
#else
854+
#define RTSAN_MAYBE_INTERCEPT_GETPEERNAME
855+
#endif
856+
843857
INTERCEPTOR(int, bind, int socket, const struct sockaddr *address,
844858
socklen_t address_len) {
845859
__rtsan_notify_intercepted_call("bind");
@@ -879,6 +893,17 @@ INTERCEPTOR(ssize_t, sendmsg, int socket, const struct msghdr *message,
879893
return REAL(sendmsg)(socket, message, flags);
880894
}
881895

896+
#if SANITIZER_INTERCEPT_SENDMMSG
897+
INTERCEPTOR(int, sendmmsg, int socket, struct mmsghdr *message,
898+
unsigned int len, int flags) {
899+
__rtsan_notify_intercepted_call("sendmmsg");
900+
return REAL(sendmmsg)(socket, message, len, flags);
901+
}
902+
#define RTSAN_MAYBE_INTERCEPT_SENDMMSG INTERCEPT_FUNCTION(sendmmsg)
903+
#else
904+
#define RTSAN_MAYBE_INTERCEPT_SENDMMSG
905+
#endif
906+
882907
INTERCEPTOR(ssize_t, sendto, int socket, const void *buffer, size_t length,
883908
int flags, const struct sockaddr *dest_addr, socklen_t dest_len) {
884909
__rtsan_notify_intercepted_call("sendto");
@@ -901,6 +926,17 @@ INTERCEPTOR(ssize_t, recvmsg, int socket, struct msghdr *message, int flags) {
901926
return REAL(recvmsg)(socket, message, flags);
902927
}
903928

929+
#if SANITIZER_INTERCEPT_RECVMMSG
930+
INTERCEPTOR(int, recvmmsg, int socket, struct mmsghdr *message,
931+
unsigned int len, int flags, struct timespec *timeout) {
932+
__rtsan_notify_intercepted_call("recvmmsg");
933+
return REAL(recvmmsg)(socket, message, len, flags, timeout);
934+
}
935+
#define RTSAN_MAYBE_INTERCEPT_RECVMMSG INTERCEPT_FUNCTION(recvmmsg)
936+
#else
937+
#define RTSAN_MAYBE_INTERCEPT_RECVMMSG
938+
#endif
939+
904940
INTERCEPTOR(int, shutdown, int socket, int how) {
905941
__rtsan_notify_intercepted_call("shutdown");
906942
return REAL(shutdown)(socket, how);
@@ -1031,6 +1067,16 @@ INTERCEPTOR(int, pipe, int pipefd[2]) {
10311067
return REAL(pipe)(pipefd);
10321068
}
10331069

1070+
#if !SANITIZER_APPLE
1071+
INTERCEPTOR(int, pipe2, int pipefd[2], int flags) {
1072+
__rtsan_notify_intercepted_call("pipe2");
1073+
return REAL(pipe2)(pipefd, flags);
1074+
}
1075+
#define RTSAN_MAYBE_INTERCEPT_PIPE2 INTERCEPT_FUNCTION(pipe2)
1076+
#else
1077+
#define RTSAN_MAYBE_INTERCEPT_PIPE2
1078+
#endif
1079+
10341080
INTERCEPTOR(int, mkfifo, const char *pathname, mode_t mode) {
10351081
__rtsan_notify_intercepted_call("mkfifo");
10361082
return REAL(mkfifo)(pathname, mode);
@@ -1133,6 +1179,8 @@ void __rtsan::InitializeInterceptors() {
11331179
INTERCEPT_FUNCTION(puts);
11341180
INTERCEPT_FUNCTION(fputs);
11351181
INTERCEPT_FUNCTION(fflush);
1182+
RTSAN_MAYBE_INTERCEPT_FPURGE;
1183+
RTSAN_MAYBE_INTERCEPT_PIPE2;
11361184
INTERCEPT_FUNCTION(fdopen);
11371185
INTERCEPT_FUNCTION(freopen);
11381186
RTSAN_MAYBE_INTERCEPT_FOPENCOOKIE;
@@ -1194,13 +1242,16 @@ void __rtsan::InitializeInterceptors() {
11941242
INTERCEPT_FUNCTION(recv);
11951243
INTERCEPT_FUNCTION(recvfrom);
11961244
INTERCEPT_FUNCTION(recvmsg);
1245+
RTSAN_MAYBE_INTERCEPT_RECVMMSG;
11971246
INTERCEPT_FUNCTION(send);
11981247
INTERCEPT_FUNCTION(sendmsg);
1248+
RTSAN_MAYBE_INTERCEPT_SENDMMSG;
11991249
INTERCEPT_FUNCTION(sendto);
12001250
INTERCEPT_FUNCTION(shutdown);
12011251
INTERCEPT_FUNCTION(socket);
12021252
RTSAN_MAYBE_INTERCEPT_ACCEPT4;
12031253
RTSAN_MAYBE_INTERCEPT_GETSOCKNAME;
1254+
RTSAN_MAYBE_INTERCEPT_GETPEERNAME;
12041255

12051256
RTSAN_MAYBE_INTERCEPT_SELECT;
12061257
INTERCEPT_FUNCTION(pselect);

‎compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1118,6 +1118,15 @@ TEST(TestRtsanInterceptors, SendmsgToASocketDiesWhenRealtime) {
11181118
ExpectNonRealtimeSurvival(Func);
11191119
}
11201120

1121+
#if SANITIZER_INTERCEPT_SENDMMSG
1122+
TEST(TestRtsanInterceptors, SendmmsgOnASocketDiesWhenRealtime) {
1123+
mmsghdr msg{};
1124+
auto Func = [&]() { sendmmsg(0, &msg, 0, 0); };
1125+
ExpectRealtimeDeath(Func, "sendmmsg");
1126+
ExpectNonRealtimeSurvival(Func);
1127+
}
1128+
#endif
1129+
11211130
TEST(TestRtsanInterceptors, SendtoToASocketDiesWhenRealtime) {
11221131
sockaddr addr{};
11231132
socklen_t len{};
@@ -1147,6 +1156,15 @@ TEST(TestRtsanInterceptors, RecvmsgOnASocketDiesWhenRealtime) {
11471156
ExpectNonRealtimeSurvival(Func);
11481157
}
11491158

1159+
#if SANITIZER_INTERCEPT_RECVMMSG
1160+
TEST(TestRtsanInterceptors, RecvmmsgOnASocketDiesWhenRealtime) {
1161+
mmsghdr msg{};
1162+
auto Func = [&]() { recvmmsg(0, &msg, 0, 0, nullptr); };
1163+
ExpectRealtimeDeath(Func, "recvmmsg");
1164+
ExpectNonRealtimeSurvival(Func);
1165+
}
1166+
#endif
1167+
11501168
TEST(TestRtsanInterceptors, ShutdownOnASocketDiesWhenRealtime) {
11511169
auto Func = [&]() { shutdown(0, 0); };
11521170
ExpectRealtimeDeath(Func, "shutdown");
@@ -1163,6 +1181,16 @@ TEST(TestRtsanInterceptors, GetsocknameOnASocketDiesWhenRealtime) {
11631181
}
11641182
#endif
11651183

1184+
#if SANITIZER_INTERCEPT_GETPEERNAME
1185+
TEST(TestRtsanInterceptors, GetpeernameOnASocketDiesWhenRealtime) {
1186+
sockaddr addr{};
1187+
socklen_t len{};
1188+
auto Func = [&]() { getpeername(0, &addr, &len); };
1189+
ExpectRealtimeDeath(Func, "getpeername");
1190+
ExpectNonRealtimeSurvival(Func);
1191+
}
1192+
#endif
1193+
11661194
/*
11671195
I/O Multiplexing
11681196
*/
@@ -1349,6 +1377,15 @@ TEST(TestRtsanInterceptors, PipeDiesWhenRealtime) {
13491377
ExpectNonRealtimeSurvival(Func);
13501378
}
13511379

1380+
#if !SANITIZER_APPLE
1381+
TEST(TestRtsanInterceptors, Pipe2DiesWhenRealtime) {
1382+
int fds[2];
1383+
auto Func = [&fds]() { pipe2(fds, O_CLOEXEC); };
1384+
ExpectRealtimeDeath(Func, "pipe2");
1385+
ExpectNonRealtimeSurvival(Func);
1386+
}
1387+
#endif
1388+
13521389
#pragma clang diagnostic push
13531390
#pragma clang diagnostic ignored "-Wdeprecated-declarations"
13541391
TEST(TestRtsanInterceptors, SyscallDiesWhenRealtime) {

‎llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -245,6 +245,28 @@ bool LoongArchDAGToDAGISel::selectNonFIBaseAddr(SDValue Addr, SDValue &Base) {
245245
return true;
246246
}
247247

248+
bool LoongArchDAGToDAGISel::SelectAddrRegImm12(SDValue Addr, SDValue &Base,
249+
SDValue &Offset) {
250+
SDLoc DL(Addr);
251+
MVT VT = Addr.getSimpleValueType();
252+
253+
// The address is the result of an ADD. Here we only consider reg+simm12.
254+
if (CurDAG->isBaseWithConstantOffset(Addr)) {
255+
int64_t Imm = cast<ConstantSDNode>(Addr.getOperand(1))->getSExtValue();
256+
if (isInt<12>(Imm)) {
257+
Base = Addr.getOperand(0);
258+
Offset = CurDAG->getTargetConstant(SignExtend64<12>(Imm), DL, VT);
259+
return true;
260+
}
261+
}
262+
263+
// Otherwise, we assume Addr as the base address and use constant 0 as the
264+
// offset.
265+
Base = Addr;
266+
Offset = CurDAG->getTargetConstant(0, DL, VT);
267+
return true;
268+
}
269+
248270
bool LoongArchDAGToDAGISel::selectShiftMask(SDValue N, unsigned ShiftWidth,
249271
SDValue &ShAmt) {
250272
// Shift instructions on LoongArch only read the lower 5 or 6 bits of the

‎llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,7 @@ class LoongArchDAGToDAGISel : public SelectionDAGISel {
4343
bool SelectBaseAddr(SDValue Addr, SDValue &Base);
4444
bool SelectAddrConstant(SDValue Addr, SDValue &Base, SDValue &Offset);
4545
bool selectNonFIBaseAddr(SDValue Addr, SDValue &Base);
46+
bool SelectAddrRegImm12(SDValue Addr, SDValue &Base, SDValue &Offset);
4647

4748
bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt);
4849
bool selectShiftMaskGRLen(SDValue N, SDValue &ShAmt) {

‎llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -99,6 +99,8 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
9999
setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
100100
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
101101

102+
setOperationAction(ISD::PREFETCH, MVT::Other, Legal);
103+
102104
// Expand bitreverse.i16 with native-width bitrev and shift for now, before
103105
// we get to know which of sll and revb.2h is faster.
104106
setOperationAction(ISD::BITREVERSE, MVT::i8, Custom);

‎llvm/lib/Target/LoongArch/LoongArchInstrInfo.td

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -522,6 +522,7 @@ def HI16ForAddu16idAddiPair: SDNodeXForm<imm, [{
522522
def BaseAddr : ComplexPattern<iPTR, 1, "SelectBaseAddr">;
523523
def AddrConstant : ComplexPattern<iPTR, 2, "SelectAddrConstant">;
524524
def NonFIBaseAddr : ComplexPattern<iPTR, 1, "selectNonFIBaseAddr">;
525+
def AddrRegImm : ComplexPattern<iPTR, 2, "SelectAddrRegImm12">;
525526

526527
def fma_nsz : PatFrag<(ops node:$fj, node:$fk, node:$fa),
527528
(fma node:$fj, node:$fk, node:$fa), [{
@@ -2011,6 +2012,14 @@ class PseudoMaskedAMMinMax
20112012
def PseudoMaskedAtomicLoadMax32 : PseudoMaskedAMMinMax;
20122013
def PseudoMaskedAtomicLoadMin32 : PseudoMaskedAMMinMax;
20132014

2015+
// Data prefetch
2016+
2017+
// TODO: Supports for preldx instruction.
2018+
def : Pat<(prefetch (AddrRegImm GPR:$rj, simm12:$imm12), (i32 0), timm, (i32 1)),
2019+
(PRELD 0, GPR:$rj, simm12:$imm12)>; // data prefetch for loads
2020+
def : Pat<(prefetch (AddrRegImm GPR:$rj, simm12:$imm12), (i32 1), timm, (i32 1)),
2021+
(PRELD 8, GPR:$rj, simm12:$imm12)>; // data prefetch for stores
2022+
20142023
/// Compare and exchange
20152024

20162025
class PseudoCmpXchg

‎llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -89,4 +89,10 @@ LoongArchTTIImpl::getPopcntSupport(unsigned TyWidth) {
8989
return ST->hasExtLSX() ? TTI::PSK_FastHardware : TTI::PSK_Software;
9090
}
9191

92+
unsigned LoongArchTTIImpl::getCacheLineSize() const { return 64; }
93+
94+
unsigned LoongArchTTIImpl::getPrefetchDistance() const { return 200; }
95+
96+
bool LoongArchTTIImpl::enableWritePrefetching() const { return true; }
97+
9298
// TODO: Implement more hooks to provide TTI machinery for LoongArch.

‎llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,10 @@ class LoongArchTTIImpl : public BasicTTIImplBase<LoongArchTTIImpl> {
4747
const char *getRegisterClassName(unsigned ClassID) const;
4848
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
4949

50+
unsigned getCacheLineSize() const override;
51+
unsigned getPrefetchDistance() const override;
52+
bool enableWritePrefetching() const override;
53+
5054
// TODO: Implement more hooks to provide TTI machinery for LoongArch.
5155
};
5256

‎llvm/test/CodeGen/LoongArch/preld.ll

Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,67 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2+
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
3+
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64
4+
5+
declare void @llvm.prefetch(ptr, i32, i32, i32)
6+
7+
define void @load_prefetch_no_offset(ptr %a) {
8+
; LA32-LABEL: load_prefetch_no_offset:
9+
; LA32: # %bb.0: # %entry
10+
; LA32-NEXT: preld 0, $a0, 0
11+
; LA32-NEXT: ret
12+
;
13+
; LA64-LABEL: load_prefetch_no_offset:
14+
; LA64: # %bb.0: # %entry
15+
; LA64-NEXT: preld 0, $a0, 0
16+
; LA64-NEXT: ret
17+
entry:
18+
call void @llvm.prefetch(ptr %a, i32 0, i32 3, i32 1)
19+
ret void
20+
}
21+
22+
define void @store_prefetch_no_offset(ptr %a) {
23+
; LA32-LABEL: store_prefetch_no_offset:
24+
; LA32: # %bb.0: # %entry
25+
; LA32-NEXT: preld 8, $a0, 0
26+
; LA32-NEXT: ret
27+
;
28+
; LA64-LABEL: store_prefetch_no_offset:
29+
; LA64: # %bb.0: # %entry
30+
; LA64-NEXT: preld 8, $a0, 0
31+
; LA64-NEXT: ret
32+
entry:
33+
call void @llvm.prefetch(ptr %a, i32 1, i32 3, i32 1)
34+
ret void
35+
}
36+
37+
define void @load_prefetch_with_offset(ptr %a) {
38+
; LA32-LABEL: load_prefetch_with_offset:
39+
; LA32: # %bb.0: # %entry
40+
; LA32-NEXT: preld 0, $a0, 200
41+
; LA32-NEXT: ret
42+
;
43+
; LA64-LABEL: load_prefetch_with_offset:
44+
; LA64: # %bb.0: # %entry
45+
; LA64-NEXT: preld 0, $a0, 200
46+
; LA64-NEXT: ret
47+
entry:
48+
%addr = getelementptr i8, ptr %a, i64 200
49+
call void @llvm.prefetch(ptr %addr, i32 0, i32 3, i32 1)
50+
ret void
51+
}
52+
53+
define void @store_prefetch_with_offset(ptr %a) {
54+
; LA32-LABEL: store_prefetch_with_offset:
55+
; LA32: # %bb.0: # %entry
56+
; LA32-NEXT: preld 8, $a0, 200
57+
; LA32-NEXT: ret
58+
;
59+
; LA64-LABEL: store_prefetch_with_offset:
60+
; LA64: # %bb.0: # %entry
61+
; LA64-NEXT: preld 8, $a0, 200
62+
; LA64-NEXT: ret
63+
entry:
64+
%addr = getelementptr i8, ptr %a, i64 200
65+
call void @llvm.prefetch(ptr %addr, i32 1, i32 3, i32 1)
66+
ret void
67+
}

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