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return FF_USED, formatting, correct INIT
1 parent 7c362f2 commit 5dd1e5e

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4 files changed

+20
-5
lines changed

4 files changed

+20
-5
lines changed

.gitignore

+3
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,9 @@ CMakeCache.txt
1919
.*.swp
2020
a.out
2121
*.json
22+
*.dot
23+
*.il
24+
/generic/examples/blinky.png
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build/
2326
*.asc
2427
*.bin

generic/cells.cc

+12-2
Original file line numberDiff line numberDiff line change
@@ -42,8 +42,9 @@ std::unique_ptr<CellInfo> create_generic_cell(Context *ctx, IdString type, std::
4242
}
4343
new_cell->type = type;
4444
if (type == ctx->id("GENERIC_SLICE")) {
45-
new_cell->params[ctx->id("K")] = std::to_string(ctx->args.K);
45+
new_cell->params[ctx->id("K")] = ctx->args.K;
4646
new_cell->params[ctx->id("INIT")] = 0;
47+
new_cell->params[ctx->id("FF_USED")] = 0;
4748

4849
for (int i = 0; i < ctx->args.K; i++)
4950
add_port(ctx, new_cell.get(), "I[" + std::to_string(i) + "]", PORT_IN);
@@ -80,16 +81,25 @@ void lut_to_lc(const Context *ctx, CellInfo *lut, CellInfo *lc, bool no_dff)
8081
}
8182

8283
if (no_dff) {
84+
lc->params[ctx->id("FF_USED")] = 0;
8385
replace_port(lut, ctx->id("Q"), lc, ctx->id("F"));
8486
}
8587
}
8688

8789
void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_lut)
8890
{
91+
lc->params[ctx->id("FF_USED")] = 1;
8992
replace_port(dff, ctx->id("CLK"), lc, ctx->id("CLK"));
9093

9194
if (pass_thru_lut) {
92-
lc->params[ctx->id("INIT")] = 0xAAAA;
95+
// Fill LUT with alternating 10
96+
const int init_size = 1 << lc->params[ctx->id("K")].as_int64();
97+
std::string init;
98+
init.reserve(init_size);
99+
for(int i = 0; i < init_size; i+=2)
100+
init.append("10");
101+
lc->params[ctx->id("INIT")] = Property::from_string(init);
102+
93103
replace_port(dff, ctx->id("D"), lc, ctx->id("I[0]"));
94104
}
95105

generic/examples/bitstream.py

+1
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
param_map = {
77
("GENERIC_SLICE", "K"): ParameterConfig(write=False),
88
("GENERIC_SLICE", "INIT"): ParameterConfig(write=True, numeric=True, width=2**K),
9+
("GENERIC_SLICE", "FF_USED"): ParameterConfig(write=True, numeric=True, width=1),
910

1011
("GENERIC_IOB", "INPUT_USED"): ParameterConfig(write=True, numeric=True, width=1),
1112
("GENERIC_IOB", "OUTPUT_USED"): ParameterConfig(write=True, numeric=True, width=1),

generic/synth/prims.v

+4-3
Original file line numberDiff line numberDiff line change
@@ -21,19 +21,20 @@ endmodule
2121
module GENERIC_SLICE #(
2222
parameter K = 4,
2323
parameter [2**K-1:0] INIT = 0,
24+
parameter FF_USED = 1'b0
2425
) (
2526
input CLK,
2627
input [K-1:0] I,
2728
output F,
2829
output Q
2930
);
30-
wire f_wire;
31+
wire f_wire;
3132

3233
LUT #(.K(K), .INIT(INIT)) lut_i(.I(I), .Q(f_wire));
3334

34-
DFF dff_i(.CLK(CLK), .D(f_wire), .Q(Q));
35+
DFF dff_i(.CLK(CLK), .D(f_wire), .Q(Q));
3536

36-
assign F = f_wire;
37+
assign F = f_wire;
3738
endmodule
3839

3940
module GENERIC_IOB #(

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