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driver-btm-c5.c
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#include "config.h"
#include <assert.h>
#include <limits.h>
#include <pthread.h>
#include <stdio.h>
#include <sys/time.h>
#include <sys/types.h>
#include <dirent.h>
#include <unistd.h>
#include <sys/mman.h>
#include <math.h>
//#include "lib/stddef.h"
//#include "lib/stdbool.h"
//#include "lib/stdint-gcc.h"
#include <sys/select.h>
#include <termios.h>
#include <sys/stat.h>
#include <fcntl.h>
#ifndef O_CLOEXEC
#define O_CLOEXEC 0
#endif
#include <sys/ioctl.h>
#include <sys/socket.h>
#include <netinet/in.h>
#include <net/if.h>
#include <netdb.h>
#include <arpa/inet.h>
#include <errno.h>
#include "elist.h"
#include "miner.h"
#include "usbutils.h"
#include "hexdump.c"
#include "util.h"
#include "driver-btm-c5.h"
#include "sha2_c5.h"
#define id_string_len 34
#define AUTH_URL "auth.minerlink.com"
#define PORT "7000"
#define USE_IIC 1
#define TEMP_CALI 0
#define MID_OR_BOT 1
// #include <stddef.h>
// /usr/lib/gcc/arm-angstrom-linux-gnueabi/4.8.3/include/stddef.h:413:0: note: this is the location of the previous definition
#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
//global various
// BOOL
// bool opt_bitmain_new_cmd_type_vil = false; // for S7 not S9
bool status_error = false;
bool once_error = false;
bool iic_ok = false;
bool opt_bitmain_fan_ctrl = false;
bool gBegin_get_nonce = false;
bool update_temp = false;
bool stop_mining = false;
bool opt_bitmain_c5_advanced = true;
static bool need_send = false; // (default: true) set to fales, because we do not want to send miner datas to bitmain, nor our blocks
// CHAR
char displayed_rate[BITMAIN_MAX_CHAIN_NUM][16];
char * mac;
char hash_board_id_string[BITMAIN_MAX_CHAIN_NUM*id_string_len];
unsigned char hash_board_id[BITMAIN_MAX_CHAIN_NUM][12];
// INTEGERS
int fd; // axi fpga
int fd_fpga_mem; // fpga memory
int fpga_version;
int pcb_version;
int last_temperature = 0;
int temp_highest = 0;
int opt_bitmain_fan_pwm = 0;
int opt_bitmain_c5_freq = 650;
int opt_bitmain_c5_freq1 = 650;
int opt_bitmain_c5_freq2 = 650;
int opt_bitmain_c5_freq3 = 650;
int opt_bitmain_c5_voltage = 176;
int ADD_FREQ = 0;
int ADD_FREQ1 = 0;
int check_iic = 0;
int rate_error[BITMAIN_MAX_CHAIN_NUM] = {0};
unsigned int is_first_job = 0;
unsigned int *axi_fpga_addr = NULL; // axi address
unsigned int *fpga_mem_addr = NULL; // fpga memory address
unsigned int *nonce2_jobid_address = NULL; // the value should be filled in NONCE2_AND_JOBID_STORE_ADDRESS
unsigned int *job_start_address_1 = NULL; // the value should be filled in JOB_START_ADDRESS
unsigned int *job_start_address_2 = NULL; // the value should be filled in JOB_START_ADDRESS
uint8_t de_voltage = 176;
uint8_t chain_voltage[BITMAIN_MAX_CHAIN_NUM] = {0};
// --------------------------------------------------------------
// CRC16 check table
// --------------------------------------------------------------
const uint8_t chCRCHTalbe[] = // CRC high byte table
{
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40
};
const uint8_t chCRCLTalbe[] = // CRC low byte table
{
0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7,
0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E,
0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9,
0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC,
0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32,
0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D,
0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38,
0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF,
0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1,
0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,
0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB,
0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA,
0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0,
0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97,
0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E,
0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89,
0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83,
0x41, 0x81, 0x80, 0x40
};
//crc
uint32_t given_id = 2;
uint32_t c_coinbase_padding = 0;
uint32_t c_merkles_num = 0;
uint32_t l_coinbase_padding = 0;
uint32_t l_merkles_num = 0;
uint64_t h = 0;
uint64_t rate[BITMAIN_MAX_CHAIN_NUM] = {(uint64_t)0};
// VOID
void *gpio0_vaddr=NULL;
// pthread_mutex_t
pthread_mutex_t reg_mutex = PTHREAD_MUTEX_INITIALIZER;
pthread_mutex_t nonce_mutex = PTHREAD_MUTEX_INITIALIZER;
pthread_mutex_t reg_read_mutex = PTHREAD_MUTEX_INITIALIZER;
pthread_mutex_t iic_mutex = PTHREAD_MUTEX_INITIALIZER;
// Struct
struct thr_info *read_nonce_reg_id; // thread id for read nonce and register
struct thr_info *check_system_work_id; // thread id for check system
struct thr_info *read_temp_id;
struct thr_info *read_hash_rate;
struct thr_info *pic_heart_beat;
struct thr_info *change_voltage_to_old;
struct thr_info *send_mac_thr;
struct timeval tv_send_job = {0, 0};
struct nonce_content temp_nonce_buf[MAX_RETURNED_NONCE_NUM]; // 10
struct reg_content temp_reg_buf[MAX_RETURNED_NONCE_NUM]; // 10
struct nonce_buf nonce_read_out;
struct reg_buf reg_value_buf;
struct all_parameters *dev;
uint8_t CRC16(const uint8_t* p_data, uint16_t w_len)
{
uint8_t chCRCHi = 0xFF; // CRC high byte initialize
uint8_t chCRCLo = 0xFF; // CRC low byte initialize
uint16_t wIndex = 0; // CRC cycling index
while (w_len--)
{
wIndex = chCRCLo ^ *p_data++;
chCRCLo = chCRCHi ^ chCRCHTalbe[wIndex];
chCRCHi = chCRCLTalbe[wIndex];
}
return ((chCRCHi << 8) | chCRCLo);
}
unsigned char CRC5(unsigned char *ptr, unsigned char len)
{
unsigned char i, j, k;
unsigned char crc = 0x1f;
unsigned char crcin[5] = {1, 1, 1, 1, 1};
unsigned char crcout[5] = {1, 1, 1, 1, 1};
unsigned char din = 0;
j = 0x80;
k = 0;
for (i = 0; i < len; i++)
{
if (*ptr & j)
{
din = 1;
}
else
{
din = 0;
}
crcout[0] = crcin[4] ^ din;
crcout[1] = crcin[0];
crcout[2] = crcin[1] ^ crcin[4] ^ din;
crcout[3] = crcin[2];
crcout[4] = crcin[3];
j = j >> 1;
k++;
if (k == 8)
{
j = 0x80;
k = 0;
ptr++;
}
cg_memcpy(crcin, crcout, 5);
}
crc = 0;
if(crcin[4])
{
crc |= 0x10;
}
if(crcin[3])
{
crc |= 0x08;
}
if(crcin[2])
{
crc |= 0x04;
}
if(crcin[1])
{
crc |= 0x02;
}
if(crcin[0])
{
crc |= 0x01;
}
return crc;
}
// pic
unsigned int get_pic_iic()
{
int ret = -1;
ret = *(axi_fpga_addr + IIC_COMMAND);
// applog(LOG_DEBUG,"%s: IIC_COMMAND is 0x%x\n", __FUNCTION__, ret);
return (unsigned int) ret;
}
unsigned char set_pic_iic(unsigned int data)
{
unsigned int ret=0;
unsigned char ret_data = 0;
*(axi_fpga_addr + IIC_COMMAND) = data & 0x7fffffff;
// applog(LOG_DEBUG,"%s: set IIC_COMMAND is 0x%x\n", __FUNCTION__, data & 0x7fffffff);
while(1)
{
ret = get_pic_iic();
if(ret & 0x80000000)
{
ret_data = (unsigned char)(ret & 0x000000ff);
return ret_data;
}
else
{
// applog(LOG_DEBUG,"%s: waiting write pic iic\n", __FUNCTION__);
cgsleep_us((int64_t)1000);
}
}
}
unsigned char write_pic_iic(bool read, bool reg_addr_valid, unsigned char reg_addr, unsigned char chain, unsigned char data)
{
unsigned int value = 0x00000000;
unsigned char ret = 0;
if(read)
{
value |= IIC_READ;
}
if(reg_addr_valid)
{
value |= IIC_REG_ADDR_VALID;
value |= IIC_REG_ADDR(reg_addr);
}
value |= IIC_ADDR_HIGH_4_BIT;
value |= IIC_CHAIN_NUMBER(chain);
value |= data;
ret = set_pic_iic(value);
return ret;
}
void send_pic_command(unsigned char chain)
{
write_pic_iic(false, false, 0x0, chain, PIC_COMMAND_1);
write_pic_iic(false, false, 0x0, chain, PIC_COMMAND_2);
}
void set_pic_iic_flash_addr_pointer(unsigned char chain, unsigned char addr_H, unsigned char addr_L)
{
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, SET_PIC_FLASH_POINTER);
write_pic_iic(false, false, 0x0, chain, addr_H);
write_pic_iic(false, false, 0x0, chain, addr_L);
}
void send_data_to_pic_iic(unsigned char chain, unsigned char command, unsigned char *buf, unsigned char length)
{
unsigned char i=0;
write_pic_iic(false, false, 0x0, chain, command);
for(i=0; i<length; i++)
{
write_pic_iic(false, false, 0x0, chain, *(buf + i));
}
}
void get_data_from_pic_iic(unsigned char chain, unsigned char command, unsigned char *buf, unsigned char length)
{
unsigned char i=0;
write_pic_iic(false, false, 0x0, chain, command);
for(i=0; i<length; i++)
{
*(buf + i) = write_pic_iic(true, false, 0x0, chain, 0);
}
}
// TODO:
void send_data_to_pic_flash(unsigned char chain, unsigned char *buf)
{
send_pic_command(chain);
send_data_to_pic_iic(chain, SEND_DATA_TO_IIC, buf, 16);
}
// TODO:
void get_data_from_pic_flash(unsigned char chain, unsigned char *buf)
{
send_pic_command(chain);
get_data_from_pic_iic(chain, READ_DATA_FROM_IIC, buf, 16);
}
unsigned char erase_pic_flash(unsigned char chain)
{
unsigned char ret=0xff;
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, ERASE_IIC_FLASH);
while(1)
{
cgsleep_us((int64_t)3000);
ret = write_pic_iic(true, false, 0x0, chain, 0);
if(ret == 0x0)
{
return ret;
}
}
}
// TODO:
unsigned char erase_pic_flash_all(unsigned char chain)
{
unsigned char ret = 0xff;
unsigned int i = 0;
int erase_loop = 0;
unsigned char start_addr_h = PIC_FLASH_POINTER_START_ADDRESS_H, start_addr_l = PIC_FLASH_POINTER_START_ADDRESS_L;
unsigned char end_addr_h = PIC_FLASH_POINTER_END_ADDRESS_H, end_addr_l = PIC_FLASH_POINTER_END_ADDRESS_L;
unsigned int pic_flash_length = 0;
set_pic_iic_flash_addr_pointer(chain, PIC_FLASH_POINTER_START_ADDRESS_H, PIC_FLASH_POINTER_START_ADDRESS_L);
pic_flash_length = (((unsigned int)end_addr_h << 8) + end_addr_l) - (((unsigned int)start_addr_h << 8) + start_addr_l) + 1;
erase_loop = pic_flash_length/PIC_FLASH_SECTOR_LENGTH;
for(i=0; i<erase_loop; i++)
{
erase_pic_flash(chain);
}
return 0;
}
// TODO:
void set_temperature_offset_value(unsigned char chain, unsigned char *value)
{
send_pic_command(chain);
send_data_to_pic_iic(chain, WR_TEMP_OFFSET_VALUE, value, 8);
cgsleep_ms(100000);
}
// TODO:
void get_temperature_offset_value(unsigned char chain, unsigned char *value)
{
send_pic_command(chain);
get_data_from_pic_iic(chain, RD_TEMP_OFFSET_VALUE, value, 8);
}
// TODO:
unsigned char write_data_into_pic_flash(unsigned char chain)
{
unsigned char ret=0xff;
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, WRITE_DATA_INTO_PIC);
while(1)
{
cgsleep_us((int64_t)10000);
ret = write_pic_iic(true, false, 0x0, chain, 0);
if(ret == 0x0)
{
return ret;
}
}
}
unsigned char jump_to_app_from_loader(unsigned char chain)
{
unsigned char ret=0xff;
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, JUMP_FROM_LOADER_TO_APP);
cgsleep_us((int64_t)100000);
}
unsigned char reset_iic_pic(unsigned char chain)
{
unsigned char ret=0xff;
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, RESET_PIC);
cgsleep_us((int64_t)100000);
}
// TODO:
void get_pic_iic_flash_addr_pointer(unsigned char chain, unsigned char *addr_H, unsigned char *addr_L)
{
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, GET_PIC_FLASH_POINTER);
*addr_H = write_pic_iic(true, false, 0x0, chain, 0);
*addr_L = write_pic_iic(true, false, 0x0, chain, 0);
}
void set_pic_voltage(unsigned char chain, unsigned char voltage)
{
send_pic_command(chain);
applog(LOG_NOTICE,"%s voltage %u",__FUNCTION__,voltage);
write_pic_iic(false, false, 0x0, chain, SET_VOLTAGE);
write_pic_iic(false, false, 0x0, chain, voltage);
cgsleep_us((int64_t)100000);
}
unsigned char get_pic_voltage(unsigned char chain)
{
unsigned char ret=0;
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, GET_VOLTAGE);
ret = write_pic_iic(true, false, 0x0, chain, 0);
applog(LOG_NOTICE,"%s: voltage = %d\n", __FUNCTION__, ret);
return ret;
}
// TODO:
void set_voltage_setting_time(unsigned char chain, unsigned char *time)
{
send_pic_command(chain);
send_data_to_pic_iic(chain, SET_VOLTAGE_TIME, time, 6);
cgsleep_us((int64_t)100000);
}
// TODO:
void set_hash_board_id_number(unsigned char chain, unsigned char *id)
{
send_pic_command(chain);
send_data_to_pic_iic(chain, SET_HASH_BOARD_ID, id, 12);
cgsleep_us((int64_t)100000);
}
void get_hash_board_id_number(unsigned char chain, unsigned char *id)
{
send_pic_command(chain);
get_data_from_pic_iic(chain, GET_HASH_BOARD_ID, id, 12);
}
// TODO:
void write_host_MAC_and_time(unsigned char chain, unsigned char *buf)
{
send_pic_command(chain);
send_data_to_pic_iic(chain, SET_HOST_MAC_ADDRESS, buf, 12);
cgsleep_us((int64_t)100000);
}
void enable_pic_dc_dc(unsigned char chain)
{
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, ENABLE_VOLTAGE);
write_pic_iic(false, false, 0x0, chain, 1);
}
// TODO:
void enable_pic_dc_dc_all()
{
unsigned char i;
for(i=0; i < BITMAIN_MAX_CHAIN_NUM; i++)
{
if(dev->chain_exist[i] == 1)
{
enable_pic_dc_dc(i);
cgsleep_ms(1);
}
}
}
// TODO:
void set_pic_voltage_all(int voltage)
{
unsigned char i;
for(i=0; i < BITMAIN_MAX_CHAIN_NUM; i++)
{
if(dev->chain_exist[i] == 1)
{
cgsleep_ms(100);
jump_to_app_from_loader(i);
cgsleep_ms(100);
set_pic_voltage(i, (unsigned char) voltage);
cgsleep_ms(1);
}
}
}
void enable_pic_dac(unsigned char chain)
{
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, ENABLE_VOLTAGE);
write_pic_iic(false, false, 0x0, chain, 1);
}
void disable_pic_dac(unsigned char chain)
{
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, ENABLE_VOLTAGE);
write_pic_iic(false, false, 0x0, chain, 0);
}
void pic_heart_beat_each_chain(unsigned char chain)
{
send_pic_command(chain);
write_pic_iic(false, false, 0x0, chain, SEND_HEART_BEAT);
}
//FPGA related
int get_nonce2_and_job_id_store_address(void)
{
int ret = -1;
ret = *(axi_fpga_addr + NONCE2_AND_JOBID_STORE_ADDRESS);
// applog(LOG_DEBUG,"%s: NONCE2_AND_JOBID_STORE_ADDRESS is 0x%x\n", __FUNCTION__, ret);
return ret;
}
void set_nonce2_and_job_id_store_address(unsigned int value)
{
*(axi_fpga_addr + NONCE2_AND_JOBID_STORE_ADDRESS) = value;
// applog(LOG_DEBUG,"%s: set NONCE2_AND_JOBID_STORE_ADDRESS is 0x%x\n", __FUNCTION__, value);
get_nonce2_and_job_id_store_address();
}
int get_job_start_address(void)
{
int ret = -1;
ret = *(axi_fpga_addr + JOB_START_ADDRESS);
// applog(LOG_DEBUG,"%s: JOB_START_ADDRESS is 0x%x\n", __FUNCTION__, ret);
return ret;
}
void set_job_start_address(unsigned int value)
{
*(axi_fpga_addr + JOB_START_ADDRESS) = value;
// applog(LOG_DEBUG,"%s: set JOB_START_ADDRESS is 0x%x\n", __FUNCTION__, value);
get_job_start_address();
}
int get_QN_write_data_command(void)
{
int ret = -1;
ret = *((axi_fpga_addr + QN_WRITE_DATA_COMMAND));
// applog(LOG_DEBUG,"%s: QN_WRITE_DATA_COMMAND is 0x%x\n", __FUNCTION__, ret);
return ret;
}
void set_QN_write_data_command(unsigned int value)
{
*(axi_fpga_addr + QN_WRITE_DATA_COMMAND) = value;
// applog(LOG_DEBUG,"%s: set QN_WRITE_DATA_COMMAND is 0x%x\n", __FUNCTION__, value);
get_QN_write_data_command();
}
int bitmain_axi_init()
{
unsigned int data;
int ret=0;
fd = open("/dev/axi_fpga_dev", O_RDWR);
if(fd < 0)
{
// applog(LOG_DEBUG,"/dev/axi_fpga_dev open failed. fd = %d\n", fd);
perror("open");
return -1;
}
axi_fpga_addr = mmap(NULL, TOTAL_LEN, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
if(!axi_fpga_addr)
{
// applog(LOG_DEBUG,"mmap axi_fpga_addr failed. axi_fpga_addr = 0x%x\n", axi_fpga_addr);
return -1;
}
// applog(LOG_DEBUG,"mmap axi_fpga_addr = 0x%x\n", axi_fpga_addr);
//check the value in address 0xff200000
data = *axi_fpga_addr;
if((data & 0x0000FFFF) != HARDWARE_VERSION_VALUE)
{
// applog(LOG_DEBUG,"data = 0x%x, and it's not equal to HARDWARE_VERSION_VALUE : 0x%x\n", data, HARDWARE_VERSION_VALUE);
//return -1;
}
// applog(LOG_DEBUG,"axi_fpga_addr data = 0x%x\n", data);
fd_fpga_mem = open("/dev/fpga_mem", O_RDWR);
if(fd_fpga_mem < 0)
{
// applog(LOG_DEBUG,"/dev/fpga_mem open failed. fd_fpga_mem = %d\n", fd_fpga_mem);
perror("open");
return -1;
}
fpga_mem_addr = mmap(NULL, FPGA_MEM_TOTAL_LEN, PROT_READ|PROT_WRITE, MAP_SHARED, fd_fpga_mem, 0);
if(!fpga_mem_addr)
{
// applog(LOG_DEBUG,"mmap fpga_mem_addr failed. fpga_mem_addr = 0x%x\n", fpga_mem_addr);
return -1;
}
// applog(LOG_DEBUG,"mmap fpga_mem_addr = 0x%x\n", fpga_mem_addr);
nonce2_jobid_address = fpga_mem_addr;
job_start_address_1 = fpga_mem_addr + NONCE2_AND_JOBID_STORE_SPACE/sizeof(int);
job_start_address_2 = fpga_mem_addr + (NONCE2_AND_JOBID_STORE_SPACE + JOB_STORE_SPACE)/sizeof(int);
// applog(LOG_DEBUG,"job_start_address_1 = 0x%x\n", job_start_address_1);
// applog(LOG_DEBUG,"job_start_address_2 = 0x%x\n", job_start_address_2);
set_nonce2_and_job_id_store_address(PHY_MEM_NONCE2_JOBID_ADDRESS);
set_job_start_address(PHY_MEM_JOB_START_ADDRESS_1);
dev = cgcalloc(sizeof(struct all_parameters), sizeof(char));
if(!dev)
{
// applog(LOG_DEBUG,"kmalloc for dev failed.\n");
return -1;
}
else
{
dev->current_job_start_address = job_start_address_1;
// applog(LOG_DEBUG,"kmalloc for dev success.\n");
}
return ret;
}
// TODO:
int bitmain_axi_close()
{
int ret = 0;
ret = munmap((void *)axi_fpga_addr, TOTAL_LEN);
if(ret<0)
{
// applog(LOG_DEBUG,"munmap failed!\n");
}
ret = munmap((void *)fpga_mem_addr, FPGA_MEM_TOTAL_LEN);
if(ret<0)
{
// applog(LOG_DEBUG,"munmap failed!\n");
}
//free_pages((unsigned long)nonce2_jobid_address, NONCE2_AND_JOBID_STORE_SPACE_ORDER);
//free(temp_job_start_address_1);
//free(temp_job_start_address_2);
close(fd);
close(fd_fpga_mem);
}
int get_fan_control(void)
{
int ret = -1;
ret = *(axi_fpga_addr + FAN_CONTROL);
// applog(LOG_DEBUG,"%s: FAN_CONTROL is 0x%x\n", __FUNCTION__, ret);
return ret;
}
void set_fan_control(unsigned int value)
{
*(axi_fpga_addr + FAN_CONTROL) = value;
// applog(LOG_DEBUG,"%s: set FAN_CONTROL is 0x%x\n", __FUNCTION__, value);
get_fan_control();
}
int get_hash_on_plug(void)
{
int ret = -1;
ret = *(axi_fpga_addr + HASH_ON_PLUG);
// applog(LOG_DEBUG,"%s: HASH_ON_PLUG is 0x%x\n", __FUNCTION__, ret);
return ret;
}
int get_hardware_version(void)
{
int ret = -1;
ret = *((int *)(axi_fpga_addr + HARDWARE_VERSION));
// applog(LOG_DEBUG,"%s: HARDWARE_VERSION is 0x%x\n", __FUNCTION__, ret);
return ret;
}
int get_fan_speed(unsigned char *fan_id, unsigned int *fan_speed)
{
int ret = -1;
ret = *(axi_fpga_addr + FAN_SPEED);
*fan_speed = (unsigned int) (0x000000ff & ret);
*fan_id = (unsigned char)(0x00000007 & (ret >> 8));
if(*fan_speed > 0)
{
// applog(LOG_DEBUG,"%s: fan_id is 0x%x, fan_speed is 0x%x\n", __FUNCTION__, *fan_id, *fan_speed);
}
return ret;
}
int get_temperature_0_3(void)
{
int ret = -1;
ret = *((int *)(axi_fpga_addr + TEMPERATURE_0_3));
//// applog(LOG_DEBUG,"%s: TEMPERATURE_0_3 is 0x%x\n", __FUNCTION__, ret);
return ret;
}
int get_temperature_4_7(void)
{
int ret = -1;
ret = *((int *)(axi_fpga_addr + TEMPERATURE_4_7));
//// applog(LOG_DEBUG,"%s: TEMPERATURE_4_7 is 0x%x\n", __FUNCTION__, ret);
return ret;
}
int get_temperature_8_11(void)
{
int ret = -1;
ret = *((int *)(axi_fpga_addr + TEMPERATURE_8_11));
//// applog(LOG_DEBUG,"%s: TEMPERATURE_8_11 is 0x%x\n", __FUNCTION__, ret);
return ret;
}
int get_temperature_12_15(void)
{
int ret = -1;
ret = *((int *)(axi_fpga_addr + TEMPERATURE_12_15));
//// applog(LOG_DEBUG,"%s: TEMPERATURE_12_15 is 0x%x\n", __FUNCTION__, ret);
return ret;
}
int get_time_out_control(void)
{
int ret = -1;
ret = *(axi_fpga_addr + TIME_OUT_CONTROL);
// applog(LOG_DEBUG,"%s: TIME_OUT_CONTROL is 0x%x\n", __FUNCTION__, ret);
return ret;
}
void set_time_out_control(unsigned int value)
{
*(axi_fpga_addr + TIME_OUT_CONTROL) = value;
// applog(LOG_DEBUG,"%s: set FAN_CONTROL is 0x%x\n", __FUNCTION__, value);
get_time_out_control();
}
int get_BC_command_buffer(unsigned int *buf)
{
int ret = -1;
ret = *(axi_fpga_addr + BC_COMMAND_BUFFER);
*(buf + 0) = (unsigned int) ret; //this is for FIL
ret = *(axi_fpga_addr + BC_COMMAND_BUFFER + 1);
*(buf + 1) = (unsigned int) ret;
ret = *(axi_fpga_addr + BC_COMMAND_BUFFER + 2);
*(buf + 2) = (unsigned int) ret;
// applog(LOG_DEBUG,"%s: BC_COMMAND_BUFFER buf[0]: 0x%x, buf[1]: 0x%x, buf[2]: 0x%x\n", __FUNCTION__, *(buf + 0), *(buf + 1), *(buf + 2));
return ret;
}
void set_BC_command_buffer(unsigned int *value)
{
unsigned int buf[4] = {0};
*(axi_fpga_addr + BC_COMMAND_BUFFER) = *(value + 0); //this is for FIL
*(axi_fpga_addr + BC_COMMAND_BUFFER + 1) = *(value + 1);
*(axi_fpga_addr + BC_COMMAND_BUFFER + 2) = *(value + 2);
// applog(LOG_DEBUG,"%s: set BC_COMMAND_BUFFER value[0]: 0x%x, value[1]: 0x%x, value[2]: 0x%x\n", __FUNCTION__, *(value + 0), *(value + 1), *(value + 2));
get_BC_command_buffer(buf);
}
int get_nonce_number_in_fifo(void)
{
int ret = -1;
ret = *(axi_fpga_addr + NONCE_NUMBER_IN_FIFO);
//// applog(LOG_DEBUG,"%s: NONCE_NUMBER_IN_FIFO is 0x%x\n", __FUNCTION__, ret);
return ret;
}
int get_return_nonce(unsigned int *buf)
{
int ret = -1;
ret = *(axi_fpga_addr + RETURN_NONCE);
*(buf + 0) = (unsigned int) ret;
ret = *(axi_fpga_addr + RETURN_NONCE + 1);
*(buf + 1) = (unsigned int) ret; //there is nonce3
//// applog(LOG_DEBUG,"%s: RETURN_NONCE buf[0] is 0x%x, buf[1] is 0x%x\n", __FUNCTION__, *(buf + 0), *(buf + 1));
return ret;
}
int get_BC_write_command(void)
{
int ret = -1;
ret = *(axi_fpga_addr + BC_WRITE_COMMAND);
// applog(LOG_DEBUG,"%s: BC_WRITE_COMMAND is 0x%x\n", __FUNCTION__, ret);
return ret;
}
void set_BC_write_command(unsigned int value)
{
*(axi_fpga_addr + BC_WRITE_COMMAND) = value;
//// applog(LOG_DEBUG,"%s: set BC_WRITE_COMMAND is 0x%x\n", __FUNCTION__, value);
if(value & BC_COMMAND_BUFFER_READY)
{
while(get_BC_write_command() & BC_COMMAND_BUFFER_READY)
{
cgsleep_ms(1);
//// applog(LOG_DEBUG,"%s ---\n", __FUNCTION__);
}
}
else
{
get_BC_write_command();
}
}
int get_ticket_mask(void)
{
int ret = -1;
ret = *(axi_fpga_addr + TICKET_MASK_FPGA);
// applog(LOG_DEBUG,"%s: TICKET_MASK_FPGA is 0x%x\n", __FUNCTION__, ret);
return ret;
}
void set_ticket_mask(unsigned int value)
{
*(axi_fpga_addr + TICKET_MASK_FPGA) = value;
// applog(LOG_DEBUG,"%s: set TICKET_MASK_FPGA is 0x%x\n", __FUNCTION__, value);
get_ticket_mask();
}
int get_job_id(void)
{
int ret = -1;
ret = *(axi_fpga_addr + JOB_ID);
// applog(LOG_DEBUG,"%s: JOB_ID is 0x%x\n", __FUNCTION__, ret);
return ret;
}
void set_job_id(unsigned int value)
{
*(axi_fpga_addr + JOB_ID) = value;
// applog(LOG_DEBUG,"%s: set JOB_ID is 0x%x\n", __FUNCTION__, value);
get_job_id();
}
// TODO:
int get_job_length(void)
{
int ret = -1;
ret = *(axi_fpga_addr + JOB_LENGTH);
// applog(LOG_DEBUG,"%s: JOB_LENGTH is 0x%x\n", __FUNCTION__, ret);
return ret;
}
void set_job_length(unsigned int value)
{
*(axi_fpga_addr + JOB_LENGTH) = value;
// applog(LOG_DEBUG,"%s: set JOB_LENGTH is 0x%x\n", __FUNCTION__, value);
get_job_id();