Skip to content

Commit 2c13355

Browse files
author
Ivan Serdyuk
committed
Test
1 parent 5ffec8a commit 2c13355

File tree

9,694 files changed

+2344902
-0
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

9,694 files changed

+2344902
-0
lines changed

Diff for: ‎Getting Started with RV32M1 SDK RISCV.pdf

1.7 MB
Binary file not shown.

Diff for: ‎LA_OPT_NXP_Software_License.htm

+3,774
Large diffs are not rendered by default.

Diff for: ‎LA_OPT_WOLFSSL_EVAL.htm

+974
Large diffs are not rendered by default.

Diff for: ‎RISCV/core_riscv32.h

+123
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,123 @@
1+
/*
2+
* Copyright 2017 NXP
3+
* All rights reserved.
4+
*
5+
* SPDX-License-Identifier: BSD-3-Clause
6+
*/
7+
/* Copyright (c) 2009 - 2015 ARM LIMITED
8+
9+
All rights reserved.
10+
Redistribution and use in source and binary forms, with or without
11+
modification, are permitted provided that the following conditions are met:
12+
- Redistributions of source code must retain the above copyright
13+
notice, this list of conditions and the following disclaimer.
14+
- Redistributions in binary form must reproduce the above copyright
15+
notice, this list of conditions and the following disclaimer in the
16+
documentation and/or other materials provided with the distribution.
17+
- Neither the name of ARM nor the names of its contributors may be used
18+
to endorse or promote products derived from this software without
19+
specific prior written permission.
20+
*
21+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22+
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24+
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25+
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26+
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27+
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28+
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29+
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30+
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31+
POSSIBILITY OF SUCH DAMAGE.
32+
---------------------------------------------------------------------------*/
33+
34+
#ifndef __CORE_RISCV32_H__
35+
#define __CORE_RISCV32_H__
36+
37+
#include <stdint.h>
38+
39+
#ifdef __cplusplus
40+
extern "C" {
41+
#endif
42+
43+
#define RISCV32
44+
45+
#if defined ( __GNUC__ )
46+
#define __ASM __asm /*!< asm keyword for GNU Compiler */
47+
#define __INLINE inline /*!< inline keyword for GNU Compiler */
48+
#define __STATIC_INLINE static inline
49+
50+
#else
51+
#error Unknown compiler
52+
#endif
53+
54+
#if defined ( __GNUC__ )
55+
56+
#define __BKPT(x) __ASM("ebreak")
57+
58+
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
59+
{
60+
__ASM volatile ("nop");
61+
}
62+
63+
__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
64+
{
65+
__ASM volatile ("nop");
66+
}
67+
68+
__attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
69+
{
70+
__ASM volatile ("nop");
71+
}
72+
73+
__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
74+
{
75+
__ASM volatile ("wfi");
76+
}
77+
78+
__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
79+
{
80+
}
81+
82+
__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
83+
{
84+
__ASM volatile ("csrsi mstatus, 8");
85+
}
86+
87+
__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
88+
{
89+
__ASM volatile ("csrci mstatus, 8");
90+
}
91+
92+
__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
93+
{
94+
return __builtin_bswap32(value);
95+
}
96+
97+
__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
98+
{
99+
return __builtin_bswap16(value);
100+
}
101+
102+
#else
103+
#error Unknown compiler
104+
#endif
105+
106+
#ifdef __cplusplus
107+
#define __I volatile /*!< Defines 'read only' permissions */
108+
#else
109+
#define __I volatile const /*!< Defines 'read only' permissions */
110+
#endif
111+
#define __O volatile /*!< Defines 'write only' permissions */
112+
#define __IO volatile /*!< Defines 'read / write' permissions */
113+
114+
/* following defines should be used for structure members */
115+
#define __IM volatile const /*! Defines 'read only' structure member permissions */
116+
#define __OM volatile /*! Defines 'write only' structure member permissions */
117+
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
118+
119+
#ifdef __cplusplus
120+
}
121+
#endif
122+
123+
#endif /* __CORE_RISCV32_H__ */

Diff for: ‎SW-Content-Register.txt

+134
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,134 @@
1+
Release Name: MCUXpresso Software Development Kit (SDK)
2+
Release Version: 2.2.0
3+
4+
FatFs Approved Open Source License: Yes
5+
Author: Electronic Lives Mfg. by ChaN of Ageo
6+
city, Japan (hobbyist)
7+
Description: FatFs is a generic FAT file system
8+
module for small embedded systems.
9+
Format: source code
10+
License: Open Source - FatFs License,
11+
<rootfolder>/middleware/fatfs/doc/en/appnote.html
12+
Location: middleware/fatfs_0.12c
13+
name: FatFs
14+
URL: http://elm-chan.org/fsw/ff/00index_e.html
15+
version: 0.12c
16+
17+
FreeRTOS(tm) Author: Real Time Engineers, Ltd.
18+
Description: A real-time operating system(RTOS)
19+
from Real Time Engineers, Ltd.
20+
Format: source code
21+
License: Modified GPLv2. See
22+
,<rootfolder>/rtos/freertos/License/license.txt.
23+
Location: rtos/freertos_9.0.0
24+
name: FreeRTOS(tm)
25+
URL: http://www.freertos.org
26+
version: 9.0.0
27+
28+
KSDK Peripheral Driver Description: Peripheral drivers are designed for
29+
the most common use cases indentified for
30+
the underlying hardware block.
31+
Author: Freescale
32+
Version: 2.x.x
33+
License: Open Source - BSD-3-Clause
34+
Format: source code
35+
Location: devices/<device_name>/drivers
36+
37+
Kinetis_BLE version: 1.4.0
38+
Location: middleware/wireless/bluetooth_1.4.0
39+
Description: Bluetooth Low Energy Software
40+
License: Open Source - BSD-3-Clause
41+
Author: NXP
42+
name: Bluetooth Low Energy Application Source
43+
Format: Source code and header Files
44+
45+
Kinetis_BLE_ControllerLib version: 4.2.0
46+
Location:
47+
middleware/wireless/bluetooth_1.4.0/controller/lib
48+
Description: Bluetooth Low Energy Controller
49+
Firmware. Host Command Interface (HCI).
50+
License: Proprietary
51+
Author: Mindtree
52+
name: Bluetooth Low Energy Controller Firmware
53+
Format: Binary libraries
54+
55+
Kinetis_BLE_HostLib version: 1.4.0
56+
Location:
57+
middleware/wireless/bluetooth_1.4.0/host/lib
58+
Description: Bluetooth Low Energy Stack (HCI,
59+
L2CAP, ATT, GATT, GAP and SM)
60+
License: Proprietary, See EULA LA_OPT_EVAL_DEMO_ONLY_License
61+
v20 June 2017
62+
Author: NXP
63+
name: Bluetooth Low Energy Host Firmware
64+
Format: Binary libraries
65+
66+
Kinetis_FWK version: 5.5.1
67+
Location: middleware/wireless/framework_5.5.1
68+
Description: Kinetis Connectivity Framework
69+
middleware for Connectivity stacks
70+
License: Open Source - BSD-3-Clause
71+
Author: NXP
72+
name: Kinetis Connectivity Framework
73+
Format: Source code
74+
75+
Multicore SDK version: 2.3.1
76+
Location: middleware/multicore_2.3.1
77+
Description: Freescale Multicore Software
78+
Development Kit.
79+
License: Open Source - BSD-3-Clause
80+
Author: Freescale
81+
name: Multicore SDK
82+
Format: source code
83+
84+
RPMsg-Lite version: NA
85+
Location: middleware/multicore_2.3.1/rpmsg_lite/
86+
Description: Open Asymmetric Multi Processing
87+
(OpenAMP) framework project
88+
License: Open Source - BSD-3-Clause
89+
Author: Mentor Graphics Corporation & community
90+
contributors
91+
name: RPMsg-Lite
92+
Format: source code
93+
URL: https://github.com/OpenAMP/open-amp
94+
95+
SD MMC Card middleware name: SD MMC Card middleware
96+
Location: middleware/sdmmc_2.1.2
97+
License: Open Source - BSD-3-Clause
98+
Description: A software component support SD card,
99+
eMMC card.
100+
Author: Freescale
101+
version: 2.1.2
102+
Format: source code
103+
104+
USB version: 1.6.3
105+
Location: middleware/usb_1.6.3
106+
Description: Freescale USB stack. This is a
107+
version of the USB stack that has been integrated
108+
with the MCUXpresso SDK.
109+
License: Open Source - BSD-3-Clause
110+
Author: Freescale
111+
name: USB
112+
Format: source code
113+
114+
wifi_qca version: 2.0.0
115+
Location: middleware/wifi_qca_2.0.0
116+
Description: Qualcomm Wi-Fi stack
117+
License: Open Source - BSD-3-Clause
118+
Author: Qualcomm Atheros, Inc.
119+
name: wifi_qca
120+
Format: source code
121+
URL: https://www.qualcomm.com/products/wifi-
122+
platforms
123+
124+
wolfSSL Author: wolfSSL Inc.
125+
Description: wolfSSL is cryptography and SSL/TLS
126+
library
127+
Format: source code
128+
License: 3rd party evaluation. See <rootfolder>/mi
129+
ddleware/wolfssl_3.9.8/wolfSSL_cyaSSL_evaluation_l
130+
icense_agreement.pdf
131+
Location: middleware/wolfssl_3.9.8
132+
name: wolfSSL
133+
URL: https://www.wolfssl.com
134+
version: 3.9.8

Diff for: ‎boards/rv32m1_vega/demo_apps/bubble/pin_mux.c

+114
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,114 @@
1+
/*
2+
* Copyright 2017 NXP
3+
* All rights reserved.
4+
*
5+
* SPDX-License-Identifier: BSD-3-Clause
6+
*/
7+
8+
/*
9+
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
10+
!!GlobalInfo
11+
product: Pins v3.0
12+
processor: RV32M1
13+
package_id: RV32M1
14+
mcu_data: ksdk2_0
15+
processor_version: 0.0.0
16+
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
17+
*/
18+
19+
#include "fsl_common.h"
20+
#include "fsl_port.h"
21+
#include "pin_mux.h"
22+
23+
/*FUNCTION**********************************************************************
24+
*
25+
* Function Name : BOARD_InitBootPins
26+
* Description : Calls initialization functions.
27+
*
28+
*END**************************************************************************/
29+
void BOARD_InitBootPins(void) {
30+
BOARD_InitPins();
31+
}
32+
33+
#define PIN7_IDX 7u /*!< Pin number for pin 7 in a port */
34+
#define PIN8_IDX 8u /*!< Pin number for pin 8 in a port */
35+
#define PIN23_IDX 23u /*!< Pin number for pin 23 in a port */
36+
#define PIN24_IDX 24u /*!< Pin number for pin 24 in a port */
37+
38+
/*
39+
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
40+
BOARD_InitPins:
41+
- options: {callFromInitBoot: 'true', coreID: cm4, enableClock: 'true'}
42+
- pin_list:
43+
- {pin_num: N2, peripheral: LPUART0, signal: RX, pin_signal: LPCMP0_IN0/PTC7/LLWU_P15/LPSPI0_PCS3/LPUART0_RX/LPI2C1_HREQ/TPM0_CH0/LPTMR1_ALT1}
44+
- {pin_num: P3, peripheral: LPUART0, signal: TX, pin_signal: LPCMP0_IN1/PTC8/LPSPI0_SCK/LPUART0_TX/LPI2C0_HREQ/TPM0_CH1}
45+
- {pin_num: D6, peripheral: TPM2, signal: 'CH, 0', pin_signal: PTA24/LPSPI2_PCS0/LPSPI1_SCK/LPI2C2_SCL/FB_OE_b/TPM2_CH0}
46+
- {pin_num: E6, peripheral: TPM2, signal: 'CH, 1', pin_signal: PTA23/LPSPI2_SIN/LPSPI1_PCS3/LPI2C2_SDA/FB_AD15/TPM2_CH1}
47+
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
48+
*/
49+
50+
/*FUNCTION**********************************************************************
51+
*
52+
* Function Name : BOARD_InitPins
53+
* Description : Configures pin routing and optionally pin electrical features.
54+
*
55+
*END**************************************************************************/
56+
void BOARD_InitPins(void) {
57+
CLOCK_EnableClock(kCLOCK_PortA); /* Clock Gate Control: 0x01u */
58+
CLOCK_EnableClock(kCLOCK_PortC); /* Clock Gate Control: 0x01u */
59+
60+
PORT_SetPinMux(PORTA, PIN23_IDX, kPORT_MuxAlt6); /* PORTA23 (pin E6) is configured as TPM2_CH1 */
61+
PORT_SetPinMux(PORTA, PIN24_IDX, kPORT_MuxAlt6); /* PORTA24 (pin D6) is configured as TPM2_CH0 */
62+
PORT_SetPinMux(PORTC, PIN7_IDX, kPORT_MuxAlt3); /* PORTC7 (pin N2) is configured as LPUART0_RX */
63+
PORT_SetPinMux(PORTC, PIN8_IDX, kPORT_MuxAlt3); /* PORTC8 (pin P3) is configured as LPUART0_TX */
64+
}
65+
66+
67+
#define PIN29_IDX 29u /*!< Pin number for pin 29 in a port */
68+
#define PIN30_IDX 30u /*!< Pin number for pin 30 in a port */
69+
70+
/*
71+
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
72+
BOARD_I2C_ConfigurePins:
73+
- options: {coreID: cm4, enableClock: 'true'}
74+
- pin_list:
75+
- {pin_num: G15, peripheral: LPI2C3, signal: SDA, pin_signal: PTE29/LPUART3_RX/LPI2C3_SDA/FXIO0_D30, slew_rate: fast, open_drain: enable, pull_select: up, pull_enable: enable}
76+
- {pin_num: G17, peripheral: LPI2C3, signal: SCL, pin_signal: PTE30/LPUART3_TX/LPI2C3_SCL/TPM2_CLKIN/FXIO0_D31, slew_rate: fast, open_drain: enable, pull_select: up,
77+
pull_enable: enable}
78+
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
79+
*/
80+
81+
/*FUNCTION**********************************************************************
82+
*
83+
* Function Name : BOARD_I2C_ConfigurePins
84+
* Description : Configures pin routing and optionally pin electrical features.
85+
*
86+
*END**************************************************************************/
87+
void BOARD_I2C_ConfigurePins(void) {
88+
CLOCK_EnableClock(kCLOCK_PortE); /* Clock Gate Control: 0x01u */
89+
90+
const port_pin_config_t porte29_pinG15_config = {
91+
kPORT_PullUp, /* Internal pull-up resistor is enabled */
92+
kPORT_FastSlewRate, /* Fast slew rate is configured */
93+
kPORT_PassiveFilterDisable, /* Passive filter is disabled */
94+
kPORT_OpenDrainEnable, /* Open drain is enabled */
95+
kPORT_LowDriveStrength, /* Low drive strength is configured */
96+
kPORT_MuxAlt3, /* Pin is configured as LPI2C3_SDA */
97+
kPORT_UnlockRegister /* Pin Control Register fields [15:0] are not locked */
98+
};
99+
PORT_SetPinConfig(PORTE, PIN29_IDX, &porte29_pinG15_config); /* PORTE29 (pin G15) is configured as LPI2C3_SDA */
100+
const port_pin_config_t porte30_pinG17_config = {
101+
kPORT_PullUp, /* Internal pull-up resistor is enabled */
102+
kPORT_FastSlewRate, /* Fast slew rate is configured */
103+
kPORT_PassiveFilterDisable, /* Passive filter is disabled */
104+
kPORT_OpenDrainEnable, /* Open drain is enabled */
105+
kPORT_LowDriveStrength, /* Low drive strength is configured */
106+
kPORT_MuxAlt3, /* Pin is configured as LPI2C3_SCL */
107+
kPORT_UnlockRegister /* Pin Control Register fields [15:0] are not locked */
108+
};
109+
PORT_SetPinConfig(PORTE, PIN30_IDX, &porte30_pinG17_config); /* PORTE30 (pin G17) is configured as LPI2C3_SCL */
110+
}
111+
112+
/*******************************************************************************
113+
* EOF
114+
******************************************************************************/

0 commit comments

Comments
 (0)