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Ivan Serdyuk
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‎Getting Started with RV32M1 SDK RISCV.pdf

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‎LA_OPT_NXP_Software_License.htm

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‎LA_OPT_WOLFSSL_EVAL.htm

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‎RISCV/core_riscv32.h

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/*
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* Copyright 2017 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* Copyright (c) 2009 - 2015 ARM LIMITED
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of ARM nor the names of its contributors may be used
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to endorse or promote products derived from this software without
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specific prior written permission.
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*
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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---------------------------------------------------------------------------*/
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#ifndef __CORE_RISCV32_H__
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#define __CORE_RISCV32_H__
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define RISCV32
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#if defined ( __GNUC__ )
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#define __ASM __asm /*!< asm keyword for GNU Compiler */
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#define __INLINE inline /*!< inline keyword for GNU Compiler */
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#define __STATIC_INLINE static inline
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#else
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#error Unknown compiler
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#endif
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#if defined ( __GNUC__ )
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#define __BKPT(x) __ASM("ebreak")
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__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
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{
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__ASM volatile ("nop");
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}
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__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
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{
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__ASM volatile ("nop");
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}
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__attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
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{
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__ASM volatile ("nop");
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}
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__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
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{
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__ASM volatile ("wfi");
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}
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__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
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{
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}
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__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
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{
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__ASM volatile ("csrsi mstatus, 8");
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}
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__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
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{
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__ASM volatile ("csrci mstatus, 8");
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}
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__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
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{
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return __builtin_bswap32(value);
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}
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__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
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{
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return __builtin_bswap16(value);
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}
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#else
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#error Unknown compiler
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#endif
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#ifdef __cplusplus
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#define __I volatile /*!< Defines 'read only' permissions */
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#else
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#define __I volatile const /*!< Defines 'read only' permissions */
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#endif
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#define __O volatile /*!< Defines 'write only' permissions */
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#define __IO volatile /*!< Defines 'read / write' permissions */
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/* following defines should be used for structure members */
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#define __IM volatile const /*! Defines 'read only' structure member permissions */
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#define __OM volatile /*! Defines 'write only' structure member permissions */
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#define __IOM volatile /*! Defines 'read / write' structure member permissions */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CORE_RISCV32_H__ */

‎SW-Content-Register.txt

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Release Name: MCUXpresso Software Development Kit (SDK)
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Release Version: 2.2.0
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FatFs Approved Open Source License: Yes
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Author: Electronic Lives Mfg. by ChaN of Ageo
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city, Japan (hobbyist)
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Description: FatFs is a generic FAT file system
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module for small embedded systems.
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Format: source code
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License: Open Source - FatFs License,
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<rootfolder>/middleware/fatfs/doc/en/appnote.html
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Location: middleware/fatfs_0.12c
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name: FatFs
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URL: http://elm-chan.org/fsw/ff/00index_e.html
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version: 0.12c
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FreeRTOS(tm) Author: Real Time Engineers, Ltd.
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Description: A real-time operating system(RTOS)
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from Real Time Engineers, Ltd.
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Format: source code
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License: Modified GPLv2. See
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,<rootfolder>/rtos/freertos/License/license.txt.
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Location: rtos/freertos_9.0.0
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name: FreeRTOS(tm)
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URL: http://www.freertos.org
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version: 9.0.0
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KSDK Peripheral Driver Description: Peripheral drivers are designed for
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the most common use cases indentified for
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the underlying hardware block.
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Author: Freescale
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Version: 2.x.x
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License: Open Source - BSD-3-Clause
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Format: source code
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Location: devices/<device_name>/drivers
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Kinetis_BLE version: 1.4.0
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Location: middleware/wireless/bluetooth_1.4.0
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Description: Bluetooth Low Energy Software
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License: Open Source - BSD-3-Clause
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Author: NXP
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name: Bluetooth Low Energy Application Source
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Format: Source code and header Files
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Kinetis_BLE_ControllerLib version: 4.2.0
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Location:
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middleware/wireless/bluetooth_1.4.0/controller/lib
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Description: Bluetooth Low Energy Controller
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Firmware. Host Command Interface (HCI).
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License: Proprietary
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Author: Mindtree
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name: Bluetooth Low Energy Controller Firmware
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Format: Binary libraries
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Kinetis_BLE_HostLib version: 1.4.0
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Location:
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middleware/wireless/bluetooth_1.4.0/host/lib
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Description: Bluetooth Low Energy Stack (HCI,
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L2CAP, ATT, GATT, GAP and SM)
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License: Proprietary, See EULA LA_OPT_EVAL_DEMO_ONLY_License
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v20 June 2017
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Author: NXP
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name: Bluetooth Low Energy Host Firmware
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Format: Binary libraries
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Kinetis_FWK version: 5.5.1
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Location: middleware/wireless/framework_5.5.1
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Description: Kinetis Connectivity Framework
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middleware for Connectivity stacks
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License: Open Source - BSD-3-Clause
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Author: NXP
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name: Kinetis Connectivity Framework
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Format: Source code
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Multicore SDK version: 2.3.1
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Location: middleware/multicore_2.3.1
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Description: Freescale Multicore Software
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Development Kit.
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License: Open Source - BSD-3-Clause
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Author: Freescale
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name: Multicore SDK
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Format: source code
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84+
RPMsg-Lite version: NA
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Location: middleware/multicore_2.3.1/rpmsg_lite/
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Description: Open Asymmetric Multi Processing
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(OpenAMP) framework project
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License: Open Source - BSD-3-Clause
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Author: Mentor Graphics Corporation & community
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contributors
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name: RPMsg-Lite
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Format: source code
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URL: https://github.com/OpenAMP/open-amp
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SD MMC Card middleware name: SD MMC Card middleware
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Location: middleware/sdmmc_2.1.2
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License: Open Source - BSD-3-Clause
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Description: A software component support SD card,
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eMMC card.
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Author: Freescale
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version: 2.1.2
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Format: source code
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USB version: 1.6.3
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Location: middleware/usb_1.6.3
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Description: Freescale USB stack. This is a
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version of the USB stack that has been integrated
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with the MCUXpresso SDK.
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License: Open Source - BSD-3-Clause
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Author: Freescale
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name: USB
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Format: source code
113+
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wifi_qca version: 2.0.0
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Location: middleware/wifi_qca_2.0.0
116+
Description: Qualcomm Wi-Fi stack
117+
License: Open Source - BSD-3-Clause
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Author: Qualcomm Atheros, Inc.
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name: wifi_qca
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Format: source code
121+
URL: https://www.qualcomm.com/products/wifi-
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platforms
123+
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wolfSSL Author: wolfSSL Inc.
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Description: wolfSSL is cryptography and SSL/TLS
126+
library
127+
Format: source code
128+
License: 3rd party evaluation. See <rootfolder>/mi
129+
ddleware/wolfssl_3.9.8/wolfSSL_cyaSSL_evaluation_l
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icense_agreement.pdf
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Location: middleware/wolfssl_3.9.8
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name: wolfSSL
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URL: https://www.wolfssl.com
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version: 3.9.8

‎boards/rv32m1_vega/demo_apps/bubble/pin_mux.c

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/*
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* Copyright 2017 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Pins v3.0
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processor: RV32M1
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package_id: RV32M1
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mcu_data: ksdk2_0
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processor_version: 0.0.0
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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#include "fsl_common.h"
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#include "fsl_port.h"
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#include "pin_mux.h"
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/*FUNCTION**********************************************************************
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*
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* Function Name : BOARD_InitBootPins
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* Description : Calls initialization functions.
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*
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*END**************************************************************************/
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void BOARD_InitBootPins(void) {
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BOARD_InitPins();
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}
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#define PIN7_IDX 7u /*!< Pin number for pin 7 in a port */
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#define PIN8_IDX 8u /*!< Pin number for pin 8 in a port */
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#define PIN23_IDX 23u /*!< Pin number for pin 23 in a port */
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#define PIN24_IDX 24u /*!< Pin number for pin 24 in a port */
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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BOARD_InitPins:
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- options: {callFromInitBoot: 'true', coreID: cm4, enableClock: 'true'}
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- pin_list:
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- {pin_num: N2, peripheral: LPUART0, signal: RX, pin_signal: LPCMP0_IN0/PTC7/LLWU_P15/LPSPI0_PCS3/LPUART0_RX/LPI2C1_HREQ/TPM0_CH0/LPTMR1_ALT1}
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- {pin_num: P3, peripheral: LPUART0, signal: TX, pin_signal: LPCMP0_IN1/PTC8/LPSPI0_SCK/LPUART0_TX/LPI2C0_HREQ/TPM0_CH1}
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- {pin_num: D6, peripheral: TPM2, signal: 'CH, 0', pin_signal: PTA24/LPSPI2_PCS0/LPSPI1_SCK/LPI2C2_SCL/FB_OE_b/TPM2_CH0}
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- {pin_num: E6, peripheral: TPM2, signal: 'CH, 1', pin_signal: PTA23/LPSPI2_SIN/LPSPI1_PCS3/LPI2C2_SDA/FB_AD15/TPM2_CH1}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/*FUNCTION**********************************************************************
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*
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* Function Name : BOARD_InitPins
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* Description : Configures pin routing and optionally pin electrical features.
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*
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*END**************************************************************************/
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void BOARD_InitPins(void) {
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CLOCK_EnableClock(kCLOCK_PortA); /* Clock Gate Control: 0x01u */
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CLOCK_EnableClock(kCLOCK_PortC); /* Clock Gate Control: 0x01u */
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PORT_SetPinMux(PORTA, PIN23_IDX, kPORT_MuxAlt6); /* PORTA23 (pin E6) is configured as TPM2_CH1 */
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PORT_SetPinMux(PORTA, PIN24_IDX, kPORT_MuxAlt6); /* PORTA24 (pin D6) is configured as TPM2_CH0 */
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PORT_SetPinMux(PORTC, PIN7_IDX, kPORT_MuxAlt3); /* PORTC7 (pin N2) is configured as LPUART0_RX */
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PORT_SetPinMux(PORTC, PIN8_IDX, kPORT_MuxAlt3); /* PORTC8 (pin P3) is configured as LPUART0_TX */
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}
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#define PIN29_IDX 29u /*!< Pin number for pin 29 in a port */
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#define PIN30_IDX 30u /*!< Pin number for pin 30 in a port */
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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BOARD_I2C_ConfigurePins:
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- options: {coreID: cm4, enableClock: 'true'}
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- pin_list:
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- {pin_num: G15, peripheral: LPI2C3, signal: SDA, pin_signal: PTE29/LPUART3_RX/LPI2C3_SDA/FXIO0_D30, slew_rate: fast, open_drain: enable, pull_select: up, pull_enable: enable}
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- {pin_num: G17, peripheral: LPI2C3, signal: SCL, pin_signal: PTE30/LPUART3_TX/LPI2C3_SCL/TPM2_CLKIN/FXIO0_D31, slew_rate: fast, open_drain: enable, pull_select: up,
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pull_enable: enable}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/*FUNCTION**********************************************************************
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*
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* Function Name : BOARD_I2C_ConfigurePins
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* Description : Configures pin routing and optionally pin electrical features.
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*
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*END**************************************************************************/
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void BOARD_I2C_ConfigurePins(void) {
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CLOCK_EnableClock(kCLOCK_PortE); /* Clock Gate Control: 0x01u */
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const port_pin_config_t porte29_pinG15_config = {
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kPORT_PullUp, /* Internal pull-up resistor is enabled */
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kPORT_FastSlewRate, /* Fast slew rate is configured */
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kPORT_PassiveFilterDisable, /* Passive filter is disabled */
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kPORT_OpenDrainEnable, /* Open drain is enabled */
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kPORT_LowDriveStrength, /* Low drive strength is configured */
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kPORT_MuxAlt3, /* Pin is configured as LPI2C3_SDA */
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kPORT_UnlockRegister /* Pin Control Register fields [15:0] are not locked */
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};
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PORT_SetPinConfig(PORTE, PIN29_IDX, &porte29_pinG15_config); /* PORTE29 (pin G15) is configured as LPI2C3_SDA */
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const port_pin_config_t porte30_pinG17_config = {
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kPORT_PullUp, /* Internal pull-up resistor is enabled */
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kPORT_FastSlewRate, /* Fast slew rate is configured */
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kPORT_PassiveFilterDisable, /* Passive filter is disabled */
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kPORT_OpenDrainEnable, /* Open drain is enabled */
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kPORT_LowDriveStrength, /* Low drive strength is configured */
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kPORT_MuxAlt3, /* Pin is configured as LPI2C3_SCL */
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kPORT_UnlockRegister /* Pin Control Register fields [15:0] are not locked */
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};
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PORT_SetPinConfig(PORTE, PIN30_IDX, &porte30_pinG17_config); /* PORTE30 (pin G17) is configured as LPI2C3_SCL */
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}
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/*******************************************************************************
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* EOF
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******************************************************************************/

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