The Advanced Encryption Standard (AES), also known as Rijndael, is one of the most widely used encryption algorithms in Computer Networks (Read more on Wikipedia). This Verilog code implements the 128-AES encryption unit.
Create a new project in your desired synthesis or simulation tool, and add all ".v" files to your project. Remember to choose "AES_128.v" as the top-level module. The project is tested on Altera Quartus Prime Lite Edition v16.1.