v1.2.4 patch

Author: kristopk

hdk/cl/examples/cl_dram_dma/build/scripts/create_dcp_from_cl.tcl

@@ -347,10 +347,6 @@ if { $failval==0 } {
 puts "AWS FPGA: ([clock format [clock seconds] -format %T]) writing post synth checkpoint.";
 
 write_checkpoint -force $CL_DIR/build/checkpoints/${timestamp}.CL.post_synth.dcp
-
-# Generate debug probes file
-write_debug_probes -force -no_partial_ltxfile -file $CL_DIR/build/checkpoints/${timestamp}.debug_probes.ltx
-
 close_project
 
 #Set param back to default value