diff --git a/bittide/src/Bittide/SwitchDemoProcessingElement.hs b/bittide/src/Bittide/SwitchDemoProcessingElement.hs
index 8352869a5..4ba015a14 100644
--- a/bittide/src/Bittide/SwitchDemoProcessingElement.hs
+++ b/bittide/src/Bittide/SwitchDemoProcessingElement.hs
@@ -38,10 +38,10 @@ switchDemoPe ::
 switchDemoPe SNat localCounter linkIn maybeDna readStart readCycles writeStart writeCycles =
   (linkOut, buffer)
  where
-  readStartLocked = regEn maxBound (peState .==. pure Idle) readStart
-  readCyclesLocked = regEn maxBound (peState .==. pure Idle) ((* 3) . zeroExtend <$> readCycles)
-  writeStartLocked = regEn maxBound (peState .==. pure Idle) writeStart
-  writeCyclesLocked = regEn maxBound (peState .==. pure Idle) ((* 3) . zeroExtend <$> writeCycles)
+  readStartLocked = regEn maxBound (prevPeState .==. pure Idle) readStart
+  readCyclesLocked = regEn maxBound (prevPeState .==. pure Idle) ((* 3) . zeroExtend <$> readCycles)
+  writeStartLocked = regEn maxBound (prevPeState .==. pure Idle) writeStart
+  writeCyclesLocked = regEn maxBound (prevPeState .==. pure Idle) ((* 3) . zeroExtend <$> writeCycles)
 
   localData :: Signal dom (Vec 3 (BitVector 64))
   localData = bundle (unbundle dnaVec :< (pack <$> localCounter))