STM32: Use WWDT to implement mos watchdog

IWDT cannot be disabled and interferes with sleep (wakes up the system from standby).
So we use WWDT, which is stopped when going into standby.

However, WWDT is more tircky to use - it runs off PCLK with divider that
is not big enough to handle reasonable timeouts just by itself:
with 80 MHz PCLK maximum possible interval is 25 ms.
So we have to use and count interrupts ourselves.

Author: rojer

.clang-format

@@ -3,3 +3,4 @@ AllowShortFunctionsOnASingleLine: false
 SpaceAfterCStyleCast: true
 PointerBindsToType: false
 DerivePointerBinding: false
+IncludeBlocks: Preserve

platforms/stm32/Makefile.build

@@ -158,7 +158,7 @@ MGOS_SRCS += $(notdir $(MGOS_CONFIG_C)) $(notdir $(MGOS_RO_VARS_C)) \
              mgos_dlsym.c mgos_file_utils.c mgos_system.c mgos_utils.c \
              arm_exc_top.S arm_exc.c arm_nsleep100.c \
              stm32_entry.c stm32_gpio.c \
-             stm32_hal.c stm32_hw_timers.c \
+             stm32_hal.c stm32_ints.c stm32_hw_timers.c \
              stm32_libc.c \
              stm32_main.c stm32_uart.c \
              error_codes.cpp status.cpp

platforms/stm32/include/stm32_system.h

@@ -30,6 +30,8 @@ void stm32_set_int_handler(int irqn, void (*handler)(void));
 
 extern uint32_t SystemCoreClockMHZ;
 
+void stm32_setup_int_vectors(void);
+
 #ifdef __cplusplus
 }
 #endif

platforms/stm32/src/stm32_hal.c

@@ -27,12 +27,14 @@
 
 #include "mongoose.h"
 
+#include "mgos_core_dump.h"
 #include "mgos_hal.h"
 #include "mgos_mongoose.h"
 #include "mgos_sys_config.h"
 #include "mgos_timers.h"
 #include "mgos_utils.h"
 
+#include "stm32_system.h"
 #include "stm32_uart.h"
 
 void mgos_dev_system_restart(void) {
@@ -105,43 +107,72 @@ uint32_t HAL_GetTick(void) {
   return xTaskGetTickCount() * portTICK_PERIOD_MS;
 }
 
-#define IWDG_1_SECOND 128
-IWDG_HandleTypeDef hiwdg = {
-    .Instance = IWDG,
+WWDG_HandleTypeDef hwwdg = {
+    .Instance = WWDG,
     .Init =
         {
-            .Prescaler = IWDG_PRESCALER_256,
-            .Reload = 5 * IWDG_1_SECOND,
-#ifdef IWDG_WINDOW_DISABLE
-            .Window = IWDG_WINDOW_DISABLE,
-#endif
+            .Prescaler = WWDG_PRESCALER_8,
+            .Window = 0x7f,
+            .Counter = 0x7f,
+            .EWIMode = WWDG_EWI_ENABLE,
         },
 };
 
+#define WWDT_MAGIC_OFF 0xf001
+
+static int s_wwdt_ttl = 0;
+static int s_wwdt_reload = 50;
+
+IRAM static void stm32_wwdg_int_handler(void) {
+  if (s_wwdt_ttl != WWDT_MAGIC_OFF) {
+    s_wwdt_ttl--;
+    if ((s_wwdt_ttl & 0xffff0000) == 0) {
+      HAL_WWDG_Refresh(&hwwdg);
+    } else {
+      // TTL expired or has been smashed, explode.
+      // Refresh one last time to get the message out.
+      HAL_WWDG_Refresh(&hwwdg);
+      mgos_cd_printf("!! WDT\n");
+      // TODO(rojer): Trigger core dump.
+      // Do not refresh anymore, WDT will reset the device soon.
+      while (1) {
+      }
+    }
+  } else {
+    HAL_WWDG_Refresh(&hwwdg);
+  }
+  __HAL_WWDG_CLEAR_FLAG(&hwwdg, WWDG_FLAG_EWIF);
+}
+
 void mgos_wdt_enable(void) {
-  HAL_IWDG_Init(&hiwdg);
+  __HAL_RCC_WWDG_CLK_ENABLE();
+  stm32_set_int_handler(WWDG_IRQn, stm32_wwdg_int_handler);
+  HAL_NVIC_SetPriority(WWDG_IRQn, 0, 0);  // Highest possible prio.
+  HAL_NVIC_EnableIRQ(WWDG_IRQn);
+  HAL_WWDG_Init(&hwwdg);
 }
 
 void mgos_wdt_feed(void) {
-  HAL_IWDG_Refresh(&hiwdg);
+  s_wwdt_ttl = s_wwdt_reload;
+  HAL_WWDG_Refresh(&hwwdg);
+  /*
+   * For backward compatibility with older bootloaders we have to feed IWDG.
+   * We only do it if we detect the calue BL sets (10 seconds).
+   */
+  if (IWDG->RLR == 10 * 128) {
+    IWDG->KR = IWDG_KEY_RELOAD;
+  }
 }
 
 void mgos_wdt_set_timeout(int secs) {
-  uint32_t new_reload = (secs * IWDG_1_SECOND);
-  if (!IS_IWDG_RELOAD(new_reload)) {
-    LOG(LL_ERROR, ("Invalid WDT reload value %lu", new_reload));
-    return;
-  }
-  hiwdg.Init.Reload = new_reload;
-  HAL_IWDG_Init(&hiwdg);
+  uint32_t f_wwdt = HAL_RCC_GetPCLK1Freq();  // Valid for F2, F4, F7 and L4.
+  uint32_t ints_per_sec = f_wwdt / 4096 / 8 / (0x7f - 0x41);
+  s_wwdt_reload = ints_per_sec * secs;
+  mgos_wdt_feed();
 }
 
 void mgos_wdt_disable(void) {
-  static bool printed = false;
-  if (!printed) {
-    printed = true;
-    LOG(LL_ERROR, ("Once enabled, WDT cannot be disabled!"));
-  }
+  s_wwdt_ttl = WWDT_MAGIC_OFF;
 }
 
 uint32_t mgos_get_cpu_freq(void) {

platforms/stm32/src/stm32_ints.c

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2014-2018 Cesanta Software Limited
+ * All rights reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the ""License"");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an ""AS IS"" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <string.h>
+
+#include "common/platform.h"
+
+#include "stm32_sdk_hal.h"
+#include "stm32_system.h"
+
+void (*stm32_int_vectors[256])(void)
+    __attribute__((section(".ram_int_vectors")));
+extern const void *stm32_flash_int_vectors[2];
+
+extern void arm_exc_handler_top(void);
+
+void stm32_set_int_handler(int irqn, void (*handler)(void)) {
+  stm32_int_vectors[irqn + 16] = handler;
+}
+
+void stm32_setup_int_vectors(void) {
+  /* Move int vectors to RAM. */
+  for (int i = 0; i < (int) ARRAY_SIZE(stm32_int_vectors); i++) {
+    stm32_int_vectors[i] = arm_exc_handler_top;
+  }
+  memcpy(stm32_int_vectors, stm32_flash_int_vectors,
+         sizeof(stm32_flash_int_vectors));
+  SCB->VTOR = (uint32_t) &stm32_int_vectors[0];
+}

platforms/stm32/src/stm32_main.c

@@ -101,17 +101,6 @@ void SystemCoreClockUpdate(void) {
 }
 
 #ifndef MGOS_BOOT_BUILD
-void (*stm32_int_vectors[256])(void)
-    __attribute__((section(".ram_int_vectors")));
-extern const void *stm32_flash_int_vectors[2];
-
-extern void arm_exc_handler_top(void);
-extern void __libc_init_array(void);
-
-void stm32_set_int_handler(int irqn, void (*handler)(void)) {
-  stm32_int_vectors[irqn + 16] = handler;
-}
-
 static void stm32_dump_sram(void) {
   mgos_cd_write_section("SRAM", (void *) STM32_SRAM_BASE_ADDR, STM32_SRAM_SIZE);
 }
@@ -123,20 +112,26 @@ static void stm32_dump_sram2(void) {
 }
 #endif
 
+extern void __libc_init_array(void);
+
 int main(void) {
-  /* Move int vectors to RAM. */
-  for (int i = 0; i < (int) ARRAY_SIZE(stm32_int_vectors); i++) {
-    stm32_int_vectors[i] = arm_exc_handler_top;
+  stm32_setup_int_vectors();
+  if ((WWDG->CR & WWDG_CR_WDGA) != 0) {
+    // WWDG was started by boot loader and is already ticking,
+    // we have to reconfigure the int handler *now*.
+    mgos_wdt_enable();
+    mgos_wdt_set_timeout(10 /* seconds */);
   }
-  memcpy(stm32_int_vectors, stm32_flash_int_vectors,
-         sizeof(stm32_flash_int_vectors));
-  SCB->VTOR = (uint32_t) &stm32_int_vectors[0];
-
   stm32_system_init();
   __libc_init_array();
   stm32_clock_config();
   SystemCoreClockUpdate();
 
+  if ((WWDG->CR & WWDG_CR_WDGA) != 0) {
+    // APB clock has most likely changed, recalculate the WDT timings.
+    mgos_wdt_set_timeout(10 /* seconds */);
+  }
+
   mgos_cd_register_section_writer(arm_exc_dump_regs);
   mgos_cd_register_section_writer(stm32_dump_sram);
 #if STM32_SRAM2_SIZE > 0