@@ -283,14 +283,19 @@ uint32_t sys_clock_cycle_get_32(void)
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static int sys_clock_driver_init (const struct device * dev )
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{
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+ int err ;
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+
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ARG_UNUSED (dev );
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if (!device_is_ready (clk_ctrl )) {
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return - ENODEV ;
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}
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/* Enable LPTIM bus clock */
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- clock_control_on (clk_ctrl , (clock_control_subsys_t * ) & lptim_clk [0 ]);
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+ err = clock_control_on (clk_ctrl , (clock_control_subsys_t * ) & lptim_clk [0 ]);
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+ if (err < 0 ) {
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+ return - EIO ;
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+ }
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#if defined(LL_APB1_GRP1_PERIPH_LPTIM1 )
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LL_APB1_GRP1_ReleaseReset (LL_APB1_GRP1_PERIPH_LPTIM1 );
@@ -308,13 +313,20 @@ static int sys_clock_driver_init(const struct device *dev)
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}
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/* Enable LPTIM clock source */
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- clock_control_configure (clk_ctrl , (clock_control_subsys_t * ) & lptim_clk [1 ],
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- NULL );
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+ err = clock_control_configure (clk_ctrl ,
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+ (clock_control_subsys_t * ) & lptim_clk [1 ],
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+ NULL );
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+ if (err < 0 ) {
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+ return - EIO ;
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+ }
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/* Get LPTIM clock freq */
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- clock_control_get_rate (clk_ctrl , (clock_control_subsys_t * ) & lptim_clk [1 ],
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+ err = clock_control_get_rate (clk_ctrl , (clock_control_subsys_t * ) & lptim_clk [1 ],
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& lptim_clock_freq );
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+ if (err < 0 ) {
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+ return - EIO ;
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+ }
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#if defined(CONFIG_SOC_SERIES_STM32L0X )
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/* Driver only supports freqs up to 32768Hz. On L0, LSI freq is 37KHz,
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* which will overflow the LPTIM counter.
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