Caliptra SS integration questions

[jchanga]

Hello,

A few questions from Caliptra SS v0.8:

1. Are all memories in Integration Spec Memory Requirements table required, including ones that are not shown in Subsystem Block Diagram? For example, mcu iccm, ic, ic_tag.
2. Is clock requirement frequency 200MHz exact? What are the reasons behind such requirement?
3. Is it possible to modify caliptra_ss_top.sv without violating Trademark requirements? For example, it might be desired to bring out otp_ctrl.scanmode_i.
4. Is Caliptra internal TRNG is only option as all trng signals, including etrng_req, are removed if CALIPTRA_INTERNAL_TRNG is not defined?
5. Do all fields in otp_ctrl_mmap.md need physical fuse backing, i.e. total of 1337 bytes?

Thanks,
Jonathan