From a410089df62925fd38c64e7e3682d7b851f8d000 Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Mon, 3 Feb 2025 10:39:26 -0800
Subject: [PATCH 01/20] fixed drbg bug and updated tb

---
 src/hmac_drbg/rtl/hmac_drbg.sv   |   9 +-
 src/hmac_drbg/tb/hmac_drbg_tb.sv | 230 ++++++++++++++++++++++++++++++-
 2 files changed, 232 insertions(+), 7 deletions(-)

diff --git a/src/hmac_drbg/rtl/hmac_drbg.sv b/src/hmac_drbg/rtl/hmac_drbg.sv
index fadf2474b..78ed4fb74 100644
--- a/src/hmac_drbg/rtl/hmac_drbg.sv
+++ b/src/hmac_drbg/rtl/hmac_drbg.sv
@@ -279,7 +279,7 @@ module hmac_drbg
       K21_ST:         HMAC_block  = {nonce[135:0], 1'h1, 875'b0, 12'h888};
       V2_ST:          HMAC_block  = {V_reg, 1'h1, ZERO_PAD_V, V_SIZE};
       T_ST:           HMAC_block  = {V_reg, 1'h1, ZERO_PAD_V, V_SIZE};
-      K3_ST:          HMAC_block  = {V_reg, 8'h00, 1'h1, 619'b0, 12'h578};
+      K3_ST:          HMAC_block  = {V_reg, 8'h00, 1'h1, 619'b0, 12'h588};
       V3_ST:          HMAC_block  = {V_reg, 1'h1, ZERO_PAD_V, V_SIZE};
       default:        HMAC_block  = '0;
     endcase
@@ -293,9 +293,8 @@ module hmac_drbg
       cnt_reg    <= '0;
     else begin
       unique case (drbg_st_reg)
-        INIT_ST:      cnt_reg    <= '0;
-        NEXT_ST:      cnt_reg    <= cnt_reg + 1;
-        K2_INIT_ST:   cnt_reg    <= cnt_reg + 1;
+        INIT_ST:      cnt_reg    <= 8'h0;
+        K2_INIT_ST:   cnt_reg    <= 8'h1;
         default:      cnt_reg    <= cnt_reg;
       endcase
     end
@@ -345,7 +344,7 @@ module hmac_drbg
       end
 
       INIT_ST:    drbg_next_st      = K10_ST;
-      NEXT_ST:    drbg_next_st      = K10_ST;
+      NEXT_ST:    drbg_next_st      = K3_ST;
       K10_ST:     drbg_next_st      = (HMAC_tag_valid_edge)? K11_ST : K10_ST;
       K11_ST:     drbg_next_st      = (HMAC_tag_valid_edge)? V1_ST : K11_ST;
       V1_ST:      drbg_next_st      = (HMAC_tag_valid_edge)? K2_INIT_ST : V1_ST;
diff --git a/src/hmac_drbg/tb/hmac_drbg_tb.sv b/src/hmac_drbg/tb/hmac_drbg_tb.sv
index a2811cb1f..5e959393d 100644
--- a/src/hmac_drbg/tb/hmac_drbg_tb.sv
+++ b/src/hmac_drbg/tb/hmac_drbg_tb.sv
@@ -56,7 +56,7 @@ module hmac_drbg_tb();
   wire                       valid_tb;
 
   //Data
-  reg   [147 : 0]            lfsr_seed_tb;
+  reg   [383 : 0]            lfsr_seed_tb;
   reg   [383 : 0]            entropy_tb;
   reg   [383 : 0]            nonce_tb;
   wire  [383 : 0]            drbg_tb;
@@ -142,7 +142,7 @@ module hmac_drbg_tb();
       $display("");
       $display("HMAC block: 0x%096x",hmac_drbg_dut.HMAC_block);
       $display("HMAC key: 0x%096x",hmac_drbg_dut.HMAC_key);
-      $display("HMAC lfsr_seed: 0x%096x",hmac_drbg_dut.HMAC_lfsr_seed);
+      $display("HMAC lfsr_seed: 0x%096x",hmac_drbg_dut.lfsr_seed);
       $display("HMAC tag: 0x%096x",hmac_drbg_dut.HMAC_tag);
       $display("");
 
@@ -267,6 +267,185 @@ module hmac_drbg_tb();
     end
   endtask // hmac384_drbg
 
+  //----------------------------------------------------------------
+  // hmac384_drbg_two_rounds()
+  //
+  //----------------------------------------------------------------
+  task hmac384_drbg_two_rounds(input [383 : 0] entropy, input [383 : 0] nonce,
+                  input [383 : 0] lfsr_seed, input  [1 : 0][383 : 0] expected_drbg);
+    begin
+        if (!ready_tb)
+            wait(ready_tb);
+            
+        $display("The HMAC DRBG core is triggered...");
+        
+        entropy_tb = entropy;
+        nonce_tb = nonce;
+        lfsr_seed_tb = lfsr_seed;
+
+        $display("*** entropy   : %096x", entropy_tb);
+        $display("*** nonce     : %096x", nonce_tb);
+        $display("*** lfsr_seed : %096x", lfsr_seed);
+
+        #(1 * CLK_PERIOD);
+        init_tb = 1'b1;  
+
+        #(1 * CLK_PERIOD);
+        init_tb = 1'b0;
+
+        #(2 * CLK_PERIOD);
+        
+
+        wait(valid_tb);
+        $display("The HMAC DRBG core completed the execution");
+
+        if (drbg_tb == expected_drbg[0])
+          begin
+            $display("*** TC %0d successful.", tc_number);
+            $display("");
+          end
+        else
+          begin
+            $display("*** ERROR: TC %0d NOT successful.", tc_number);
+            $display("Expected: 0x%096x", expected_drbg[0]);
+            $display("Got:      0x%096x", drbg_tb);
+            $display("");
+            error_ctr = error_ctr + 1;
+          end
+
+        #(1 * CLK_PERIOD);
+        next_tb = 1'b1;  
+
+        #(1 * CLK_PERIOD);
+        next_tb = 1'b0;
+
+        #(2 * CLK_PERIOD);
+        
+
+        wait(valid_tb);
+        $display("The HMAC DRBG core completed the execution");
+
+        if (drbg_tb == expected_drbg[1])
+          begin
+            $display("*** TC %0d successful.", tc_number);
+            $display("");
+          end
+        else
+          begin
+            $display("*** ERROR: TC %0d NOT successful.", tc_number);
+            $display("Expected: 0x%096x", expected_drbg[1]);
+            $display("Got:      0x%096x", drbg_tb);
+            $display("");
+            error_ctr = error_ctr + 1;
+          end
+
+        tc_number = tc_number+1;
+
+    end
+  endtask // hmac384_drbg_two_rounds
+
+
+  //----------------------------------------------------------------
+  // hmac384_drbg_three_rounds()
+  //
+  //----------------------------------------------------------------
+  task hmac384_drbg_three_rounds(input [383 : 0] entropy, input [383 : 0] nonce,
+                  input [383 : 0] lfsr_seed, input  [2 : 0][383 : 0] expected_drbg);
+    begin
+        if (!ready_tb)
+            wait(ready_tb);
+            
+        $display("The HMAC DRBG core is triggered...");
+        
+        entropy_tb = entropy;
+        nonce_tb = nonce;
+        lfsr_seed_tb = lfsr_seed;
+
+        $display("*** entropy   : %096x", entropy_tb);
+        $display("*** nonce     : %096x", nonce_tb);
+        $display("*** lfsr_seed : %096x", lfsr_seed);
+
+        #(1 * CLK_PERIOD);
+        init_tb = 1'b1;  
+
+        #(1 * CLK_PERIOD);
+        init_tb = 1'b0;
+
+        #(2 * CLK_PERIOD);
+        
+
+        wait(valid_tb);
+        $display("The HMAC DRBG core completed the execution");
+
+        if (drbg_tb == expected_drbg[0])
+          begin
+            $display("*** TC %0d successful.", tc_number);
+            $display("");
+          end
+        else
+          begin
+            $display("*** ERROR: TC %0d NOT successful.", tc_number);
+            $display("Expected: 0x%096x", expected_drbg[0]);
+            $display("Got:      0x%096x", drbg_tb);
+            $display("");
+            error_ctr = error_ctr + 1;
+          end
+
+        #(1 * CLK_PERIOD);
+        next_tb = 1'b1;  
+
+        #(1 * CLK_PERIOD);
+        next_tb = 1'b0;
+
+        #(2 * CLK_PERIOD);
+        
+
+        wait(valid_tb);
+        $display("The HMAC DRBG core completed the execution");
+
+        if (drbg_tb == expected_drbg[1])
+          begin
+            $display("*** TC %0d successful.", tc_number);
+            $display("");
+          end
+        else
+          begin
+            $display("*** ERROR: TC %0d NOT successful.", tc_number);
+            $display("Expected: 0x%096x", expected_drbg[1]);
+            $display("Got:      0x%096x", drbg_tb);
+            $display("");
+            error_ctr = error_ctr + 1;
+          end
+
+        #(1 * CLK_PERIOD);
+        next_tb = 1'b1;  
+
+        #(1 * CLK_PERIOD);
+        next_tb = 1'b0;
+
+        #(2 * CLK_PERIOD);
+        
+        wait(valid_tb);
+        $display("The HMAC DRBG core completed the execution");
+
+        if (drbg_tb == expected_drbg[2])
+          begin
+            $display("*** TC %0d successful.", tc_number);
+            $display("");
+          end
+        else
+          begin
+            $display("*** ERROR: TC %0d NOT successful.", tc_number);
+            $display("Expected: 0x%096x", expected_drbg[2]);
+            $display("Got:      0x%096x", drbg_tb);
+            $display("");
+            error_ctr = error_ctr + 1;
+          end
+          
+        tc_number = tc_number+1;
+
+    end
+  endtask // hmac384_drbg_three_rounds
   //----------------------------------------------------------------
   // hmac_drbg_test()
   //
@@ -323,9 +502,55 @@ module hmac_drbg_tb();
 
         hmac384_drbg(nist_entropy, nist_nonce, seed, nist_expected); 
 
+        nist_entropy  = 384'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
+        nist_nonce    = 384'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
+        nist_expected = 384'hFEEEF5544A76564990128AD189E873F21F0DFD5AD7E2FA861127EE6E394CA784871C1AEC032C7A8B10B93E0EAB8946D6;
+        seed = random_gen();
+
+        hmac384_drbg(nist_entropy, nist_nonce, seed, nist_expected); 
+
     end
   endtask // hmac_drbg_test
 
+  //----------------------------------------------------------------
+  // hmac_drbg_multi_rounds_test()
+  //
+  //
+  //----------------------------------------------------------------
+  task hmac_drbg_multi_rounds_test;
+    begin
+        reg [383 : 0] hmac384_entropy;
+        reg [383 : 0] hmac384_nonce;
+        reg [2 : 0][383 : 0] hmac384_expected;
+        reg [383 : 0] seed;
+
+        hmac384_entropy  = 384'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
+        hmac384_nonce    = 384'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
+        hmac384_expected[0] = 384'hFEEEF5544A76564990128AD189E873F21F0DFD5AD7E2FA861127EE6E394CA784871C1AEC032C7A8B10B93E0EAB8946D6;
+        hmac384_expected[1] = 384'hd7f1b8ee5fc4eca7b022ccbdc2b03bee146c8985ea52ae400b9e23ce3cb3a95849ef93140c8a519ed8f817e66e6f0de4;
+        seed = random_gen();
+        
+        hmac384_drbg_two_rounds(hmac384_entropy, hmac384_nonce, seed, hmac384_expected[1:0]);
+        
+        hmac384_entropy  = 384'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
+        hmac384_nonce    = 384'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
+        hmac384_expected[0] = 384'h7F68A6D896EA5DA62E78DEDB46F6662BC141F2F0B9E641ACC7342663FD51444E380FEA1DABBCA55F18987C0CFC10DF77;
+        hmac384_expected[1] = 384'hb52178b3c26aeff4a9f2704664c091d8cf57b45d05c2bb8c7bfcf56963fbe7674908ae830bfe10e0de2eccf48fa7b050;
+        seed = random_gen();
+        
+        hmac384_drbg_two_rounds(hmac384_entropy, hmac384_nonce, seed, hmac384_expected[1:0]);
+
+        hmac384_entropy  = 384'hF71EE80F1D123DC3F70EAA1FB3272714858EA555BC496BF39ADB107B192BF0BCBA9BB5B5799CFF8E12A1154F37CA7BBD;
+        hmac384_nonce    = 384'hDE2B2A66EE13797C69438A9BF6F8514C0A8ABEFD3E5533E1119AE88E8D641771E9BCE4CBE44430A0ADAAAB4103095FC4;
+        hmac384_expected[0] = 384'h316f0937ff54b3d16398d5d07799ab59d0e1f3962831101f1eca892f0f1567df2f964c19b8690761d188d2100403eea6;
+        hmac384_expected[1] = 384'h9a42b5046712b4e32c1f9db62a7900d2e0d4e051580b5dc2cbc8498a04df6676ff80b4e6e2b34b29152bd96e5b4eefed;
+        hmac384_expected[2] = 384'h28ff268d4fea88d4bc28a712feb777bb72dace10e9886eefd226615f5f9d508aa8f59d4b087b65d54223a2186f53031b;
+        seed = random_gen();
+        
+        hmac384_drbg_two_rounds(hmac384_entropy, hmac384_nonce, seed, hmac384_expected[1:0]);
+        hmac384_drbg_three_rounds(hmac384_entropy, hmac384_nonce, seed, hmac384_expected);
+    end
+  endtask
 
   //----------------------------------------------------------------
   // always_debug()
@@ -356,6 +581,7 @@ module hmac_drbg_tb();
       //dump_dut_state();
 
       hmac_drbg_test();
+      hmac_drbg_multi_rounds_test();
 
       display_test_results();
 

From 589ab106dc20cc039b4f30983b74cac3f25f016c Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Mon, 3 Feb 2025 12:31:14 -0800
Subject: [PATCH 02/20] added more comments

---
 src/hmac_drbg/rtl/hmac_drbg.sv   | 22 +++++++++++++++++++++-
 src/hmac_drbg/tb/hmac_drbg_tb.sv |  4 ++--
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/src/hmac_drbg/rtl/hmac_drbg.sv b/src/hmac_drbg/rtl/hmac_drbg.sv
index 78ed4fb74..fecbfd8b6 100644
--- a/src/hmac_drbg/rtl/hmac_drbg.sv
+++ b/src/hmac_drbg/rtl/hmac_drbg.sv
@@ -14,7 +14,7 @@
 //
 //======================================================================
 //
-// hmac_drbg.v
+// hmac_drbg.sv
 // ------
 // HMAC384-drbg top-level wrapper with 384 bit data access.
 //
@@ -28,6 +28,26 @@
 // Functionality:
 //         Using the given "entropy" and "nonce", the module  
 //         generates a random number with 384-bit. 
+//         the parameter is :
+//            - [SHA-384]
+//            - [PredictionResistance = False]
+//            - [EntropyInputLen = 384]
+//            - [NonceLen = 384]
+//            - [PersonalizationStringLen = 0]
+//            - [AdditionalInputLen = 0]
+//            - [ReturnedBitsLen = 384]
+//
+//          - INIT: Instantiates HMAC-DRBG with entropy, nonce, (personalization string is empty).
+//                  Then, it calls HMAC_DRBG_Generate_algorithm (additional input string is empty)
+//                  to generate a 384-bit random value while it's in (0, prime) range.
+//                  if the random value is zero or >= prime, it is rejected and a new random value
+//                  is generated by calling HMAC_DRBG_Generate_algorithm.
+//                  There is NO RESEED process.
+//          - NEXT: it calls HMAC_DRBG_Generate_algorithm (additional input string is empty)
+//                  to generate a 384-bit random value while it's in (0, prime) range.
+//                  if the random value is zero or >= prime, it is rejected and a new random value
+//                  is generated by calling HMAC_DRBG_Generate_algorithm.
+//                  There is NO RESEED process.
 //======================================================================
 
 module hmac_drbg  
diff --git a/src/hmac_drbg/tb/hmac_drbg_tb.sv b/src/hmac_drbg/tb/hmac_drbg_tb.sv
index 5e959393d..d21a93f69 100644
--- a/src/hmac_drbg/tb/hmac_drbg_tb.sv
+++ b/src/hmac_drbg/tb/hmac_drbg_tb.sv
@@ -277,7 +277,7 @@ module hmac_drbg_tb();
         if (!ready_tb)
             wait(ready_tb);
             
-        $display("The HMAC DRBG core is triggered...");
+        $display("The HMAC DRBG two rounds is triggered...");
         
         entropy_tb = entropy;
         nonce_tb = nonce;
@@ -355,7 +355,7 @@ module hmac_drbg_tb();
         if (!ready_tb)
             wait(ready_tb);
             
-        $display("The HMAC DRBG core is triggered...");
+        $display("The HMAC DRBG three rounds is triggered...");
         
         entropy_tb = entropy;
         nonce_tb = nonce;

From c57e1d9c026173705ae121ae59daf6a7686bc8ac Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh-Niasar
 <102058313+mojtaba-bisheh@users.noreply.github.com>
Date: Mon, 3 Feb 2025 15:33:50 -0500
Subject: [PATCH 03/20] added hmac-drbg ref model

---
 src/hmac_drbg/tb/hmac_drbg_ref.py | 266 ++++++++++++++++++++++++++++++
 1 file changed, 266 insertions(+)
 create mode 100644 src/hmac_drbg/tb/hmac_drbg_ref.py

diff --git a/src/hmac_drbg/tb/hmac_drbg_ref.py b/src/hmac_drbg/tb/hmac_drbg_ref.py
new file mode 100644
index 000000000..d8e5c31a9
--- /dev/null
+++ b/src/hmac_drbg/tb/hmac_drbg_ref.py
@@ -0,0 +1,266 @@
+import hmac
+import hashlib
+class HMAC_DRBG:
+   def __init__(self, entropy, nonce=b"", personalization=b""):
+       """
+       Instantiates HMAC-DRBG with entropy, nonce, and optional personalization string.
+       """
+       self.hash_function = hashlib.sha384
+       self.seed_length = self.hash_function().digest_size 
+       self.K = b"\x00" * self.seed_length
+       self.V = b"\x01" * self.seed_length
+       seed_material = entropy + nonce + personalization
+       self.update(seed_material)
+   def _hmac(self, key, data):
+       """ Computes HMAC. """
+    #    print("key=", key.hex())
+    #    print("val=", data.hex())
+    #    print("dig=", hmac.new(key, data, self.hash_function).digest().hex(),'\n')
+       return hmac.new(key, data, self.hash_function).digest()
+   def update(self, seed_material=b""):
+       """
+       Updates the internal state with new seed material.
+       """
+       self.K = self._hmac(self.K, self.V + b"\x00" + seed_material)
+       self.V = self._hmac(self.K, self.V)
+       if seed_material:
+           self.K = self._hmac(self.K, self.V + b"\x01" + seed_material)
+           self.V = self._hmac(self.K, self.V)
+   def reseed(self, additional_entropy):
+       """ Reseeds the DRBG with new entropy. """
+       self.update(additional_entropy)
+   def generate(self, num_bytes, additional_input=b""):
+       """
+       Generates `num_bytes` random bytes.
+       """
+       if additional_input:
+           self.update(additional_input)
+       output = b""
+       while len(output) < num_bytes:
+           self.V = self._hmac(self.K, self.V)
+           output += self.V
+       self.update(additional_input)
+       return output[:num_bytes]
+   
+def cavp_no_reseed_test(COUNT, entropy, nonce, personalization, additional_input0, additional_input1, returnedbits_len, expected):
+    returnedbits_len_inbyte = int(returnedbits_len / 8)
+    drbg = HMAC_DRBG(entropy, nonce, personalization)
+    # print("INSTANTIATED V=", drbg.V.hex())
+    # print("INSTANTIATED K=", drbg.K.hex())
+    random_bytes = drbg.generate(returnedbits_len_inbyte, additional_input0)
+    # print("FIRST CALL V=", drbg.V.hex())
+    # print("FIRST CALL K=", drbg.K.hex())
+    # print("first output=",random_bytes.hex())  # Output random data in hex
+    random_bytes = drbg.generate(returnedbits_len_inbyte, additional_input1)
+    # print("Second CALL V=", drbg.V.hex())
+    # print("Second CALL K=", drbg.K.hex())
+    # print("second output=",random_bytes.hex())  # Output random data in hex
+    result = (random_bytes == expected)
+    print("CAVP test number", COUNT,"=", result)
+    return result
+
+def caliptra_test(COUNT, entropy, nonce, expected0, expected1=b"", expected2=b""):
+    returnedbits_len_inbyte = int(384 / 8)
+    drbg = HMAC_DRBG(entropy, nonce)
+    # print("INSTANTIATED V=", drbg.V.hex())
+    # print("INSTANTIATED K=", drbg.K.hex())
+    random_bytes = drbg.generate(returnedbits_len_inbyte)
+    # print("FIRST CALL V=", drbg.V.hex())
+    # print("FIRST CALL K=", drbg.K.hex())
+    # print("first output=",random_bytes.hex())  # Output random data in hex
+    result = (random_bytes == expected0)
+    print("Caliptra INIT test number", COUNT,"=", result)
+    if (expected1):
+        random_bytes = drbg.generate(returnedbits_len_inbyte)
+        # print("Second CALL V=", drbg.V.hex())
+        # print("Second CALL K=", drbg.K.hex())
+        # print("second output=",random_bytes.hex())  # Output random data in hex
+        result = (random_bytes == expected1)
+        print("Caliptra NEXT test number", COUNT,"=", result)
+        if (expected2):
+            random_bytes = drbg.generate(returnedbits_len_inbyte)
+            # print("Third CALL V=", drbg.V.hex())
+            # print("Third CALL K=", drbg.K.hex())
+            # print("Third output=",random_bytes.hex())  # Output random data in hex
+            result = (random_bytes == expected2)
+            print("Caliptra NEXT test number", COUNT,"=", result)
+    return result
+
+def cavp_test_vectors():
+    """
+       from: https://github.com/coruus/nist-testvectors/blob/master/csrc.nist.gov/groups/STM/cavp/documents/drbg/drbgtestvectors/drbgvectors_no_reseed/HMAC_DRBG.rsp
+    """
+
+    ReturnedBitsLen = 1536
+
+    COUNT = 0
+    EntropyInput = bytes.fromhex("a1dc2dfeda4f3a1124e0e75ebfbe5f98cac11018221dda3fdcf8f9125d68447a")
+    Nonce =  bytes.fromhex("bae5ea27166540515268a493a96b5187")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("228293e59b1e4545a4ff9f232616fc5108a1128debd0f7c20ace837ca105cbf24c0dac1f9847dafd0d0500721ffad3c684a992d110a549a264d14a8911c50be8cd6a7e8fac783ad95b24f64fd8cc4c8b649eac2b15b363e30df79541a6b8a1caac238949b46643694c85e1d5fcbcd9aaae6260acee660b8a79bea48e079ceb6a5eaf4993a82c3f1b758d7c53e3094eeac63dc255be6dcdcc2b51e5ca45d2b20684a5a8fa5806b96f8461ebf51bc515a7dd8c5475c0e70f2fd0faf7869a99ab6c")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 1
+    EntropyInput = bytes.fromhex("067fa0e25d71ea392671c24f38ef782ab3587a7b3c77ea756f7bd496b445b7a3")
+    Nonce = bytes.fromhex("ce6acc722768ca0e03784b2217bc60e4")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("16eaa49510ffad8cc21ec32858640a0d6f34cb03e8649022aa5c3f566b44e8ace7c3b056cf2a44b242de09ae21dba4275418933611875841b4f0944a8272848c5dc1aad685935e12511d5ee27e9162d4bb968afab53c4b338269c1c77da9d78617911ed4390cb20e88bf30b74fda66fe05df5537a759061d3ffd9231d811e8b34213f22ab0b0ddafff7749a40243a901c310776e09d2e529806d4d6f0655178953c16707519c3c19b9aaa0d09fb676a9d23525c8bc388053bfccfbc368e3eb04")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 2
+    EntropyInput = bytes.fromhex("9f76503e84727297bc7056c7af917a1c98baa725295457db4fcf54ed09af7f15")
+    Nonce = bytes.fromhex("f39c46142b85a67b4b323594b7e97bde")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("7d6a8bc5a7f057ceed6109bfac2486f80f81373b6b31d062aa1fad6d9eda5874867b9ef007ba5a92ba8f3fca624bfd9f7ee5770bbeb0391394fef783c16a7f003c06e5469bab03445bb28a2111def415d162e40472d3e5ae628c5c63170bb19f741c79a5331c883c12bca429f518bf71b14683a071b6c6e1e55d8c7a0f3942bc12a103556c49ca173e498b3b4a15027145cdaeb195bc8a7e1aa82ebdf6ecd516481a4d21f400d0d71b5894545888fee8beed80d3251647947f5abc4735b47fd0")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 3
+    EntropyInput = bytes.fromhex("e242e5b3b49d87289fe02840dc742a2a6cd9490fe2cce581833dddb1edc0d103")
+    Nonce = bytes.fromhex("f987f5de5c68cd345c81b032ea55f36d")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("3a858345dfaf00defdf6c83114b760ef53b131fbf14bcc4052cd948820eee78a11cbbd8f4baa308e1d187fced74cbf019c1080d9efffd93fda07df051433876d9900c1f9ad36ea1cb04989bb0c55fd6d01e46923f3bc8887ac00ebd4710212114165355361e240b04232df55a81add3fb363f0d4c9c5e3d313bc7caac7d49dca8517cedacf571fde9686ae93d901fb9b17097a638bb9899cfab0ebc9d1f8a43c2eed7c9f326a711d0f5b9cfc5166c9b561824cbd7775ec601ca712b3ddaaa05b")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 4
+    EntropyInput = bytes.fromhex("42cc17365f5ea5fd22bdc4ade715e293064d6794d82bed5b77c4c107a73de1f7")
+    Nonce = bytes.fromhex("6d759e4b191ba01e0ed5dea788ab018d")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("de06dee8c8fe453aa03ac2546c39f5cda12412864d52ed5cbd0d4905dd226746d50d1af9fd3e1d90de0f16295cb7f6f4d3271ef00564709df4b05eb9f8adc0f8e8522b05b9f32c37d8526813898b9f71db57fc8328e3b79144482e8aa55c83934d6e097e43ec6d0bc32edaf8c0e6ca449b2e8388b32b286e2d4f85266b0605fb99d1a647565c95ff7857bcab73662b7218719189d792514edca2b1d0cdcd9b6347e132ef4c323da24ad5afd5ed6f96d27b0f879288e962fa0baca3d5b72b5c70")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 5
+    EntropyInput = bytes.fromhex("d57024a230b825b241c206f7b55e2114461ecc9b75353f12ac1d9ad7e7871481")
+    Nonce = bytes.fromhex("fe401c320f74afdb07f566ea500b0628")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("e8930bd55a0a5a6d83a9b3b2cde7085c2ae467ea4a2e65ca303697d492ca878bcb801769eb1b7ec564586ec8b36d350e192c4fbf03a98be0ddecf56d465914ba353ed7734d19a680fc4593d9234c4ac8c23b7dfa1e26b013f590cca43b9fef126121b4842496b11dea3ef5e981cb357341f03f92a546a62609236ded6f7d814456acc0596d555cbdc02cbd47dae2caa1897831ea464225922c6600a8bb92e711653067f83b21e1df054309858948c11a1399736fc8391c5b0fc35629abfa5650")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 6
+    EntropyInput = bytes.fromhex("059ded79125b2d56d9d52bcc950bf608d1a2373515dafcc81efb6588005a5722")
+    Nonce = bytes.fromhex("d8f5f4181f9f2a316c93fdfbadf50e75")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("db65d2000632c3d7009c227e99c210e5897f4d7edae608a242b5a4f17708613f8c19a4dd65d6bc3ca57737c9bfdcca068288eea49440af768d1fc977c32b065bb71aa3d8c4d77c9e8e8a6166f332a247978a6c41ed253a1b68ad934a3416b40344a681de28638f00b0a0ffb75514c3f62253372f809906043de35e4805b8e962e5eb957f04212835f802b2c0b3e76c7cf239c89adf31909cd6224d542d929f9b20a10ab99a7c631e4e6188fe2ba8f552c9c88fdadb528679fe950431641b8f37")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 7
+    EntropyInput = bytes.fromhex("4630406b475b1263b6078e93e5d4282205958d94eb97d1e66b429fb69ec9fccd")
+    Nonce = bytes.fromhex("0dd9982c338df935e929c42fab66adaf")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("5d80ec072f550981bcaac6787c0488cc470406249ec80f4bf11050630227f8b5ac6b3b369db237d7c24a0980dffe8d3abd9b64fd4efa492349bd4eb6902edb94553546110227d7de5a864ddae8b9fed8de9f0df9c596e39de903fda323ee6f788831452eb9e49c5eef3e058b5bf84f61f735a93e042bb9e458df6b25f42a6eb8fb03d437cfab757fab4990c721a757eaa5e9048208abbcce6e52f177b20dcf52f1fa551a92b68bcdb01680855b8f79131266378cd1f0c2a4141c9675f01d1e48")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 8
+    EntropyInput = bytes.fromhex("6ea9c6f784f12a9707ceac8a7162ee5381dc893ee139f8f4b4d93db266829db4")
+    Nonce =  bytes.fromhex("ae92bc52ff860d8ecdc9fc16bd070130")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("234366f1591cfe244956f9496cdf446e0d390ba64beaa066945b1b4c5337dded2619dd2bd0133a5d612bab7c251ab79e3951cb134894c422553fc8cc7b3ccb29c20adbf52dda35af779142d7efc735342db2ee067649fda25f3e8a74f8e4f6620cf5a17cb943602609cafb85bdf482873efa4c74928cc0d69444b72aa6bc72694a3a21c6a721aa4e0fccab0a98aef375a37a3e8a15dccad13b6d70b3483581004642d879804aa00cba207b51affca43490bb98f67953265574366ec3829e67aa")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 9
+    EntropyInput = bytes.fromhex("5c13056be92a7f71236fcfef460298acc8595dd474310727f5ccb9a7acb2254a")
+    Nonce = bytes.fromhex("c7226f86349e20e2aca737068ab0f2ce")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("16d415eddefa4dc295a64adcbbcb8c6fe8c8f123c6b09dc08a56d723cff5978cc120fd0a68a2f4c202c220db372d3128ef52385d5786c12dfc6e60ecfc3461a09fa80453e2b1b6365eaeb4df602d192aacb25ab6b4a59689d4bf8d1c4c42a32779f62b06baca6461f154cf40901f5787c1aa2bf67cbfe7546ef5b2bdff20790d8c72d077d48c59c92d1af90a90ccfcdf643dd9d6cee0b1faf5f2f35cfd01d2077ced5e2d013ec1e09336dfab9d9e51ba9a3a2837306213bca2d79abf8dc3282c")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 10
+    EntropyInput = bytes.fromhex("38f08a099fc2d405c32d1e0f867e5450d5ee0d53783c31de9ddeae46d962999d")
+    Nonce = bytes.fromhex("a01f13a43320c715612cedb920cf12eb")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("079ce7a5b540cae96c2883e95acde3039048a6c45a2d259cc648639e7205392d91fa3ee080e615f1e0741a0e536c9e05844651b93461bfc547fb452fec61f853e1bd6e08eabd0cf1c5f84f85eca9d42b53d1e5bae51be5fd35189e4f1c02b843c6361fccf4ca6648bf30a23ccb8ebc16fcf158746eb39cd96f19d46707c001e11c4e0e8ccbc89fec66c69fc92843b6bb2ee1cc7595b65ba89ccaccd6130a8417faf705e8e203e90ee64ae970c409389b5cd0ca80a4e40b642689741691b20621")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 11
+    EntropyInput = bytes.fromhex("0863c868c32442a1a64095a71ab6ae2f9e61c119b58dfa4f34efd26593bbbf68")
+    Nonce = bytes.fromhex("bc407904c43300452dd4e61df47fa98f")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("585334828cf531828fc7127fee0c926f85b8e71e8522ea921296dc62b83a09a00397cd45e0664d0f26fa24edd3e3d8ecef8fdd77ab22431d4066f0efaf3882c97f179a7060efe9e8cba5d8145bebd502c0e09ee791231d539983c08860d7783edb58440d193ed82bc77c27723381a0da45bb1fc2a609f8b73b90446e39869a5af5038aff603b44db9771113927a5297fdc3450eaa228e313afe43c31b0a95b476c5ca312b4f589f809749481722cea9990c02b647976aa6c6f02ce1e5e6ea6df")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 12
+    EntropyInput = bytes.fromhex("a41ad223e41e2bb9c131ec945ca310600ab00c51f6e4fcddd803bd9ab9be8af5")
+    Nonce = bytes.fromhex("483373838894d32745a81ba9d6967751")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("95ca31a7eeebdd2348cf1d43411d2c35faffdbcaed4052d50cf92f0e9d2e757686b72d631a56ca98b68215e7014cfed943abc1e13441c1d660f13adf2188d0975154e1b42a592a62a43b57f82cc21a428873a92fda83abe420efb5233140e4d6c7852cf81e85961fa5c606c5f33e06077f414b0f814cbbe50cc606bffbd474364e608825fdaaf5e74d862795539be8697e2ce05d71446881e3f65bb54ed95e941586988f6e0c34e1beef426696e9dbd9a214013d826a8c99a2a686d8402c583f")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 13
+    EntropyInput = bytes.fromhex("62a26c1327c0ebf8b40691fb4c8f812e81f5474b0c7db70aa9424110fee3a05e")
+    Nonce = bytes.fromhex("41c0cf2e87210e34d0c6bffc269bf2ba")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("6e20a00df1af37e6cc55e580ba21335111eb375395343618df7d630b9dc234496e3964cd45c5de34bda46a28964f6148704c30925feeaecae0574038434cd33c1dd943207a8dbdcd72dc9ecb76a25728b3c2a8ac13c1de3a126d7d43a46e12e0d0ca8991469e582b78ef6aa691b5a0e3e85cba7d7aea3c1e8e031674e85f5af36546eb2a0a28d4ffbaa316a9a6c944fce291cc0c235e8499882eb62b22b548ae07cf9430329e009f4443cb94f7a14e8661166b0d681dcec867205abed48145e9")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 14
+    EntropyInput = bytes.fromhex("fd54cf77ed35022a3fd0dec88e58a207c8c069250066481388f12841d38ad985")
+    Nonce = bytes.fromhex("91f9c02a1d205cdbcdf4d93054fde5f5")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("")
+    AdditionalInput1 = bytes.fromhex("")
+    ReturnedBits = bytes.fromhex("f6d5bf594f44a1c7c9954ae498fe993f67f4e67ef4e349509719b7fd597311f2c123889203d90f147a242cfa863c691dc74cfe7027de25860c67d8ecd06bcd22dfec34f6b6c838e5aab34d89624378fb5598b9f30add2e10bdc439dcb1535878cec90a7cf7251675ccfb9ee37932b1a07cd9b523c07eff45a5e14d888be830c5ab06dcd5032278bf9627ff20dbec322e84038bac3b46229425e954283c4e061383ffe9b0558c59b1ece2a167a4ee27dd59afeeb16b38fbdb3c415f34b1c83a75")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+    COUNT = 15
+    EntropyInput = bytes.fromhex("5e919d353357671566d2c6ab6e1acd46f47d0c878fe36114d7fea9fecb88a3a2")
+    Nonce = bytes.fromhex("7efca9e3d1e1b09d7f16832f3af75141")
+    PersonalizationString = bytes.fromhex("")
+    AdditionalInput0 = bytes.fromhex("442f17cb3cb1482a19729bfd58f46f6ef16285554892c01b0718968d6e011082")
+    AdditionalInput1 = bytes.fromhex("f9557c93eb841bfd7b5d4b71da928efcbe3f55e1870493ef90d16eb238380d65")
+    ReturnedBits = bytes.fromhex("36902134f1989cfe7eb518a56c06aada98997d9bacd04aee21f879a57b515ca3b5e0c2d5fed05ca1a8b054e8c46b389d9d9186feb0abe8e2e60b3a267281cc5b4b7341116ced35a0e07bc2b0330bbfd8b07f07248fa6d8fc5c9df13445324162bdfa22a91ba71453ab123c92f91c70b8bd540b3b180b11ab45ae2c59e57c7c43dab7576594959a96eb502d182267c86576b1846ccee1a694cabdfb42e0c8214192efb502926fa3c27eed020b7cc8866a5af9d838a57e78bf7acd230e1f4d8361")
+    cavp_no_reseed_test(COUNT, EntropyInput, Nonce, PersonalizationString, AdditionalInput0, AdditionalInput1, ReturnedBitsLen, ReturnedBits)
+
+def caliptra_test_vectors():
+    COUNT = 0
+    entropy = bytes.fromhex("000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000")
+    nonce = bytes.fromhex("000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000")
+    expected0 = bytes.fromhex("FEEEF5544A76564990128AD189E873F21F0DFD5AD7E2FA861127EE6E394CA784871C1AEC032C7A8B10B93E0EAB8946D6")
+    expected1 = bytes.fromhex("d7f1b8ee5fc4eca7b022ccbdc2b03bee146c8985ea52ae400b9e23ce3cb3a95849ef93140c8a519ed8f817e66e6f0de4")
+    caliptra_test(COUNT, entropy, nonce, expected0, expected1)
+
+    COUNT = 1
+    entropy = bytes.fromhex("FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+    nonce = bytes.fromhex("FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+    expected0 = bytes.fromhex("7F68A6D896EA5DA62E78DEDB46F6662BC141F2F0B9E641ACC7342663FD51444E380FEA1DABBCA55F18987C0CFC10DF77")
+    expected1 = bytes.fromhex("b52178b3c26aeff4a9f2704664c091d8cf57b45d05c2bb8c7bfcf56963fbe7674908ae830bfe10e0de2eccf48fa7b050")
+    caliptra_test(COUNT, entropy, nonce, expected0, expected1)
+
+    COUNT = 2
+    entropy = bytes.fromhex("F71EE80F1D123DC3F70EAA1FB3272714858EA555BC496BF39ADB107B192BF0BCBA9BB5B5799CFF8E12A1154F37CA7BBD")
+    nonce = bytes.fromhex("DE2B2A66EE13797C69438A9BF6F8514C0A8ABEFD3E5533E1119AE88E8D641771E9BCE4CBE44430A0ADAAAB4103095FC4")
+    expected0 = bytes.fromhex("316f0937ff54b3d16398d5d07799ab59d0e1f3962831101f1eca892f0f1567df2f964c19b8690761d188d2100403eea6")
+    expected1 = bytes.fromhex("9a42b5046712b4e32c1f9db62a7900d2e0d4e051580b5dc2cbc8498a04df6676ff80b4e6e2b34b29152bd96e5b4eefed")
+    expected2 = bytes.fromhex("28ff268d4fea88d4bc28a712feb777bb72dace10e9886eefd226615f5f9d508aa8f59d4b087b65d54223a2186f53031b")
+    caliptra_test(COUNT, entropy, nonce, expected0, expected1, expected2)
+
+
+if __name__ == "__main__":
+#    cavp_test_vectors()
+   caliptra_test_vectors()
\ No newline at end of file

From 047b764e7c13484bf1c0f7541b5ef9d7ef40f517 Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Mon, 3 Feb 2025 12:58:08 -0800
Subject: [PATCH 04/20] removed cnt_reg

---
 src/hmac_drbg/rtl/hmac_drbg.sv | 23 +++--------------------
 1 file changed, 3 insertions(+), 20 deletions(-)

diff --git a/src/hmac_drbg/rtl/hmac_drbg.sv b/src/hmac_drbg/rtl/hmac_drbg.sv
index fecbfd8b6..713607372 100644
--- a/src/hmac_drbg/rtl/hmac_drbg.sv
+++ b/src/hmac_drbg/rtl/hmac_drbg.sv
@@ -81,7 +81,6 @@ module hmac_drbg
   localparam [REG_SIZE-1 : 0] V_init = 384'h010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101;
   localparam [REG_SIZE-1 : 0] K_init = 384'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
 
-  localparam CNT_SIZE = 8;
   localparam [(((1024-REG_SIZE)-1)-12)-1 : 0] ZERO_PAD_V         = '0; // 1 for header and 12 bit for message length  
 
   localparam [11 : 0] V_SIZE        = {1'b0, 11'd1024 + 11'(REG_SIZE)};
@@ -115,7 +114,6 @@ module hmac_drbg
   reg                   ready_reg;
   reg                   valid_reg;
   reg [REG_SIZE-1 : 0]  drbg_reg;
-  reg [CNT_SIZE-1 : 0]  cnt_reg;
   reg                   first_round;
   reg                   HMAC_tag_valid_last;
   reg                   HMAC_tag_valid_edge;
@@ -292,33 +290,18 @@ module hmac_drbg
   begin : hmac_block_update
     HMAC_key = K_reg;
     unique case(drbg_st_reg)
-      K10_ST:         HMAC_block  = {V_reg, cnt_reg, entropy, nonce[383:136]};
+      K10_ST:         HMAC_block  = {V_reg, 8'h0, entropy, nonce[383:136]};
       K11_ST:         HMAC_block  = {nonce[135:0], 1'h1, 875'b0, 12'h888};
       V1_ST:          HMAC_block  = {V_reg, 1'h1, ZERO_PAD_V, V_SIZE};
-      K20_ST:         HMAC_block  = {V_reg, cnt_reg, entropy, nonce[383:136]};
+      K20_ST:         HMAC_block  = {V_reg, 8'h1, entropy, nonce[383:136]};
       K21_ST:         HMAC_block  = {nonce[135:0], 1'h1, 875'b0, 12'h888};
       V2_ST:          HMAC_block  = {V_reg, 1'h1, ZERO_PAD_V, V_SIZE};
       T_ST:           HMAC_block  = {V_reg, 1'h1, ZERO_PAD_V, V_SIZE};
-      K3_ST:          HMAC_block  = {V_reg, 8'h00, 1'h1, 619'b0, 12'h588};
+      K3_ST:          HMAC_block  = {V_reg, 8'h0, 1'h1, 619'b0, 12'h588};
       V3_ST:          HMAC_block  = {V_reg, 1'h1, ZERO_PAD_V, V_SIZE};
       default:        HMAC_block  = '0;
     endcase
   end // hmac_block_update
-     
-  always_ff @ (posedge clk or negedge reset_n) 
-  begin : cnt_reg_update
-    if (!reset_n)
-      cnt_reg    <= '0;
-    else if (zeroize)
-      cnt_reg    <= '0;
-    else begin
-      unique case (drbg_st_reg)
-        INIT_ST:      cnt_reg    <= 8'h0;
-        K2_INIT_ST:   cnt_reg    <= 8'h1;
-        default:      cnt_reg    <= cnt_reg;
-      endcase
-    end
-  end // cnt_reg_update
 
   always_ff @ (posedge clk or negedge reset_n) 
   begin : state_update

From 699dbb410ce8ebcd493ac6ed62289577177c14ac Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Mon, 3 Feb 2025 12:58:33 -0800
Subject: [PATCH 05/20] updated header

---
 src/ecc/rtl/ecc_hmac_drbg_interface.sv | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/src/ecc/rtl/ecc_hmac_drbg_interface.sv b/src/ecc/rtl/ecc_hmac_drbg_interface.sv
index 02afd5b4d..b3564dd98 100644
--- a/src/ecc/rtl/ecc_hmac_drbg_interface.sv
+++ b/src/ecc/rtl/ecc_hmac_drbg_interface.sv
@@ -28,11 +28,19 @@
 //      2.4. generate k from privkey and hashed_msg for signing
 //
 // To generate random values using IV, the hmac_drbg is continued by trigging 
-// next command (instead of init) which increases counter inside hmac_drbg component. 
-// It means:
-// lambda is generated from IV with counter equal to 0 and 1
-// scalar_rnd is generated from IV with counter equal to 2 and 3
-// masking_rnd is generated from IV with counter equal to 4 and 5
+// next command (instead of init). 
+// 
+//          - INIT: Instantiates HMAC-DRBG with entropy, nonce, (personalization string is empty).
+//                  Then, it calls HMAC_DRBG_Generate_algorithm (additional input string is empty)
+//                  to generate a 384-bit random value while it's in (0, prime) range.
+//                  if the random value is zero or >= prime, it is rejected and a new random value
+//                  is generated by calling HMAC_DRBG_Generate_algorithm.
+//                  There is NO RESEED process.
+//          - NEXT: it calls HMAC_DRBG_Generate_algorithm (additional input string is empty)
+//                  to generate a 384-bit random value while it's in (0, prime) range.
+//                  if the random value is zero or >= prime, it is rejected and a new random value
+//                  is generated by calling HMAC_DRBG_Generate_algorithm.
+//                  There is NO RESEED process.
 //
 //======================================================================
 

From 31bc1472cfdf1162b9d97b41d362407d826a59ec Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Tue, 4 Feb 2025 06:46:32 -0800
Subject: [PATCH 06/20] updated ref model to pass text file

---
 src/hmac_drbg/tb/hmac_drbg_ref.py | 41 ++++++++++++++++++++++++++++---
 1 file changed, 38 insertions(+), 3 deletions(-)

diff --git a/src/hmac_drbg/tb/hmac_drbg_ref.py b/src/hmac_drbg/tb/hmac_drbg_ref.py
index d8e5c31a9..126b07277 100644
--- a/src/hmac_drbg/tb/hmac_drbg_ref.py
+++ b/src/hmac_drbg/tb/hmac_drbg_ref.py
@@ -1,5 +1,10 @@
 import hmac
 import hashlib
+import os
+
+HMAC_DRBG_PRIME = int("FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC7634D81F4372DDF581A0DB248B0A77AECEC196ACCC52973", 16)
+
+
 class HMAC_DRBG:
    def __init__(self, entropy, nonce=b"", personalization=b""):
        """
@@ -88,7 +93,7 @@ def caliptra_test(COUNT, entropy, nonce, expected0, expected1=b"", expected2=b""
 
 def cavp_test_vectors():
     """
-       from: https://github.com/coruus/nist-testvectors/blob/master/csrc.nist.gov/groups/STM/cavp/documents/drbg/drbgtestvectors/drbgvectors_no_reseed/HMAC_DRBG.rsp
+       from: https://csrc.nist.gov/projects/cryptographic-algorithm-validation-program/random-number-generators#DRBG
     """
 
     ReturnedBitsLen = 1536
@@ -260,7 +265,37 @@ def caliptra_test_vectors():
     expected2 = bytes.fromhex("28ff268d4fea88d4bc28a712feb777bb72dace10e9886eefd226615f5f9d508aa8f59d4b087b65d54223a2186f53031b")
     caliptra_test(COUNT, entropy, nonce, expected0, expected1, expected2)
 
+def gen_expected_outputs():
+    # Read testbench outputs
+    with open("tb_inputs.txt", "r") as f:
+        lines = f.readlines()
+
+    num_rounds = int(lines[0].strip())  # Read number of rounds
+    entropy = bytes.fromhex(lines[1].strip())  # Read entropy as bytes
+    nonce = bytes.fromhex(lines[2].strip())  # Read nonce as bytes
+
+    returnedbits_len_inbyte = int(384 / 8)
+    drbg = HMAC_DRBG(entropy, nonce)
+    outputs = []
+    
+    for _ in range(num_rounds):
+        while True:
+            output = drbg.generate(returnedbits_len_inbyte)
+            if 0 < int.from_bytes(output, 'big') < HMAC_DRBG_PRIME:
+                outputs.append(output.hex())
+                break
+            
+    # Write expected results to a file
+    with open("tb_expected.txt", "w") as f:
+        for output in outputs:
+            f.write(f"{output}\n")
 
 if __name__ == "__main__":
-#    cavp_test_vectors()
-   caliptra_test_vectors()
\ No newline at end of file
+   # Check if tb_inputs.txt exists
+    if os.path.exists("tb_inputs.txt"):
+        print("Found tb_inputs.txt. Running validation against testbench inputs.")
+        gen_expected_outputs()
+    else:
+        print("No tb_inputs.txt found. Running fixed test vectors.")
+        cavp_test_vectors()
+        caliptra_test_vectors()

From ee5133c1886883cd3c61f5f4a347c9e8aebb9e32 Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Tue, 4 Feb 2025 13:18:26 -0800
Subject: [PATCH 07/20] updated hmac-drbg tb to include directed and random
 test vectors

---
 src/hmac_drbg/tb/hmac_drbg_ref.py             |  17 +-
 src/hmac_drbg/tb/hmac_drbg_tb.sv              | 364 ++++++++----------
 .../tb/test_vectors/hmac_drbg_tb.hex          |  17 +
 3 files changed, 198 insertions(+), 200 deletions(-)
 create mode 100644 src/hmac_drbg/tb/test_vectors/hmac_drbg_tb.hex

diff --git a/src/hmac_drbg/tb/hmac_drbg_ref.py b/src/hmac_drbg/tb/hmac_drbg_ref.py
index 126b07277..a025eb989 100644
--- a/src/hmac_drbg/tb/hmac_drbg_ref.py
+++ b/src/hmac_drbg/tb/hmac_drbg_ref.py
@@ -267,14 +267,14 @@ def caliptra_test_vectors():
 
 def gen_expected_outputs():
     # Read testbench outputs
-    with open("tb_inputs.txt", "r") as f:
+    with open("tb_inputs.hex", "r") as f:
         lines = f.readlines()
 
     num_rounds = int(lines[0].strip())  # Read number of rounds
     entropy = bytes.fromhex(lines[1].strip())  # Read entropy as bytes
     nonce = bytes.fromhex(lines[2].strip())  # Read nonce as bytes
 
-    returnedbits_len_inbyte = int(384 / 8)
+    returnedbits_len_inbyte = 384 // 8
     drbg = HMAC_DRBG(entropy, nonce)
     outputs = []
     
@@ -286,16 +286,19 @@ def gen_expected_outputs():
                 break
             
     # Write expected results to a file
-    with open("tb_expected.txt", "w") as f:
+    with open("hmac_drbg_test_vector.hex", "w") as f:
+        f.write(f"{num_rounds:1X}\n")
+        f.write(f"{entropy.hex()}\n")
+        f.write(f"{nonce.hex()}\n")
         for output in outputs:
             f.write(f"{output}\n")
 
 if __name__ == "__main__":
-   # Check if tb_inputs.txt exists
-    if os.path.exists("tb_inputs.txt"):
-        print("Found tb_inputs.txt. Running validation against testbench inputs.")
+   # Check if tb_inputs.hex exists
+    if os.path.exists("tb_inputs.hex"):
+        print("REF MODEL: Found tb_inputs.hex. Generating the expected outputs...")
         gen_expected_outputs()
     else:
-        print("No tb_inputs.txt found. Running fixed test vectors.")
+        print("REF MODEL: No tb_inputs.hex found. Running fixed test vectors.")
         cavp_test_vectors()
         caliptra_test_vectors()
diff --git a/src/hmac_drbg/tb/hmac_drbg_tb.sv b/src/hmac_drbg/tb/hmac_drbg_tb.sv
index d21a93f69..ab511ee18 100644
--- a/src/hmac_drbg/tb/hmac_drbg_tb.sv
+++ b/src/hmac_drbg/tb/hmac_drbg_tb.sv
@@ -28,14 +28,19 @@ module hmac_drbg_tb();
   //----------------------------------------------------------------
   // Local Parameters.
   //----------------------------------------------------------------
+    localparam MAX_ROUND    = 15;
+    localparam MAX_ROUND_W  = $clog2(MAX_ROUND);
+
     localparam REG_SIZE  = 384;
-    localparam SEED_SIZE = 384;
     localparam HMAC_DRBG_PRIME = 384'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC7634D81F4372DDF581A0DB248B0A77AECEC196ACCC52973;
 
     localparam CLK_HALF_PERIOD = 1;
     localparam CLK_PERIOD      = 2 * CLK_HALF_PERIOD;
 
     localparam DEBUG     = 0;
+
+    string      hmac_drbg_test_vector_file; // Input test vector file
+    string      hmac_drbg_test_to_run;
   //----------------------------------------------------------------
   // Register and Wire declarations.
   //----------------------------------------------------------------
@@ -56,12 +61,39 @@ module hmac_drbg_tb();
   wire                       valid_tb;
 
   //Data
-  reg   [383 : 0]            lfsr_seed_tb;
-  reg   [383 : 0]            entropy_tb;
-  reg   [383 : 0]            nonce_tb;
-  wire  [383 : 0]            drbg_tb;
+  reg   [REG_SIZE-1 : 0]            lfsr_seed_tb;
+  reg   [REG_SIZE-1 : 0]            entropy_tb;
+  reg   [REG_SIZE-1 : 0]            nonce_tb;
+  wire  [REG_SIZE-1 : 0]            drbg_tb;
+
+  initial begin
+    if ($value$plusargs("HMAC_DRBG_TEST=%s", hmac_drbg_test_to_run)) begin
+      $display("%m: Running hmac_drbg test = %s", hmac_drbg_test_to_run);
+    end else begin
+      hmac_drbg_test_to_run = "HMAC_DRBG_directed_test";
+      $display("%m: Running hmac_drbg test = %s", hmac_drbg_test_to_run);
+    end
+
+    if (hmac_drbg_test_to_run == "HMAC_DRBG_directed_test") begin
+      if ($value$plusargs("HMAC_DRBG_TEST_VECTOR_FILE=%s", hmac_drbg_test_vector_file)) begin
+        $display("%m: Using HMAC_DRBG test vectors from file specified via plusarg: %s", hmac_drbg_test_vector_file);
+      end else begin
+        hmac_drbg_test_vector_file = "";
+        $display("%m: There is no valid test vector file.");
+      end
+    end
+  end
 
 
+  typedef struct packed {
+      logic [REG_SIZE-1 : 0]  entropy;
+      logic [REG_SIZE-1 : 0]  nonce;
+      logic [MAX_ROUND_W-1:0] num_rounds;
+      logic [MAX_ROUND-1:0][REG_SIZE-1:0] drbg_outputs;
+  } test_vector_t;
+
+  test_vector_t test_vector;
+
   //----------------------------------------------------------------
   // Device Under Test.
   //----------------------------------------------------------------
@@ -120,10 +152,10 @@ module hmac_drbg_tb();
   //
   // 
   //----------------------------------------------------------------
-  function logic [383 : 0] random_gen();
-    logic [383 : 0] random_seed;
-    for (int i=0; i < 12; i++) begin
-      random_seed[i*32 +: 32] = $random;
+  function logic [REG_SIZE-1 : 0] random_gen();
+    logic [REG_SIZE-1 : 0] random_seed;
+    for (int i=0; i < (REG_SIZE / 32); i++) begin
+      random_seed[i*32 +: 32] = $urandom;
     end
     return random_seed;
   endfunction
@@ -267,185 +299,65 @@ module hmac_drbg_tb();
     end
   endtask // hmac384_drbg
 
-  //----------------------------------------------------------------
-  // hmac384_drbg_two_rounds()
-  //
-  //----------------------------------------------------------------
-  task hmac384_drbg_two_rounds(input [383 : 0] entropy, input [383 : 0] nonce,
-                  input [383 : 0] lfsr_seed, input  [1 : 0][383 : 0] expected_drbg);
-    begin
-        if (!ready_tb)
-            wait(ready_tb);
-            
-        $display("The HMAC DRBG two rounds is triggered...");
-        
-        entropy_tb = entropy;
-        nonce_tb = nonce;
-        lfsr_seed_tb = lfsr_seed;
-
-        $display("*** entropy   : %096x", entropy_tb);
-        $display("*** nonce     : %096x", nonce_tb);
-        $display("*** lfsr_seed : %096x", lfsr_seed);
-
-        #(1 * CLK_PERIOD);
-        init_tb = 1'b1;  
-
-        #(1 * CLK_PERIOD);
-        init_tb = 1'b0;
-
-        #(2 * CLK_PERIOD);
-        
-
-        wait(valid_tb);
-        $display("The HMAC DRBG core completed the execution");
-
-        if (drbg_tb == expected_drbg[0])
-          begin
-            $display("*** TC %0d successful.", tc_number);
-            $display("");
-          end
-        else
-          begin
-            $display("*** ERROR: TC %0d NOT successful.", tc_number);
-            $display("Expected: 0x%096x", expected_drbg[0]);
-            $display("Got:      0x%096x", drbg_tb);
-            $display("");
-            error_ctr = error_ctr + 1;
-          end
-
-        #(1 * CLK_PERIOD);
-        next_tb = 1'b1;  
-
-        #(1 * CLK_PERIOD);
-        next_tb = 1'b0;
-
-        #(2 * CLK_PERIOD);
-        
-
-        wait(valid_tb);
-        $display("The HMAC DRBG core completed the execution");
-
-        if (drbg_tb == expected_drbg[1])
-          begin
-            $display("*** TC %0d successful.", tc_number);
-            $display("");
-          end
-        else
-          begin
-            $display("*** ERROR: TC %0d NOT successful.", tc_number);
-            $display("Expected: 0x%096x", expected_drbg[1]);
-            $display("Got:      0x%096x", drbg_tb);
-            $display("");
-            error_ctr = error_ctr + 1;
-          end
-
-        tc_number = tc_number+1;
-
-    end
-  endtask // hmac384_drbg_two_rounds
-
 
   //----------------------------------------------------------------
-  // hmac384_drbg_three_rounds()
+  // hmac384_drbg_multi_rounds()
   //
   //----------------------------------------------------------------
-  task hmac384_drbg_three_rounds(input [383 : 0] entropy, input [383 : 0] nonce,
-                  input [383 : 0] lfsr_seed, input  [2 : 0][383 : 0] expected_drbg);
+  task hmac384_drbg_multi_rounds(input [REG_SIZE-1 : 0] entropy, input [REG_SIZE-1 : 0] nonce,
+                  input [MAX_ROUND : 0][REG_SIZE-1 : 0] expected_drbg, 
+                  input [MAX_ROUND_W-1:0] num_rounds);
     begin
         if (!ready_tb)
             wait(ready_tb);
             
-        $display("The HMAC DRBG three rounds is triggered...");
+        $display("The HMAC DRBG multi rounds is triggered...");
         
         entropy_tb = entropy;
         nonce_tb = nonce;
-        lfsr_seed_tb = lfsr_seed;
 
         $display("*** entropy   : %096x", entropy_tb);
         $display("*** nonce     : %096x", nonce_tb);
-        $display("*** lfsr_seed : %096x", lfsr_seed);
-
-        #(1 * CLK_PERIOD);
-        init_tb = 1'b1;  
-
-        #(1 * CLK_PERIOD);
-        init_tb = 1'b0;
-
-        #(2 * CLK_PERIOD);
-        
 
-        wait(valid_tb);
-        $display("The HMAC DRBG core completed the execution");
+        for (int i = 0; i < num_rounds; i++) begin
+          lfsr_seed_tb = random_gen();
+          $display("*** lfsr_seed : %096x", lfsr_seed_tb);
 
-        if (drbg_tb == expected_drbg[0])
-          begin
-            $display("*** TC %0d successful.", tc_number);
-            $display("");
+          #(1 * CLK_PERIOD);
+          if (i==0) begin
+            init_tb = 1'b1;
+            next_tb = 1'b0;
           end
-        else
-          begin
-            $display("*** ERROR: TC %0d NOT successful.", tc_number);
-            $display("Expected: 0x%096x", expected_drbg[0]);
-            $display("Got:      0x%096x", drbg_tb);
-            $display("");
-            error_ctr = error_ctr + 1;
+          else begin
+            init_tb = 1'b0;
+            next_tb = 1'b1;
           end
 
-        #(1 * CLK_PERIOD);
-        next_tb = 1'b1;  
-
-        #(1 * CLK_PERIOD);
-        next_tb = 1'b0;
+          #(1 * CLK_PERIOD);
+          init_tb = 1'b0;
+          next_tb = 1'b0;
 
-        #(2 * CLK_PERIOD);
+          #(2 * CLK_PERIOD);
         
+          wait(valid_tb);
+          $display("Received valid flag");
 
-        wait(valid_tb);
-        $display("The HMAC DRBG core completed the execution");
-
-        if (drbg_tb == expected_drbg[1])
-          begin
-            $display("*** TC %0d successful.", tc_number);
-            $display("");
+          if (drbg_tb == expected_drbg[i]) begin
+              $display("*** TC %0d round #%0d successful.", tc_number, i);
+              $display("");
           end
-        else
-          begin
-            $display("*** ERROR: TC %0d NOT successful.", tc_number);
-            $display("Expected: 0x%096x", expected_drbg[1]);
-            $display("Got:      0x%096x", drbg_tb);
-            $display("");
-            error_ctr = error_ctr + 1;
+          else begin
+              $display("*** ERROR: TC %0d round #%0d NOT successful.", tc_number, i);
+              $display("Expected: 0x%096x", expected_drbg[i]);
+              $display("Got:      0x%096x", drbg_tb);
+              $display("");
+              error_ctr = error_ctr + 1;
           end
+        end
 
-        #(1 * CLK_PERIOD);
-        next_tb = 1'b1;  
-
-        #(1 * CLK_PERIOD);
-        next_tb = 1'b0;
-
-        #(2 * CLK_PERIOD);
-        
-        wait(valid_tb);
-        $display("The HMAC DRBG core completed the execution");
-
-        if (drbg_tb == expected_drbg[2])
-          begin
-            $display("*** TC %0d successful.", tc_number);
-            $display("");
-          end
-        else
-          begin
-            $display("*** ERROR: TC %0d NOT successful.", tc_number);
-            $display("Expected: 0x%096x", expected_drbg[2]);
-            $display("Got:      0x%096x", drbg_tb);
-            $display("");
-            error_ctr = error_ctr + 1;
-          end
-          
         tc_number = tc_number+1;
-
     end
-  endtask // hmac384_drbg_three_rounds
+  endtask // hmac384_drbg_multi_rounds
   //----------------------------------------------------------------
   // hmac_drbg_test()
   //
@@ -513,45 +425,104 @@ module hmac_drbg_tb();
   endtask // hmac_drbg_test
 
   //----------------------------------------------------------------
-  // hmac_drbg_multi_rounds_test()
+  // hmac_drbg_multi_rounds_directed_test()
   //
   //
   //----------------------------------------------------------------
-  task hmac_drbg_multi_rounds_test;
+  task hmac_drbg_multi_rounds_directed_test;
     begin
-        reg [383 : 0] hmac384_entropy;
-        reg [383 : 0] hmac384_nonce;
-        reg [2 : 0][383 : 0] hmac384_expected;
-        reg [383 : 0] seed;
+      // Read expected results from tb_expected.hex
+      read_test_vectors(hmac_drbg_test_vector_file);
 
-        hmac384_entropy  = 384'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
-        hmac384_nonce    = 384'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
-        hmac384_expected[0] = 384'hFEEEF5544A76564990128AD189E873F21F0DFD5AD7E2FA861127EE6E394CA784871C1AEC032C7A8B10B93E0EAB8946D6;
-        hmac384_expected[1] = 384'hd7f1b8ee5fc4eca7b022ccbdc2b03bee146c8985ea52ae400b9e23ce3cb3a95849ef93140c8a519ed8f817e66e6f0de4;
-        seed = random_gen();
-        
-        hmac384_drbg_two_rounds(hmac384_entropy, hmac384_nonce, seed, hmac384_expected[1:0]);
-        
-        hmac384_entropy  = 384'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
-        hmac384_nonce    = 384'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
-        hmac384_expected[0] = 384'h7F68A6D896EA5DA62E78DEDB46F6662BC141F2F0B9E641ACC7342663FD51444E380FEA1DABBCA55F18987C0CFC10DF77;
-        hmac384_expected[1] = 384'hb52178b3c26aeff4a9f2704664c091d8cf57b45d05c2bb8c7bfcf56963fbe7674908ae830bfe10e0de2eccf48fa7b050;
-        seed = random_gen();
-        
-        hmac384_drbg_two_rounds(hmac384_entropy, hmac384_nonce, seed, hmac384_expected[1:0]);
+      hmac384_drbg_multi_rounds(test_vector.entropy, test_vector.nonce, test_vector.drbg_outputs, test_vector.num_rounds);
 
-        hmac384_entropy  = 384'hF71EE80F1D123DC3F70EAA1FB3272714858EA555BC496BF39ADB107B192BF0BCBA9BB5B5799CFF8E12A1154F37CA7BBD;
-        hmac384_nonce    = 384'hDE2B2A66EE13797C69438A9BF6F8514C0A8ABEFD3E5533E1119AE88E8D641771E9BCE4CBE44430A0ADAAAB4103095FC4;
-        hmac384_expected[0] = 384'h316f0937ff54b3d16398d5d07799ab59d0e1f3962831101f1eca892f0f1567df2f964c19b8690761d188d2100403eea6;
-        hmac384_expected[1] = 384'h9a42b5046712b4e32c1f9db62a7900d2e0d4e051580b5dc2cbc8498a04df6676ff80b4e6e2b34b29152bd96e5b4eefed;
-        hmac384_expected[2] = 384'h28ff268d4fea88d4bc28a712feb777bb72dace10e9886eefd226615f5f9d508aa8f59d4b087b65d54223a2186f53031b;
-        seed = random_gen();
-        
-        hmac384_drbg_two_rounds(hmac384_entropy, hmac384_nonce, seed, hmac384_expected[1:0]);
-        hmac384_drbg_three_rounds(hmac384_entropy, hmac384_nonce, seed, hmac384_expected);
     end
   endtask
 
+  task hmac_drbg_randomized_test;
+    begin
+      int file;
+      string cmd, line;
+      reg [REG_SIZE-1 : 0] entropy;
+      reg [REG_SIZE-1 : 0] nonce;
+      reg [MAX_ROUND_W-1:0] num_rounds;
+
+      entropy = random_gen();
+      nonce = random_gen();
+      num_rounds = $urandom_range(1, MAX_ROUND);
+
+      // Write test vectors to tb_inputs.hex
+      file = $fopen("tb_inputs.hex", "w");
+      $fdisplay(file, "%d", num_rounds);
+      $fdisplay(file, "%h", entropy);
+      $fdisplay(file, "%h", nonce);
+      
+      $fclose(file);
+
+      // Call Python reference model
+      $system($sformatf("python3 hmac_drbg_ref.py"));
+
+      // Read expected results from tb_expected.hex
+      read_test_vectors("hmac_drbg_test_vector.hex");
+
+      hmac384_drbg_multi_rounds(test_vector.entropy, test_vector.nonce, test_vector.drbg_outputs, test_vector.num_rounds);
+
+    end
+  endtask
+
+  //----------------------------------------------------------------
+  // read_test_vectors()
+  //
+  //----------------------------------------------------------------
+  task read_test_vectors(input string fname);
+    begin
+      integer line_cnt;
+      integer fin;
+      integer rv;
+      bit [REG_SIZE-1:0] val;
+      bit [MAX_ROUND_W-1:0] round_val;
+      integer test_vector_cnt;
+
+      line_cnt = 0;
+      test_vector_cnt = 0;
+
+      fin = $fopen(fname, "r");
+      if (fin == 0)
+          $error("Can't open file %s", fname);
+      while (!$feof(fin)) begin
+        if (line_cnt == 0) begin
+          rv = $fscanf(fin, "%h\n", round_val); // Read first line as an integer
+          if (rv != 1) begin
+              $error("Failed to read the number of rounds");
+              $fclose(fin);
+              $finish;
+          end
+          test_vector.num_rounds = round_val;
+        end 
+        else begin
+          rv = $fscanf(fin, "%h\n", val);
+          if (rv != 1) begin
+              $error("Failed to read a matching string");
+              $fclose(fin);
+              $finish;
+          end
+          case (line_cnt)
+              0: test_vector.num_rounds = val;
+              1: test_vector.entropy    = val;
+              2: test_vector.nonce      = val;
+              default: begin 
+                test_vector.drbg_outputs[test_vector_cnt]    = val;
+                test_vector_cnt++;
+              end
+          endcase
+        end
+        line_cnt++;
+      end
+      $fclose(fin);
+
+      $display("Read test vector with %0d rounds from %s", test_vector_cnt, fname);
+    end
+  endtask
   //----------------------------------------------------------------
   // always_debug()
   //
@@ -571,6 +542,7 @@ module hmac_drbg_tb();
   //----------------------------------------------------------------
   initial
     begin : main
+      // $write("PLAYBOOK_RANDOM_SEED = %s\n", getenv("PLAYBOOK_RANDOM_SEED"));
       $display("   -= Testbench for HMAC DRBG started =-");
       $display("    ==============================");
       $display("");
@@ -580,8 +552,14 @@ module hmac_drbg_tb();
       reset_dut();
       //dump_dut_state();
 
-      hmac_drbg_test();
-      hmac_drbg_multi_rounds_test();
+      if (hmac_drbg_test_to_run == "HMAC_DRBG_directed_test") begin
+        hmac_drbg_test();
+        if (hmac_drbg_test_vector_file != "")
+          hmac_drbg_multi_rounds_directed_test();
+      end
+      else begin
+        hmac_drbg_randomized_test();
+      end
 
       display_test_results();
 
diff --git a/src/hmac_drbg/tb/test_vectors/hmac_drbg_tb.hex b/src/hmac_drbg/tb/test_vectors/hmac_drbg_tb.hex
new file mode 100644
index 000000000..5152b9adf
--- /dev/null
+++ b/src/hmac_drbg/tb/test_vectors/hmac_drbg_tb.hex
@@ -0,0 +1,17 @@
+E
+1e8dcd3d3b23f17606d7cd0d00f3e30189375212b2c2846546df998d06b97b0db1f056638484d609c0895e8112153524
+e77696ce793069f247ecdb8f8932d612bbd2727772aff7e5d513d2aae2f784c5e33724c67cfde9f9462df78c76d457ed
+4dacc66cc713c711b64ef7f7fd86e14bb29580ec9123f1a9db947c86338073ea81f472c7ddf78ee7e213b0f7722f1fe6
+c84a3e2340ca28a68823e02635931d4e088c28f26c1442583327bd2aa3de12460211cb7519b222d0b948769ad6b16075
+8d86c9ba0d577eb7d01009cdaa73043550c4483c6900d935ba9f124b1d1f2774c36d04ef9dd32a4bb97184f4d1516756
+68fc6d4f1d4307f3d32aaf14f70a2ee136579600b6cdb19f7bf6615853e38ebd5a4c0fe001653a73d1e3def230edec3b
+59d5ccfb7b5dbca7bde588e55f53dc3c763b57ea431fcefc9f6eea4bb379e586a948aa4a94a933a166544ceadeeafe85
+162ca660d5a0d6ccf53fa049eadb0b23794227127a3c139c798e1d587a21d9d5d9d53a971be6f412f2fe0620f28da854
+30005c4e248e81fb3d011b6562b97ed6c37b99578504e2d523c90c6e8eb9a6c0ad476bc36d15a725bc0954cd6dcbb12f
+83e2e35a818ea2128837e809827e1637c0834016182bc662713bf3709558410bea09ff0d3a25df715db82acf830f1884
+92780bd5342ff7a4a58bbfe34e0369df719c3fe922abce784cf1139ea75b536d751202a15716f9b588112ec3a7fd3867
+37e6fb744f097cae89d898dd9be08af937d09f44471fc96a65a38a10c0112b798e6feb8fbefde93621cbd68d923a695e
+4998fef41fa542aa63b55087466fd45cc38809f0f41bfecf3b398a09492df78f7eedf2c25845d8951b3b98917d65e7b3
+0dba1bbfe6cd6aa3497f9c742ddcc158f9a5c3b19894a4ffbe6cbbaebf9941802a0a7deb481d066a33eb1d5660186894
+f6e5b1ae9cfcd7d89f9680f63f43ffb190b4cf2405c7860bbd75007ea549e13bed1bf4728af24b9281249a7863e3f6c2
+9ee61bfc120941830f204d0ef047cfddf1be2893fe7647bdc0cc66024537efc07ad840feb8b4de6ccbb0c5b75fd50460
\ No newline at end of file

From 6b81fac408c80d964200af9476a43873340132fe Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Tue, 4 Feb 2025 13:19:37 -0800
Subject: [PATCH 08/20] added hmac_drbg stimulus

---
 src/hmac_drbg/config/compile.yml              |  2 ++
 .../directed/hmac_drbg_directed_test.yml      | 21 +++++++++++++++++++
 .../randomized/hmac_drbg_randomized_test.yml  | 20 ++++++++++++++++++
 .../hmac_drbg_nightly_directed_regression.yml |  8 +++++++
 .../hmac_drbg_nightly_random_regression.yml   | 14 +++++++++++++
 5 files changed, 65 insertions(+)
 create mode 100644 src/hmac_drbg/stimulus/tests/directed/hmac_drbg_directed_test.yml
 create mode 100644 src/hmac_drbg/stimulus/tests/randomized/hmac_drbg_randomized_test.yml
 create mode 100644 src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_directed_regression.yml
 create mode 100644 src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_random_regression.yml

diff --git a/src/hmac_drbg/config/compile.yml b/src/hmac_drbg/config/compile.yml
index b60554623..748b90711 100755
--- a/src/hmac_drbg/config/compile.yml
+++ b/src/hmac_drbg/config/compile.yml
@@ -22,6 +22,8 @@ targets:
     files:
       - $COMPILE_ROOT/tb/hmac_drbg_tb.sv
     tops: [hmac_drbg_tb]
+  sim:
+    pre_exec: 'echo "[PRE-EXEC] Copying HMAC_DRBG vector generator to $(pwd)" && cp $COMPILE_ROOT/tb/hmac_drbg_ref.py .'
 global:
   tool:
     vcs:
diff --git a/src/hmac_drbg/stimulus/tests/directed/hmac_drbg_directed_test.yml b/src/hmac_drbg/stimulus/tests/directed/hmac_drbg_directed_test.yml
new file mode 100644
index 000000000..542437ca2
--- /dev/null
+++ b/src/hmac_drbg/stimulus/tests/directed/hmac_drbg_directed_test.yml
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+---
+plusargs:
+  - +HMAC_DRBG_TEST_VECTOR_FILE='${CALIPTRA_ROOT}/src/hmac_drbg/tb/test_vectors/hmac_drbg_tb.hex'
+  - +HMAC_DRBG_TEST='HMAC_DRBG_directed_test'
+
+testname: hmac_drbg_directed_test
+seed: 1
diff --git a/src/hmac_drbg/stimulus/tests/randomized/hmac_drbg_randomized_test.yml b/src/hmac_drbg/stimulus/tests/randomized/hmac_drbg_randomized_test.yml
new file mode 100644
index 000000000..28341cdd4
--- /dev/null
+++ b/src/hmac_drbg/stimulus/tests/randomized/hmac_drbg_randomized_test.yml
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+---
+plusargs:
+  - +HMAC_DRBG_TEST='HMAC_DRBG_randomized_test'
+
+testname: hmac_drbg_randomized_test
+seed: ${PLAYBOOK_RANDOM_SEED}
diff --git a/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_directed_regression.yml b/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_directed_regression.yml
new file mode 100644
index 000000000..2a33ae747
--- /dev/null
+++ b/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_directed_regression.yml
@@ -0,0 +1,8 @@
+document:
+  schema: 1.0
+
+contents:
+  - tests:
+      tags: ["L0", "directed", "nightly", "HMAC_DRBG"]
+      paths:
+        - ${CALIPTRA_ROOT}/src/hmac_drbg/stimulus/tests/directed/hmac_drbg_normal_test.yml
diff --git a/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_random_regression.yml b/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_random_regression.yml
new file mode 100644
index 000000000..170167aef
--- /dev/null
+++ b/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_random_regression.yml
@@ -0,0 +1,14 @@
+document:
+  schema: 1.0
+
+contents:
+  - generator:
+      tags: ["L1", "HMAC_DRBG",  "random"]
+      path: ""
+      weight: 100
+      generations: 100
+      formats: 
+        generate: "reseed {template}.yml -seed {seed}"
+        path: "{template_basename}__{seed}.yml"
+      templates:
+        ${CALIPTRA_ROOT}/src/hmac_drbg/stimulus/tests/randomized/hmac_drbg_randomized_test.yml : { weight 100 }

From 091b78ed8f05b0fddd4698bb437a6410e8bf1093 Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Tue, 4 Feb 2025 15:04:41 -0800
Subject: [PATCH 09/20] added license header to hmac_drbg ref model

---
 src/hmac_drbg/tb/hmac_drbg_ref.py | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/src/hmac_drbg/tb/hmac_drbg_ref.py b/src/hmac_drbg/tb/hmac_drbg_ref.py
index a025eb989..48fa4afa1 100644
--- a/src/hmac_drbg/tb/hmac_drbg_ref.py
+++ b/src/hmac_drbg/tb/hmac_drbg_ref.py
@@ -1,3 +1,17 @@
+# SPDX-License-Identifier: Apache-2.0
+
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+
+# http://www.apache.org/licenses/LICENSE-2.0
+
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
 import hmac
 import hashlib
 import os

From b54c15a17a82c0e48149cc608c1a4e02ce6eadb5 Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Wed, 5 Feb 2025 01:23:10 +0000
Subject: [PATCH 10/20] MICROSOFT AUTOMATED PIPELINE: Stamp 'mojtaba-hmac-drbg'
 with updated timestamp and hash after successful run

---
 .github/workflow_metadata/pr_hash      | 2 +-
 .github/workflow_metadata/pr_timestamp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflow_metadata/pr_hash b/.github/workflow_metadata/pr_hash
index 5b35ba130..537d9ff67 100644
--- a/.github/workflow_metadata/pr_hash
+++ b/.github/workflow_metadata/pr_hash
@@ -1 +1 @@
-4d8e74c4269f46d7418d2a77e5b0d25b586f9f07172cc72552c0b5e2101f9e9e260a0578a5b3a83ae0903edec7dcaefe
\ No newline at end of file
+e6bbd73686f0090bbc6271c42d6cb15cfa30545915c37ec7181ce030cebef64a0e4eebb7f3aba6b6758f42c8269cb9f1
\ No newline at end of file
diff --git a/.github/workflow_metadata/pr_timestamp b/.github/workflow_metadata/pr_timestamp
index ae6feda7c..9c4a62f5a 100644
--- a/.github/workflow_metadata/pr_timestamp
+++ b/.github/workflow_metadata/pr_timestamp
@@ -1 +1 @@
-1738617343
\ No newline at end of file
+1738718583
\ No newline at end of file

From 000992a5778959349c00480ab3b18976bb095da9 Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Wed, 5 Feb 2025 11:41:41 -0800
Subject: [PATCH 11/20] fixed typo

---
 .../testsuites/hmac_drbg_nightly_directed_regression.yml        | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_directed_regression.yml b/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_directed_regression.yml
index 2a33ae747..5110c639e 100644
--- a/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_directed_regression.yml
+++ b/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_directed_regression.yml
@@ -5,4 +5,4 @@ contents:
   - tests:
       tags: ["L0", "directed", "nightly", "HMAC_DRBG"]
       paths:
-        - ${CALIPTRA_ROOT}/src/hmac_drbg/stimulus/tests/directed/hmac_drbg_normal_test.yml
+        - ${CALIPTRA_ROOT}/src/hmac_drbg/stimulus/tests/directed/hmac_drbg_directed_test.yml

From b1e331d913bce8ece832dc696a4bfdc8fa0408ba Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Wed, 5 Feb 2025 13:29:42 -0800
Subject: [PATCH 12/20] fixed yml file name

---
 .../stimulus/testsuites/hmac_drbg_nightly_random_regression.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_random_regression.yml b/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_random_regression.yml
index 170167aef..e15c41418 100644
--- a/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_random_regression.yml
+++ b/src/hmac_drbg/stimulus/testsuites/hmac_drbg_nightly_random_regression.yml
@@ -11,4 +11,4 @@ contents:
         generate: "reseed {template}.yml -seed {seed}"
         path: "{template_basename}__{seed}.yml"
       templates:
-        ${CALIPTRA_ROOT}/src/hmac_drbg/stimulus/tests/randomized/hmac_drbg_randomized_test.yml : { weight 100 }
+        ${CALIPTRA_ROOT}/src/hmac_drbg/stimulus/tests/randomized/hmac_drbg_randomized_test : { weight 100 }

From 62a0016f6238a6bc8135e9b2dc3183d16375c258 Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Thu, 6 Feb 2025 08:15:28 -0800
Subject: [PATCH 13/20] added hmac_drbg coverage

---
 src/hmac_drbg/config/compile.yml              | 13 +++
 .../coverage/config/hmac_drbg_cm_hier.cfg     |  3 +
 src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv  | 20 ++++
 src/hmac_drbg/coverage/hmac_drbg_cov_if.sv    | 94 +++++++++++++++++++
 src/hmac_drbg/tb/hmac_drbg_tb.sv              |  2 +
 src/integration/config/compile.yml            |  1 +
 6 files changed, 133 insertions(+)
 create mode 100644 src/hmac_drbg/coverage/config/hmac_drbg_cm_hier.cfg
 create mode 100644 src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv
 create mode 100644 src/hmac_drbg/coverage/hmac_drbg_cov_if.sv

diff --git a/src/hmac_drbg/config/compile.yml b/src/hmac_drbg/config/compile.yml
index 748b90711..d1eccb580 100755
--- a/src/hmac_drbg/config/compile.yml
+++ b/src/hmac_drbg/config/compile.yml
@@ -15,6 +15,7 @@ provides: [hmac_drbg_tb]
 schema_version: 2.4.0
 requires: 
   - hmac_drbg
+  - hmac_drbg_coverage
 targets:
   tb:
     directories: 
@@ -24,6 +25,18 @@ targets:
     tops: [hmac_drbg_tb]
   sim:
     pre_exec: 'echo "[PRE-EXEC] Copying HMAC_DRBG vector generator to $(pwd)" && cp $COMPILE_ROOT/tb/hmac_drbg_ref.py .'
+---
+provides: [hmac_drbg_coverage]  
+schema_version: 2.4.0
+requires: 
+  - hmac_drbg
+targets:
+  tb:
+    directories: 
+      - $COMPILE_ROOT/coverage
+    files:
+      - $COMPILE_ROOT/coverage/hmac_drbg_cov_if.sv
+      - $COMPILE_ROOT/coverage/hmac_drbg_cov_bind.sv
 global:
   tool:
     vcs:
diff --git a/src/hmac_drbg/coverage/config/hmac_drbg_cm_hier.cfg b/src/hmac_drbg/coverage/config/hmac_drbg_cm_hier.cfg
new file mode 100644
index 000000000..53ec34e55
--- /dev/null
+++ b/src/hmac_drbg/coverage/config/hmac_drbg_cm_hier.cfg
@@ -0,0 +1,3 @@
+begin line+tgl+fsm+cond+branch
+    +tree hmac_drbg_tb.dut 0
+end
\ No newline at end of file
diff --git a/src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv b/src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv
new file mode 100644
index 000000000..2d2457fda
--- /dev/null
+++ b/src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: Apache-2.0
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+module hmac_drbg_cov_bind;
+    `ifdef FCOV
+    bind hmac_drbg hmac_drbg_cov_if i_hmac_drbg_cov_if(.*);
+    `endif
+endmodule
diff --git a/src/hmac_drbg/coverage/hmac_drbg_cov_if.sv b/src/hmac_drbg/coverage/hmac_drbg_cov_if.sv
new file mode 100644
index 000000000..7a28e44b0
--- /dev/null
+++ b/src/hmac_drbg/coverage/hmac_drbg_cov_if.sv
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: Apache-2.0
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+`ifndef VERILATOR
+
+interface hmac_drbg_cov_if     
+    (
+    input logic           clk,
+    input logic           reset_n
+);
+
+    logic init;
+    logic next;
+    logic zeroize;
+    logic ready;
+    logic valid;
+    
+    logic [1 : 0] hmac_drbg_cmd;
+    logic [4 : 0] drbg_state;
+    logic [383 : 0] prime;
+    logic [383 : 0] drbg;
+
+    parameter logic [383:0] HMAC_DRBG_PRIME = hmac_drbg.HMAC_DRBG_PRIME;
+    
+    assign init = hmac_drbg.init_cmd;
+    assign next = hmac_drbg.next_cmd;
+    assign zeroize = hmac_drbg.zeroize;
+    assign ready = hmac_drbg.ready_reg;
+    assign valid = hmac_drbg.valid_reg;
+
+    assign hmac_drbg_cmd = {next, init};
+
+    assign drbg_state = hmac_drbg.drbg_st_reg;
+    assign drbg = hmac_drbg.drbg;
+
+    covergroup hmac_drbg_control_cg @(posedge clk);
+        reset_cp: coverpoint reset_n;
+
+        init_cp: coverpoint init;
+        next_cp: coverpoint next;
+        zeroize_cp: coverpoint zeroize;
+        ready_cp: coverpoint ready;
+        valid_cp: coverpoint valid;
+
+        hmac_cmd_cp: coverpoint hmac_drbg_cmd  {bins cmd[]   = (0, 0 => 1, 2 => 0, 0);}
+
+        init_ready_cp: cross ready, init {
+            illegal_bins illegal_init_when_ready_low = binsof(init) intersect {1} && binsof(ready) intersect {0};
+        }
+
+        next_ready_cp: cross ready, next {
+            illegal_bins illegal_next_when_ready_low = binsof(next) intersect {1} && binsof(ready) intersect {0};
+        }
+        zeroize_ready_cp: cross ready, zeroize;
+        zeroize_init_cp: cross zeroize, init;
+        zeroize_next_cp: cross zeroize, next;
+
+    endgroup
+
+    covergroup hmac_drbg_state_cg @(posedge clk);
+        drbg_state_cp: coverpoint drbg_state {
+            bins all_states[] = {[0:14]};
+        }
+    endgroup
+
+    covergroup hmac_drbg_output_cg @(posedge clk);
+        drbg_cp: coverpoint drbg iff (valid) {
+            bins zero = {384'h0};
+            bins max_value = {HMAC_DRBG_PRIME - 1};
+            bins others = default;
+            
+            illegal_bins illegal_zero = {384'h0};
+            illegal_bins illegal_above_prime = {[HMAC_DRBG_PRIME:$]};
+        }
+    endgroup
+
+    hmac_drbg_state_cg hmac_drbg_state_cov = new();
+    hmac_drbg_control_cg hmac_drbg_control_cov = new();
+    hmac_drbg_output_cg hmac_drbg_output_cov = new();
+
+endinterface
+
+`endif
\ No newline at end of file
diff --git a/src/hmac_drbg/tb/hmac_drbg_tb.sv b/src/hmac_drbg/tb/hmac_drbg_tb.sv
index ab511ee18..f385cb5be 100644
--- a/src/hmac_drbg/tb/hmac_drbg_tb.sv
+++ b/src/hmac_drbg/tb/hmac_drbg_tb.sv
@@ -116,6 +116,8 @@ module hmac_drbg_tb();
         .drbg(drbg_tb)
     );
 
+  //bind coverage file
+  hmac_drbg_cov_bind i_hmac_drbg_cov_bind();
 
   //----------------------------------------------------------------
   // clk_gen
diff --git a/src/integration/config/compile.yml b/src/integration/config/compile.yml
index f40c7da6a..fe5472307 100644
--- a/src/integration/config/compile.yml
+++ b/src/integration/config/compile.yml
@@ -72,6 +72,7 @@ requires:
   - sha512_coverage
   - sha256_coverage
   - hmac_coverage
+  - hmac_drbg_coverage
   - ecc_coverage
   - soc_ifc_coverage
   - pcrvault_cov

From 6785f8479b893009c02d140e8685ee723bdfbd8d Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Thu, 6 Feb 2025 08:16:47 -0800
Subject: [PATCH 14/20] added hmac_drbg coverage to caliptra_top

---
 src/integration/tb/caliptra_top_tb_services.sv       | 1 +
 src/integration/uvmf_caliptra_top/config/compile.yml | 1 +
 2 files changed, 2 insertions(+)

diff --git a/src/integration/tb/caliptra_top_tb_services.sv b/src/integration/tb/caliptra_top_tb_services.sv
index a1ae8a364..e6c76f470 100644
--- a/src/integration/tb/caliptra_top_tb_services.sv
+++ b/src/integration/tb/caliptra_top_tb_services.sv
@@ -2186,6 +2186,7 @@ caliptra_top_cov_bind i_caliptra_top_cov_bind();
 sha512_ctrl_cov_bind i_sha512_ctrl_cov_bind();
 sha256_ctrl_cov_bind i_sha256_ctrl_cov_bind();
 hmac_ctrl_cov_bind i_hmac_ctrl_cov_bind();
+hmac_drbg_cov_bind i_hmac_drbg_cov_bind();
 ecc_top_cov_bind i_ecc_top_cov_bind();
 mldsa_top_cov_bind i_mldsa_top_cov_bind();
 keyvault_cov_bind i_keyvault_cov_bind();
diff --git a/src/integration/uvmf_caliptra_top/config/compile.yml b/src/integration/uvmf_caliptra_top/config/compile.yml
index 12e4e0654..6a1cb1525 100644
--- a/src/integration/uvmf_caliptra_top/config/compile.yml
+++ b/src/integration/uvmf_caliptra_top/config/compile.yml
@@ -20,6 +20,7 @@ requires:
   - sha512_coverage
   - sha256_coverage
   - hmac_coverage
+  - hmac_drbg_coverage
   - ecc_coverage
   - soc_ifc_coverage
   - pcrvault_cov

From ef50d5072aa8bf8d0bc537261ff5d4e271f2473c Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Thu, 6 Feb 2025 10:12:11 -0800
Subject: [PATCH 15/20] renamed hmac_Drbg_dut to dut

---
 src/hmac_drbg/tb/hmac_drbg_tb.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/hmac_drbg/tb/hmac_drbg_tb.sv b/src/hmac_drbg/tb/hmac_drbg_tb.sv
index f385cb5be..72a37b22f 100644
--- a/src/hmac_drbg/tb/hmac_drbg_tb.sv
+++ b/src/hmac_drbg/tb/hmac_drbg_tb.sv
@@ -101,7 +101,7 @@ module hmac_drbg_tb();
   #(
         .REG_SIZE(REG_SIZE),
         .HMAC_DRBG_PRIME(HMAC_DRBG_PRIME)
-  ) hmac_drbg_dut
+  ) dut
   (
         .clk(clk_tb),
         .reset_n(reset_n_tb),

From 8e3ecf79952a14bb395872cf77232d126b57009c Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Thu, 6 Feb 2025 10:54:05 -0800
Subject: [PATCH 16/20] renamed hmac_drbg_dut to dut

---
 src/hmac_drbg/tb/hmac_drbg_tb.sv | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/hmac_drbg/tb/hmac_drbg_tb.sv b/src/hmac_drbg/tb/hmac_drbg_tb.sv
index 72a37b22f..e0770b95d 100644
--- a/src/hmac_drbg/tb/hmac_drbg_tb.sv
+++ b/src/hmac_drbg/tb/hmac_drbg_tb.sv
@@ -172,12 +172,12 @@ module hmac_drbg_tb();
       $display("cycle: 0x%016x", cycle_ctr);
       $display("State of DUT");
       $display("------------");
-      $display("STATE  = 0x%02d", hmac_drbg_dut.drbg_st_reg);
+      $display("STATE  = 0x%02d", dut.drbg_st_reg);
       $display("");
-      $display("HMAC block: 0x%096x",hmac_drbg_dut.HMAC_block);
-      $display("HMAC key: 0x%096x",hmac_drbg_dut.HMAC_key);
-      $display("HMAC lfsr_seed: 0x%096x",hmac_drbg_dut.lfsr_seed);
-      $display("HMAC tag: 0x%096x",hmac_drbg_dut.HMAC_tag);
+      $display("HMAC block: 0x%096x",dut.HMAC_block);
+      $display("HMAC key: 0x%096x",dut.HMAC_key);
+      $display("HMAC lfsr_seed: 0x%096x",dut.lfsr_seed);
+      $display("HMAC tag: 0x%096x",dut.HMAC_tag);
       $display("");
 
     end
@@ -530,10 +530,10 @@ module hmac_drbg_tb();
   //
   // This always block enables to debug the state transactions
   //----------------------------------------------------------------
-  always @(hmac_drbg_dut.drbg_st_reg)
+  always @(dut.drbg_st_reg)
   begin
       if (DEBUG)
-        $display("--------------\n state\n %0d --------------", hmac_drbg_dut.drbg_st_reg);
+        $display("--------------\n state\n %0d --------------", dut.drbg_st_reg);
   end
 
 

From 43f1eb700c93d73df0be1b4bc49fb52964b8f184 Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Thu, 6 Feb 2025 13:14:08 -0800
Subject: [PATCH 17/20] updated vf files

---
 src/hmac_drbg/config/hmac_drbg_tb.vf                           | 3 +++
 src/integration/config/caliptra_top_tb.vf                      | 3 +++
 src/integration/config/caliptra_top_tb_pkg.vf                  | 3 +++
 src/integration/config/caliptra_top_trng_tb.vf                 | 3 +++
 src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf  | 3 +++
 .../uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf        | 3 +++
 6 files changed, 18 insertions(+)

diff --git a/src/hmac_drbg/config/hmac_drbg_tb.vf b/src/hmac_drbg/config/hmac_drbg_tb.vf
index 4895cf61b..dddca2fc0 100644
--- a/src/hmac_drbg/config/hmac_drbg_tb.vf
+++ b/src/hmac_drbg/config/hmac_drbg_tb.vf
@@ -2,6 +2,7 @@
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/keyvault/rtl
 +incdir+${CALIPTRA_ROOT}/src/pcrvault/rtl
++incdir+${CALIPTRA_ROOT}/src/hmac_drbg/coverage
 +incdir+${CALIPTRA_ROOT}/src/hmac_drbg/tb
 +incdir+${CALIPTRA_ROOT}/src/sha512/rtl
 +incdir+${CALIPTRA_ROOT}/src/sha512_masked/rtl
@@ -25,6 +26,8 @@ ${CALIPTRA_ROOT}/src/keyvault/rtl/kv_macros.svh
 ${CALIPTRA_ROOT}/src/pcrvault/rtl/pv_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/pcrvault/rtl/pv_macros.svh
 ${CALIPTRA_ROOT}/src/pcrvault/rtl/pv_gen_hash.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_if.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv
 ${CALIPTRA_ROOT}/src/hmac_drbg/tb/hmac_drbg_tb.sv
 ${CALIPTRA_ROOT}/src/libs/rtl/ahb_to_reg_adapter.sv
 ${CALIPTRA_ROOT}/src/keyvault/rtl/kv_reg_pkg.sv
diff --git a/src/integration/config/caliptra_top_tb.vf b/src/integration/config/caliptra_top_tb.vf
index 1ee71fc16..fc510161f 100644
--- a/src/integration/config/caliptra_top_tb.vf
+++ b/src/integration/config/caliptra_top_tb.vf
@@ -24,6 +24,7 @@
 +incdir+${CALIPTRA_ROOT}/src/sha512/coverage
 +incdir+${CALIPTRA_ROOT}/src/sha256/coverage
 +incdir+${CALIPTRA_ROOT}/src/hmac/coverage
++incdir+${CALIPTRA_ROOT}/src/hmac_drbg/coverage
 +incdir+${CALIPTRA_ROOT}/src/ecc/coverage
 +incdir+${CALIPTRA_ROOT}/src/soc_ifc/coverage
 +incdir+${CALIPTRA_ROOT}/src/pcrvault/coverage
@@ -158,6 +159,8 @@ ${CALIPTRA_ROOT}/src/sha256/coverage/sha256_ctrl_cov_if.sv
 ${CALIPTRA_ROOT}/src/sha256/coverage/sha256_ctrl_cov_bind.sv
 ${CALIPTRA_ROOT}/src/hmac/coverage/hmac_ctrl_cov_if.sv
 ${CALIPTRA_ROOT}/src/hmac/coverage/hmac_ctrl_cov_bind.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_if.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv
 ${CALIPTRA_ROOT}/src/ecc/coverage/ecc_top_cov_if.sv
 ${CALIPTRA_ROOT}/src/ecc/coverage/ecc_top_cov_bind.sv
 ${CALIPTRA_ROOT}/src/soc_ifc/coverage/soc_ifc_cov_if.sv
diff --git a/src/integration/config/caliptra_top_tb_pkg.vf b/src/integration/config/caliptra_top_tb_pkg.vf
index d513848e8..e831828c4 100644
--- a/src/integration/config/caliptra_top_tb_pkg.vf
+++ b/src/integration/config/caliptra_top_tb_pkg.vf
@@ -24,6 +24,7 @@
 +incdir+${CALIPTRA_ROOT}/src/sha512/coverage
 +incdir+${CALIPTRA_ROOT}/src/sha256/coverage
 +incdir+${CALIPTRA_ROOT}/src/hmac/coverage
++incdir+${CALIPTRA_ROOT}/src/hmac_drbg/coverage
 +incdir+${CALIPTRA_ROOT}/src/ecc/coverage
 +incdir+${CALIPTRA_ROOT}/src/soc_ifc/coverage
 +incdir+${CALIPTRA_ROOT}/src/pcrvault/coverage
@@ -158,6 +159,8 @@ ${CALIPTRA_ROOT}/src/sha256/coverage/sha256_ctrl_cov_if.sv
 ${CALIPTRA_ROOT}/src/sha256/coverage/sha256_ctrl_cov_bind.sv
 ${CALIPTRA_ROOT}/src/hmac/coverage/hmac_ctrl_cov_if.sv
 ${CALIPTRA_ROOT}/src/hmac/coverage/hmac_ctrl_cov_bind.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_if.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv
 ${CALIPTRA_ROOT}/src/ecc/coverage/ecc_top_cov_if.sv
 ${CALIPTRA_ROOT}/src/ecc/coverage/ecc_top_cov_bind.sv
 ${CALIPTRA_ROOT}/src/soc_ifc/coverage/soc_ifc_cov_if.sv
diff --git a/src/integration/config/caliptra_top_trng_tb.vf b/src/integration/config/caliptra_top_trng_tb.vf
index 1ee71fc16..fc510161f 100644
--- a/src/integration/config/caliptra_top_trng_tb.vf
+++ b/src/integration/config/caliptra_top_trng_tb.vf
@@ -24,6 +24,7 @@
 +incdir+${CALIPTRA_ROOT}/src/sha512/coverage
 +incdir+${CALIPTRA_ROOT}/src/sha256/coverage
 +incdir+${CALIPTRA_ROOT}/src/hmac/coverage
++incdir+${CALIPTRA_ROOT}/src/hmac_drbg/coverage
 +incdir+${CALIPTRA_ROOT}/src/ecc/coverage
 +incdir+${CALIPTRA_ROOT}/src/soc_ifc/coverage
 +incdir+${CALIPTRA_ROOT}/src/pcrvault/coverage
@@ -158,6 +159,8 @@ ${CALIPTRA_ROOT}/src/sha256/coverage/sha256_ctrl_cov_if.sv
 ${CALIPTRA_ROOT}/src/sha256/coverage/sha256_ctrl_cov_bind.sv
 ${CALIPTRA_ROOT}/src/hmac/coverage/hmac_ctrl_cov_if.sv
 ${CALIPTRA_ROOT}/src/hmac/coverage/hmac_ctrl_cov_bind.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_if.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv
 ${CALIPTRA_ROOT}/src/ecc/coverage/ecc_top_cov_if.sv
 ${CALIPTRA_ROOT}/src/ecc/coverage/ecc_top_cov_bind.sv
 ${CALIPTRA_ROOT}/src/soc_ifc/coverage/soc_ifc_cov_if.sv
diff --git a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf
index afda0ed67..c4710a656 100644
--- a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf
+++ b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf
@@ -58,6 +58,7 @@
 +incdir+${CALIPTRA_ROOT}/src/sha512/coverage
 +incdir+${CALIPTRA_ROOT}/src/sha256/coverage
 +incdir+${CALIPTRA_ROOT}/src/hmac/coverage
++incdir+${CALIPTRA_ROOT}/src/hmac_drbg/coverage
 +incdir+${CALIPTRA_ROOT}/src/ecc/coverage
 +incdir+${CALIPTRA_ROOT}/src/soc_ifc/coverage
 +incdir+${CALIPTRA_ROOT}/src/pcrvault/coverage
@@ -269,6 +270,8 @@ ${CALIPTRA_ROOT}/src/sha256/coverage/sha256_ctrl_cov_if.sv
 ${CALIPTRA_ROOT}/src/sha256/coverage/sha256_ctrl_cov_bind.sv
 ${CALIPTRA_ROOT}/src/hmac/coverage/hmac_ctrl_cov_if.sv
 ${CALIPTRA_ROOT}/src/hmac/coverage/hmac_ctrl_cov_bind.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_if.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv
 ${CALIPTRA_ROOT}/src/ecc/coverage/ecc_top_cov_if.sv
 ${CALIPTRA_ROOT}/src/ecc/coverage/ecc_top_cov_bind.sv
 ${CALIPTRA_ROOT}/src/soc_ifc/coverage/soc_ifc_cov_if.sv
diff --git a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf
index afda0ed67..c4710a656 100644
--- a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf
+++ b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf
@@ -58,6 +58,7 @@
 +incdir+${CALIPTRA_ROOT}/src/sha512/coverage
 +incdir+${CALIPTRA_ROOT}/src/sha256/coverage
 +incdir+${CALIPTRA_ROOT}/src/hmac/coverage
++incdir+${CALIPTRA_ROOT}/src/hmac_drbg/coverage
 +incdir+${CALIPTRA_ROOT}/src/ecc/coverage
 +incdir+${CALIPTRA_ROOT}/src/soc_ifc/coverage
 +incdir+${CALIPTRA_ROOT}/src/pcrvault/coverage
@@ -269,6 +270,8 @@ ${CALIPTRA_ROOT}/src/sha256/coverage/sha256_ctrl_cov_if.sv
 ${CALIPTRA_ROOT}/src/sha256/coverage/sha256_ctrl_cov_bind.sv
 ${CALIPTRA_ROOT}/src/hmac/coverage/hmac_ctrl_cov_if.sv
 ${CALIPTRA_ROOT}/src/hmac/coverage/hmac_ctrl_cov_bind.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_if.sv
+${CALIPTRA_ROOT}/src/hmac_drbg/coverage/hmac_drbg_cov_bind.sv
 ${CALIPTRA_ROOT}/src/ecc/coverage/ecc_top_cov_if.sv
 ${CALIPTRA_ROOT}/src/ecc/coverage/ecc_top_cov_bind.sv
 ${CALIPTRA_ROOT}/src/soc_ifc/coverage/soc_ifc_cov_if.sv

From 9961b2a5061631d5b5698d66ccb8c5a9cc4f7f20 Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Thu, 6 Feb 2025 23:12:24 +0000
Subject: [PATCH 18/20] MICROSOFT AUTOMATED PIPELINE: Stamp 'mojtaba-hmac-drbg'
 with updated timestamp and hash after successful run

---
 .github/workflow_metadata/pr_hash      | 2 +-
 .github/workflow_metadata/pr_timestamp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflow_metadata/pr_hash b/.github/workflow_metadata/pr_hash
index 537d9ff67..63ee549c3 100644
--- a/.github/workflow_metadata/pr_hash
+++ b/.github/workflow_metadata/pr_hash
@@ -1 +1 @@
-e6bbd73686f0090bbc6271c42d6cb15cfa30545915c37ec7181ce030cebef64a0e4eebb7f3aba6b6758f42c8269cb9f1
\ No newline at end of file
+1b7b63b06f401db465ea6cc20689535eb9531e02369fcccbc3429d72846d4b46396820c6ff0463fc715b24d561c02f48
\ No newline at end of file
diff --git a/.github/workflow_metadata/pr_timestamp b/.github/workflow_metadata/pr_timestamp
index 9c4a62f5a..efa5746f6 100644
--- a/.github/workflow_metadata/pr_timestamp
+++ b/.github/workflow_metadata/pr_timestamp
@@ -1 +1 @@
-1738718583
\ No newline at end of file
+1738883536
\ No newline at end of file

From 92ccf79ef365f4971dab85902c3a2902b333c3a2 Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Fri, 7 Feb 2025 13:18:20 -0800
Subject: [PATCH 19/20] updated vf files

---
 .../config/uvmf_caliptra_top.vf               | 42 +++++++++----------
 .../config/uvmf_caliptra_top_itrng.vf         | 42 +++++++++----------
 .../config/uvmf_caliptra_top_vip.vf           | 42 +++++++++----------
 src/libs/config/avery_axi_uvm_lib.vf          | 42 +++++++++----------
 .../uvmf_soc_ifc/config/uvmf_soc_ifc.vf       | 42 +++++++++----------
 .../uvmf_soc_ifc/config/uvmf_soc_ifc_vip.vf   | 42 +++++++++----------
 6 files changed, 126 insertions(+), 126 deletions(-)

diff --git a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf
index 96c079788..5e4f93b77 100644
--- a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf
+++ b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf
@@ -14,14 +14,14 @@
 +incdir+${UVMF_HOME}/uvmf_base_pkg
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies
-+incdir+${AVERY_AXI}/src.uvm
-+incdir+${AVERY_AXI}/testsuite/examples.uvm
-+incdir+${AVERY_AXI}/src.axi.VCS
-+incdir+${AVERY_AXI}/src.axi
-+incdir+${AVERY_AXI}/testbench
-+incdir+${AVERY_SIM}/src
-+incdir+${AVERY_SIM}/src.IEEE
-+incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
++incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
@@ -134,19 +134,19 @@ ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/qvip_ahb_lite_slave_
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/hdl_qvip_ahb_lite_slave.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_clk_gen.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_reset_gen.sv
-${AVERY_SIM}/src/avery_pkg.sv
-${AVERY_SIM}/src/avery_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_pkg.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
-${AVERY_AXI}/src.axi/aaxi_class_pll.sv
-${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
-${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_intf.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_dma_reg_uvm.sv
 ${CALIPTRA_ROOT}/src/integration/rtl/config_defines.svh
 ${CALIPTRA_ROOT}/src/integration/rtl/caliptra_reg_defines.svh
diff --git a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf
index 96c079788..5e4f93b77 100644
--- a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf
+++ b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf
@@ -14,14 +14,14 @@
 +incdir+${UVMF_HOME}/uvmf_base_pkg
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies
-+incdir+${AVERY_AXI}/src.uvm
-+incdir+${AVERY_AXI}/testsuite/examples.uvm
-+incdir+${AVERY_AXI}/src.axi.VCS
-+incdir+${AVERY_AXI}/src.axi
-+incdir+${AVERY_AXI}/testbench
-+incdir+${AVERY_SIM}/src
-+incdir+${AVERY_SIM}/src.IEEE
-+incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
++incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
@@ -134,19 +134,19 @@ ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/qvip_ahb_lite_slave_
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/hdl_qvip_ahb_lite_slave.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_clk_gen.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_reset_gen.sv
-${AVERY_SIM}/src/avery_pkg.sv
-${AVERY_SIM}/src/avery_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_pkg.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
-${AVERY_AXI}/src.axi/aaxi_class_pll.sv
-${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
-${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_intf.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_dma_reg_uvm.sv
 ${CALIPTRA_ROOT}/src/integration/rtl/config_defines.svh
 ${CALIPTRA_ROOT}/src/integration/rtl/caliptra_reg_defines.svh
diff --git a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_vip.vf b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_vip.vf
index d8746c29e..dcf5cf44a 100644
--- a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_vip.vf
+++ b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_vip.vf
@@ -14,14 +14,14 @@
 +incdir+${UVMF_HOME}/uvmf_base_pkg
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies
-+incdir+${AVERY_AXI}/src.uvm
-+incdir+${AVERY_AXI}/testsuite/examples.uvm
-+incdir+${AVERY_AXI}/src.axi.VCS
-+incdir+${AVERY_AXI}/src.axi
-+incdir+${AVERY_AXI}/testbench
-+incdir+${AVERY_SIM}/src
-+incdir+${AVERY_SIM}/src.IEEE
-+incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
++incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
@@ -86,19 +86,19 @@ ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/qvip_ahb_lite_slave_
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/hdl_qvip_ahb_lite_slave.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_clk_gen.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_reset_gen.sv
-${AVERY_SIM}/src/avery_pkg.sv
-${AVERY_SIM}/src/avery_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_pkg.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
-${AVERY_AXI}/src.axi/aaxi_class_pll.sv
-${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
-${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_intf.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_dma_reg_uvm.sv
 ${CALIPTRA_ROOT}/src/integration/rtl/config_defines.svh
 ${CALIPTRA_ROOT}/src/integration/rtl/caliptra_reg_defines.svh
diff --git a/src/libs/config/avery_axi_uvm_lib.vf b/src/libs/config/avery_axi_uvm_lib.vf
index 0b715351b..61570c944 100644
--- a/src/libs/config/avery_axi_uvm_lib.vf
+++ b/src/libs/config/avery_axi_uvm_lib.vf
@@ -1,25 +1,25 @@
 +incdir+${UVM_HOME}/src
 +incdir+${UVM_HOME}/src/dpi
-+incdir+${AVERY_AXI}/src.uvm
-+incdir+${AVERY_AXI}/testsuite/examples.uvm
-+incdir+${AVERY_AXI}/src.axi.VCS
-+incdir+${AVERY_AXI}/src.axi
-+incdir+${AVERY_AXI}/testbench
-+incdir+${AVERY_SIM}/src
-+incdir+${AVERY_SIM}/src.IEEE
-+incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
++incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 ${UVM_HOME}/src/uvm_pkg.sv
-${AVERY_SIM}/src/avery_pkg.sv
-${AVERY_SIM}/src/avery_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_pkg.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
-${AVERY_AXI}/src.axi/aaxi_class_pll.sv
-${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
-${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_intf.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
\ No newline at end of file
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
\ No newline at end of file
diff --git a/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc.vf b/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc.vf
index ae09f4f05..2f2ebd2a4 100644
--- a/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc.vf
+++ b/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc.vf
@@ -14,14 +14,14 @@
 +incdir+${UVMF_HOME}/uvmf_base_pkg
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies
-+incdir+${AVERY_AXI}/src.uvm
-+incdir+${AVERY_AXI}/testsuite/examples.uvm
-+incdir+${AVERY_AXI}/src.axi.VCS
-+incdir+${AVERY_AXI}/src.axi
-+incdir+${AVERY_AXI}/testbench
-+incdir+${AVERY_SIM}/src
-+incdir+${AVERY_SIM}/src.IEEE
-+incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
++incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
@@ -90,19 +90,19 @@ ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/qvip_ahb_lite_slave_
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/hdl_qvip_ahb_lite_slave.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_clk_gen.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_reset_gen.sv
-${AVERY_SIM}/src/avery_pkg.sv
-${AVERY_SIM}/src/avery_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_pkg.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
-${AVERY_AXI}/src.axi/aaxi_class_pll.sv
-${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
-${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_intf.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_dma_reg_uvm.sv
 ${CALIPTRA_ROOT}/src/integration/rtl/config_defines.svh
 ${CALIPTRA_ROOT}/src/integration/rtl/caliptra_reg_defines.svh
diff --git a/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc_vip.vf b/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc_vip.vf
index fe404af21..d9779436a 100644
--- a/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc_vip.vf
+++ b/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc_vip.vf
@@ -14,14 +14,14 @@
 +incdir+${UVMF_HOME}/uvmf_base_pkg
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies
-+incdir+${AVERY_AXI}/src.uvm
-+incdir+${AVERY_AXI}/testsuite/examples.uvm
-+incdir+${AVERY_AXI}/src.axi.VCS
-+incdir+${AVERY_AXI}/src.axi
-+incdir+${AVERY_AXI}/testbench
-+incdir+${AVERY_SIM}/src
-+incdir+${AVERY_SIM}/src.IEEE
-+incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
++incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
++incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
++incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
@@ -85,19 +85,19 @@ ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/qvip_ahb_lite_slave_
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/hdl_qvip_ahb_lite_slave.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_clk_gen.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_reset_gen.sv
-${AVERY_SIM}/src/avery_pkg.sv
-${AVERY_SIM}/src/avery_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_pkg.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
-${AVERY_AXI}/src.axi/aaxi_class_pll.sv
-${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
-${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
-${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
-${AVERY_AXI}/src.axi/aaxi_intf.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
-${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
+/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_dma_reg_uvm.sv
 ${CALIPTRA_ROOT}/src/integration/rtl/config_defines.svh
 ${CALIPTRA_ROOT}/src/integration/rtl/caliptra_reg_defines.svh

From 0877583f00dac4ed53394e067f83df0839efaa3e Mon Sep 17 00:00:00 2001
From: Mojtaba Bisheh Niasar <mojtabab@microsoft.com>
Date: Wed, 12 Feb 2025 10:26:40 -0800
Subject: [PATCH 20/20] updated vf files

---
 .../config/uvmf_caliptra_top.vf               | 42 +++++++++----------
 .../config/uvmf_caliptra_top_itrng.vf         | 42 +++++++++----------
 .../config/uvmf_caliptra_top_vip.vf           | 42 +++++++++----------
 src/libs/config/avery_axi_uvm_lib.vf          | 42 +++++++++----------
 .../uvmf_soc_ifc/config/uvmf_soc_ifc.vf       | 42 +++++++++----------
 .../uvmf_soc_ifc/config/uvmf_soc_ifc_vip.vf   | 42 +++++++++----------
 6 files changed, 126 insertions(+), 126 deletions(-)

diff --git a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf
index 5e4f93b77..96c079788 100644
--- a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf
+++ b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf
@@ -14,14 +14,14 @@
 +incdir+${UVMF_HOME}/uvmf_base_pkg
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
-+incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+${AVERY_AXI}/src.uvm
++incdir+${AVERY_AXI}/testsuite/examples.uvm
++incdir+${AVERY_AXI}/src.axi.VCS
++incdir+${AVERY_AXI}/src.axi
++incdir+${AVERY_AXI}/testbench
++incdir+${AVERY_SIM}/src
++incdir+${AVERY_SIM}/src.IEEE
++incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
@@ -134,19 +134,19 @@ ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/qvip_ahb_lite_slave_
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/hdl_qvip_ahb_lite_slave.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_clk_gen.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_reset_gen.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
-/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
+${AVERY_SIM}/src/avery_pkg.sv
+${AVERY_SIM}/src/avery_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_pkg.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
+${AVERY_AXI}/src.axi/aaxi_class_pll.sv
+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
+${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_intf.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_dma_reg_uvm.sv
 ${CALIPTRA_ROOT}/src/integration/rtl/config_defines.svh
 ${CALIPTRA_ROOT}/src/integration/rtl/caliptra_reg_defines.svh
diff --git a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf
index 5e4f93b77..96c079788 100644
--- a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf
+++ b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf
@@ -14,14 +14,14 @@
 +incdir+${UVMF_HOME}/uvmf_base_pkg
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
-+incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+${AVERY_AXI}/src.uvm
++incdir+${AVERY_AXI}/testsuite/examples.uvm
++incdir+${AVERY_AXI}/src.axi.VCS
++incdir+${AVERY_AXI}/src.axi
++incdir+${AVERY_AXI}/testbench
++incdir+${AVERY_SIM}/src
++incdir+${AVERY_SIM}/src.IEEE
++incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
@@ -134,19 +134,19 @@ ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/qvip_ahb_lite_slave_
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/hdl_qvip_ahb_lite_slave.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_clk_gen.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_reset_gen.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
-/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
+${AVERY_SIM}/src/avery_pkg.sv
+${AVERY_SIM}/src/avery_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_pkg.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
+${AVERY_AXI}/src.axi/aaxi_class_pll.sv
+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
+${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_intf.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_dma_reg_uvm.sv
 ${CALIPTRA_ROOT}/src/integration/rtl/config_defines.svh
 ${CALIPTRA_ROOT}/src/integration/rtl/caliptra_reg_defines.svh
diff --git a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_vip.vf b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_vip.vf
index dcf5cf44a..d8746c29e 100644
--- a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_vip.vf
+++ b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_vip.vf
@@ -14,14 +14,14 @@
 +incdir+${UVMF_HOME}/uvmf_base_pkg
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
-+incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+${AVERY_AXI}/src.uvm
++incdir+${AVERY_AXI}/testsuite/examples.uvm
++incdir+${AVERY_AXI}/src.axi.VCS
++incdir+${AVERY_AXI}/src.axi
++incdir+${AVERY_AXI}/testbench
++incdir+${AVERY_SIM}/src
++incdir+${AVERY_SIM}/src.IEEE
++incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
@@ -86,19 +86,19 @@ ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/qvip_ahb_lite_slave_
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/hdl_qvip_ahb_lite_slave.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_clk_gen.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_reset_gen.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
-/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
+${AVERY_SIM}/src/avery_pkg.sv
+${AVERY_SIM}/src/avery_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_pkg.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
+${AVERY_AXI}/src.axi/aaxi_class_pll.sv
+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
+${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_intf.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_dma_reg_uvm.sv
 ${CALIPTRA_ROOT}/src/integration/rtl/config_defines.svh
 ${CALIPTRA_ROOT}/src/integration/rtl/caliptra_reg_defines.svh
diff --git a/src/libs/config/avery_axi_uvm_lib.vf b/src/libs/config/avery_axi_uvm_lib.vf
index 61570c944..0b715351b 100644
--- a/src/libs/config/avery_axi_uvm_lib.vf
+++ b/src/libs/config/avery_axi_uvm_lib.vf
@@ -1,25 +1,25 @@
 +incdir+${UVM_HOME}/src
 +incdir+${UVM_HOME}/src/dpi
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
-+incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+${AVERY_AXI}/src.uvm
++incdir+${AVERY_AXI}/testsuite/examples.uvm
++incdir+${AVERY_AXI}/src.axi.VCS
++incdir+${AVERY_AXI}/src.axi
++incdir+${AVERY_AXI}/testbench
++incdir+${AVERY_SIM}/src
++incdir+${AVERY_SIM}/src.IEEE
++incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 ${UVM_HOME}/src/uvm_pkg.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
-/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
\ No newline at end of file
+${AVERY_SIM}/src/avery_pkg.sv
+${AVERY_SIM}/src/avery_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_pkg.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
+${AVERY_AXI}/src.axi/aaxi_class_pll.sv
+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
+${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_intf.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
\ No newline at end of file
diff --git a/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc.vf b/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc.vf
index 2f2ebd2a4..ae09f4f05 100644
--- a/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc.vf
+++ b/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc.vf
@@ -14,14 +14,14 @@
 +incdir+${UVMF_HOME}/uvmf_base_pkg
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
-+incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+${AVERY_AXI}/src.uvm
++incdir+${AVERY_AXI}/testsuite/examples.uvm
++incdir+${AVERY_AXI}/src.axi.VCS
++incdir+${AVERY_AXI}/src.axi
++incdir+${AVERY_AXI}/testbench
++incdir+${AVERY_SIM}/src
++incdir+${AVERY_SIM}/src.IEEE
++incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
@@ -90,19 +90,19 @@ ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/qvip_ahb_lite_slave_
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/hdl_qvip_ahb_lite_slave.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_clk_gen.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_reset_gen.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
-/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
+${AVERY_SIM}/src/avery_pkg.sv
+${AVERY_SIM}/src/avery_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_pkg.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
+${AVERY_AXI}/src.axi/aaxi_class_pll.sv
+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
+${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_intf.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_dma_reg_uvm.sv
 ${CALIPTRA_ROOT}/src/integration/rtl/config_defines.svh
 ${CALIPTRA_ROOT}/src/integration/rtl/caliptra_reg_defines.svh
diff --git a/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc_vip.vf b/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc_vip.vf
index d9779436a..fe404af21 100644
--- a/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc_vip.vf
+++ b/src/soc_ifc/uvmf_soc_ifc/config/uvmf_soc_ifc_vip.vf
@@ -14,14 +14,14 @@
 +incdir+${UVMF_HOME}/uvmf_base_pkg
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf
 +incdir+${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testsuite/examples.uvm
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi.VCS
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/src.axi
-+incdir+/cad/tools/mentor/avery/2024.3/axixactor/testbench
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src
-+incdir+/cad/tools/mentor/avery/2024.3/avery_sim/src.IEEE
-+incdir+/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
++incdir+${AVERY_AXI}/src.uvm
++incdir+${AVERY_AXI}/testsuite/examples.uvm
++incdir+${AVERY_AXI}/src.axi.VCS
++incdir+${AVERY_AXI}/src.axi
++incdir+${AVERY_AXI}/testbench
++incdir+${AVERY_SIM}/src
++incdir+${AVERY_SIM}/src.IEEE
++incdir+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva
 +incdir+${CALIPTRA_ROOT}/src/libs/aaxi_uvm
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
@@ -85,19 +85,19 @@ ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/qvip_ahb_lite_slave_
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/hdl_qvip_ahb_lite_slave.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_clk_gen.sv
 ${CALIPTRA_ROOT}/src/libs/uvmf/qvip_ahb_lite_slave_dir/uvmf/default_reset_gen.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg.sv
-/cad/tools/mentor/avery/2024.3/avery_sim/src/avery_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_xactor.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_class_pll.sv
-/home/ws/caliptra/mojtabab/caliptra/ws1/Caliptra/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
-/cad/tools/mentor/avery/2024.3/axixactor/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.VCS/aaxi_busmonitor.v
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_coverage_metrics.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_pkg_test.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.axi/aaxi_intf.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_pkg.sv
-/cad/tools/mentor/avery/2024.3/axixactor/src.uvm/aaxi_uvm_test_top.sv
+${AVERY_SIM}/src/avery_pkg.sv
+${AVERY_SIM}/src/avery_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_pkg.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv
+${AVERY_AXI}/src.axi/aaxi_class_pll.sv
+${MSFT_REPO_ROOT}/src/libs/arm_licensed/BP063-BU-01000-r0p1-00rel0/sva/Axi4PC.sv
+${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv
+${AVERY_AXI}/src.VCS/aaxi_busmonitor.v
+${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv
+${AVERY_AXI}/src.axi/aaxi_pkg_test.sv
+${AVERY_AXI}/src.axi/aaxi_intf.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_pkg.sv
+${AVERY_AXI}/src.uvm/aaxi_uvm_test_top.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_dma_reg_uvm.sv
 ${CALIPTRA_ROOT}/src/integration/rtl/config_defines.svh
 ${CALIPTRA_ROOT}/src/integration/rtl/caliptra_reg_defines.svh