From 77494102f0ee6ae523d375652e4ad2ec9dbe0fd1 Mon Sep 17 00:00:00 2001
From: Matthew Flatt <mflatt@racket-lang.org>
Date: Sun, 24 Mar 2024 15:37:21 -0600
Subject: [PATCH] avoid wrong assembly code for threaded mode on ARMv5 and
 earlier (#819)

---
 c/atomic.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/c/atomic.h b/c/atomic.h
index 6736be2d4..ded6c877a 100644
--- a/c/atomic.h
+++ b/c/atomic.h
@@ -89,7 +89,7 @@ FORCEINLINE int CAS_STORE_RELEASE(volatile void *addr, void *old_val, void *new_
                         : "cc", "memory", "x12", "x7");
   return ret;
 }
-#elif defined(__arm__)
+#elif defined(__arm__) && ((arm_isa_version >= 6) || (__ARM_ARCH >= 6))
 FORCEINLINE int S_cas_any_fence(int load_acquire, volatile void *addr, void *old_val, void *new_val) {
   int ret;
   if (load_acquire)