Define the device IO trait

Any device that supports memory based I/O needs to implement that trait
in order for the VMM to be able to properly dispatch VM exits to the
address ranges said device handles.

Signed-off-by: Samuel Ortiz <[email protected]>

Author: Samuel Ortiz

Cargo.toml

@@ -6,3 +6,4 @@ repository = "https://github.com/rust-vmm/vm-device"
 license = "Apache-2.0"
 
 [dependencies]
+vm-memory = { git = "https://github.com/rust-vmm/vm-memory" }

src/lib.rs

@@ -1,7 +1,31 @@
-#[cfg(test)]
-mod tests {
-    #[test]
-    fn it_works() {
-        assert_eq!(2 + 2, 4);
-    }
+// Copyright © 2019 Intel Corporation. All Rights Reserved.
+// SPDX-License-Identifier: Apache-2.0 OR BSD-3-Clause
+
+//! rust-vmm device model.
+
+extern crate vm_memory;
+
+use vm_memory::GuestAddress;
+
+/// IO Addresses.
+#[derive(Debug, Copy, Clone)]
+pub enum IoAddress {
+    /// Port I/O address.
+    Pio(u16),
+
+    /// Memory mapped I/O address.
+    Mmio(GuestAddress),
+}
+
+/// Device IO trait.
+/// A device supporting memory based I/O should implement this trait, then
+/// register itself against the different IO type ranges it handles.
+/// The VMM will then dispatch IO (PIO or MMIO) VM exits by calling into the
+/// registered devices read or write method from this trait.
+pub trait DeviceIo: Send {
+    /// Read from the guest physical address `addr` to `data`.
+    fn read(&mut self, addr: IoAddress, data: &mut [u8]);
+
+    /// Write `data` to the guest physical address `addr`.
+    fn write(&mut self, addr: IoAddress, data: &[u8]);
 }