Fix undriven dmem write enable and alu_out ordering.

Increase dmem size to match store instruction offset.

Author: diadatp

datapath.v

@@ -75,6 +75,7 @@ module datapath (
 	assign src_a = reg_data1;
 	assign src_b = alu_src ? imm_ext : reg_data2;
 
+	wire [31:0] alu_out;
 	alu alu_inst (
 		.a_in (src_a     ),
 		.b_in (src_b     ),
@@ -83,7 +84,6 @@ module datapath (
 		.c_out(c_out     ),
 		.y_out(alu_out   )
 	);
-	wire [31:0] alu_out;
 	assign alu_result = alu_out;
 
 	wire [31:0] imm_ext;

dmem.v

@@ -6,13 +6,9 @@ module dmem (
 	output [31:0] rdata
 );
 
-	reg [31:0] rdata;
+	reg [31:0] memdata [127:0];
 
-	reg [31:0] memdata[63:0];
-
-	always @(memdata[addr]) begin
-		rdata = memdata[addr];
-	end
+	assign rdata = memdata[addr];
 
 	always @(posedge clk) begin
 		if(1'b1 == we) begin

mips.v

@@ -16,7 +16,6 @@ module mips (
     wire       branch    ;
     wire       jump      ;
     wire       mem_to_reg;
-    wire       mem_write ;
     wire       reg_dst   ;
     wire       reg_write ;
 
@@ -27,7 +26,7 @@ module mips (
         .branch    (branch    ),
         .jump      (jump      ),
         .mem_to_reg(mem_to_reg),
-        .mem_write (mem_write ),
+        .mem_write (dmem_we   ),
         .reg_dst   (reg_dst   ),
         .reg_write (reg_write )
     );
@@ -40,7 +39,7 @@ module mips (
         .branch    (branch    ),
         .jump      (jump      ),
         .mem_to_reg(mem_to_reg),
-        .mem_write (mem_write ),
+        .mem_write (dmem_we   ),
         .reg_dst   (reg_dst   ),
         .reg_write (reg_write ),
         .instr     (imem_data ),