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regression/cbmc-concurrency
svcomp13_fib_bench_longer_safe
svcomp13_fib_bench_longer_unsafe
27 files changed +27
-27
lines changed Original file line number Diff line number Diff line change 1
1
CORE
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2
main.c
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-
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+ --no-standard-checks
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4
^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
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1
CORE pthread
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2
main.c
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-
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+ --no-standard-checks
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^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
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2
main.c
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-
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+ --no-standard-checks
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^EXIT=10$
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^SIGNAL=0$
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^VERIFICATION FAILED$
Original file line number Diff line number Diff line change 1
1
CORE
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2
main.c
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-
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+ --no-standard-checks
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^EXIT=10$
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^SIGNAL=0$
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^VERIFICATION FAILED$
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1
CORE
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2
main.c
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-
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+ --no-standard-checks
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^EXIT=10$
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^SIGNAL=0$
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^VERIFICATION FAILED$
Original file line number Diff line number Diff line change 1
1
CORE
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2
main.c
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- -Dlocals_bug
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+ --no-standard-checks - Dlocals_bug
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^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE
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2
main.c
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-
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+ --no-standard-checks
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^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE
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2
main.c
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-
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+ --no-standard-checks
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^EXIT=10$
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^SIGNAL=0$
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^VERIFICATION FAILED$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
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- --unwind 1 --no-unwinding-assertions
3
+ --no-standard-checks -- unwind 1 --no-unwinding-assertions
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^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
3
-
3
+ --no-standard-checks
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4
^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
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-
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+ --no-standard-checks
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^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
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-
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+ --no-standard-checks
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^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
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-
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+ --no-standard-checks
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^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
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- --mm tso
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+ --no-pointer-check -- mm tso
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^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
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- --all-properties
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+ --no-standard-checks -- all-properties
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^EXIT=10$
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5
^SIGNAL=0$
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^\[main\.assertion\.1\] line 21 assertion i==1: FAILURE$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
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- --unwind 2
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+ --no-standard-checks -- unwind 2
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^EXIT=10$
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5
^SIGNAL=0$
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^VERIFICATION FAILED$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
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-
3
+ --no-standard-checks
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^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
3
-
3
+ --no-standard-checks
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4
^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
3
-
3
+ --no-standard-checks
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4
^EXIT=0$
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^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
3
- --error-label ERROR
3
+ --no-standard-checks -- error-label ERROR
4
4
^EXIT=0$
5
5
^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
3
- --error-label ERROR
3
+ --no-standard-checks -- error-label ERROR
4
4
^EXIT=10$
5
5
^SIGNAL=0$
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^VERIFICATION FAILED$
Original file line number Diff line number Diff line change 1
1
CORE
2
2
main.c
3
- --unwind 2 --no-unwinding-assertions
3
+ --no-standard-checks -- unwind 2 --no-unwinding-assertions
4
4
^EXIT=0$
5
5
^SIGNAL=0$
6
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE
2
2
main.c
3
-
3
+ --no-standard-checks
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4
^EXIT=0$
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5
^SIGNAL=0$
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^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE
2
2
main.c
3
- -D_SANITY_CHECK_
3
+ --no-standard-checks - D_SANITY_CHECK_
4
4
^EXIT=10$
5
5
^SIGNAL=0$
6
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^VERIFICATION FAILED$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
3
-
3
+ --no-standard-checks
4
4
^EXIT=10$
5
5
^SIGNAL=0$
6
6
^VERIFICATION FAILED$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
3
-
3
+ --no-standard-checks
4
4
^EXIT=0$
5
5
^SIGNAL=0$
6
6
^VERIFICATION SUCCESSFUL$
Original file line number Diff line number Diff line change 1
1
CORE pthread
2
2
main.c
3
-
3
+ --no-standard-checks
4
4
^EXIT=0$
5
5
^SIGNAL=0$
6
6
^VERIFICATION SUCCESSFUL$
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