[4/N] Change #include <c10/util/Optional.h> to #include <optional> (pytorch#130329)

Follows pytorch#130300

Pull Request resolved: pytorch#130329
Approved by: https://github.com/ezyang

Author: cyyever

aten/src/ATen/native/Blas.cpp

@@ -71,7 +71,7 @@ TORCH_IMPL_FUNC(addmv_out_cpu)(const Tensor &self, const Tensor &mat, const Tens
           const_cast<Tensor&>(result),
           self,
           at::native::scalar_tensor(
-              beta_, self.scalar_type(), c10::nullopt /* layout */, at::kCPU, c10::nullopt /* pin_memory */));
+              beta_, self.scalar_type(), std::nullopt /* layout */, at::kCPU, std::nullopt /* pin_memory */));
     }
   } else {
     if (!result.is_same(*self_) && betaval != 0.0) { //if beta is 0, result contents is ignored

aten/src/ATen/native/CPUFallback.cpp

@@ -63,7 +63,7 @@ static std::optional<c10::Device> compute_target_device(std::vector<at::Tensor>&
       }
     }
   }
-  return c10::nullopt;
+  return std::nullopt;
 }
 
 static bool validate_tensor_list(const c10::List<at::Tensor>& tensorlist) {
@@ -89,7 +89,7 @@ void cpu_fallback(const c10::OperatorHandle& op, torch::jit::Stack* stack, bool
   std::vector<c10::List<at::Tensor>> tensorlist_args;
   std::vector<int> tensorlist_args_indices;
 
-  std::optional<c10::Device> tgt_device = c10::nullopt;
+  std::optional<c10::Device> tgt_device = std::nullopt;
   // save converted cpu tensor for TensorList
   std::vector<c10::IValue> tensorlist_cpu_args;
 
@@ -188,7 +188,7 @@ void cpu_fallback(const c10::OperatorHandle& op, torch::jit::Stack* stack, bool
   auto returns = torch::jit::last(stack, num_returns);
   const auto returns_begin = stack->size() - num_returns;
 
-  if (tgt_device == c10::nullopt) {
+  if (tgt_device == std::nullopt) {
     tgt_device = compute_target_device(tensor_args, tensorlist_args);
   }
 

aten/src/ATen/native/Constraints.cpp

@@ -6,7 +6,7 @@
 #include <c10/core/MemoryFormat.h>
 #include <c10/core/Scalar.h>
 #include <c10/core/ScalarType.h>
-#include <c10/util/Optional.h>
+#include <optional>
 
 #ifndef AT_PER_OPERATOR_HEADERS
 #include <ATen/Functions.h>

aten/src/ATen/native/Convolution.cpp

@@ -1504,7 +1504,7 @@ at::Tensor _convolution(
   }
 
   // Select appropriate backend to use.
-  auto bias_sizes_opt = bias.defined() ? std::optional<IntArrayRef>(bias.sizes()) : c10::nullopt;
+  auto bias_sizes_opt = bias.defined() ? std::optional<IntArrayRef>(bias.sizes()) : std::nullopt;
   bool need_backward = GradMode::is_enabled() &&
       (input.requires_grad() || weight.requires_grad() || (bias.defined() && bias.requires_grad()));
   ConvBackend backend = _select_conv_backend(input, weight, bias, c10::OptionalIntArrayRef(bias_sizes_opt), need_backward, params);

aten/src/ATen/native/DistributionTemplates.h

@@ -10,9 +10,9 @@
 #include <ATen/NamedTensorUtils.h>
 #include <ATen/native/Resize.h>
 #include <ATen/native/TensorIterator.h>
-#include <c10/util/Optional.h>
-#include <limits>
 #include <cmath>
+#include <limits>
+#include <optional>
 
 #ifndef AT_PER_OPERATOR_HEADERS
 #include <ATen/Functions.h>

aten/src/ATen/native/Distributions.cpp

@@ -4,7 +4,7 @@
 #include <ATen/TensorIterator.h>
 #include <ATen/TensorOperators.h>
 #include <c10/util/Exception.h>
-#include <c10/util/Optional.h>
+#include <optional>
 
 #include <ATen/CPUGeneratorImpl.h>
 #include <ATen/core/DistributionsHelper.h>

aten/src/ATen/native/EmbeddingBag.h

@@ -129,7 +129,7 @@ void _embedding_bag_cpu_impl_out(Tensor& output, Tensor& offset2bag,
     Tensor& bag_size, Tensor* max_indices,
     const Tensor &weight, const Tensor &indices,
     const Tensor &offsets, const int64_t mode = 0,
-    const std::optional<Tensor>& per_sample_weights = c10::nullopt,
+    const std::optional<Tensor>& per_sample_weights = std::nullopt,
     bool include_last_offset = false,
     int64_t padding_idx = -1,
     _EmbeddingBagKernelCache* fbgemm_kernel_cache = nullptr);

aten/src/ATen/native/ForeachOpsKernels.cpp

@@ -441,7 +441,7 @@ void foreach_tensor_zero_slow_(TensorList tensors) {
 std::vector<Tensor> foreach_tensor_norm_slow(
     TensorList tensors,
     const Scalar& ord,
-    c10::optional<ScalarType> dtype) {
+    std::optional<ScalarType> dtype) {
   check_foreach_api_restrictions(tensors);
   std::vector<Tensor> result;
   for (const auto& t : tensors) {

aten/src/ATen/native/LinearAlgebra.cpp

@@ -708,7 +708,7 @@ Tensor& linalg_matrix_power_out(const Tensor& self, int64_t n, Tensor& result) {
 }
 
 Tensor linalg_matrix_power(const Tensor& self, int64_t n) {
-  return linalg_matrix_power_impl(self, n, c10::nullopt);
+  return linalg_matrix_power_impl(self, n, std::nullopt);
 }
 
 Tensor& matrix_power_out(const Tensor& self, int64_t n, Tensor& result) {
@@ -1092,7 +1092,7 @@ Tensor multi_dot_impl(TensorList _tensors, std::optional<Tensor> _out) {
 } // namespace
 
 Tensor linalg_multi_dot(TensorList tensors) {
-  return multi_dot_impl(tensors, c10::nullopt);
+  return multi_dot_impl(tensors, std::nullopt);
 }
 
 Tensor& linalg_multi_dot_out(TensorList tensors, Tensor& result) {

aten/src/ATen/native/LinearAlgebra.h

@@ -1,7 +1,6 @@
 #pragma once
 
 #include <ATen/native/DispatchStub.h>
-#include <c10/util/Optional.h>
 
 namespace c10 {
 class Scalar;

aten/src/ATen/native/LinearAlgebraUtils.h

@@ -93,7 +93,7 @@ inline c10::MaybeOwned<Tensor> borrow_else_clone(const bool cond, const Tensor&
  *  broadcasted shape.
  */
 inline Tensor copyBatchedColumnMajor(const Tensor& src, int64_t nrows = -1,
-    at::OptionalIntArrayRef desired_batch_sizes = c10::nullopt) {
+    at::OptionalIntArrayRef desired_batch_sizes = std::nullopt) {
   nrows = (nrows == -1) ? src.size(-2) : nrows;
   auto copy_sizes = desired_batch_sizes.has_value()
     ? desired_batch_sizes.value().vec()

aten/src/ATen/native/NonSymbolicBC.h

@@ -9,7 +9,7 @@ namespace at::native {
 // In those cases, we will duplicate the signature here with non-symbolic ints, and also duplicate the C++ implementation.
 TORCH_API at::Tensor reshape(const at::Tensor& self, at::IntArrayRef proposed_shape);
 TORCH_API at::Tensor narrow(const at::Tensor& self, int64_t dim, int64_t start, int64_t length);
-TORCH_API at::Tensor _sparse_coo_tensor_unsafe(const at::Tensor & indices, const at::Tensor & values, at::IntArrayRef size, std::optional<at::ScalarType> dtype=c10::nullopt, std::optional<at::Layout> layout=c10::nullopt, std::optional<at::Device> device=c10::nullopt, std::optional<bool> pin_memory=c10::nullopt, std::optional<bool> is_coalesced=c10::nullopt);
+TORCH_API at::Tensor _sparse_coo_tensor_unsafe(const at::Tensor & indices, const at::Tensor & values, at::IntArrayRef size, std::optional<at::ScalarType> dtype=std::nullopt, std::optional<at::Layout> layout=std::nullopt, std::optional<at::Device> device=std::nullopt, std::optional<bool> pin_memory=std::nullopt, std::optional<bool> is_coalesced=std::nullopt);
 TORCH_API at::Tensor nll_loss(const at::Tensor & self, const at::Tensor & target, const std::optional<at::Tensor>& weight_opt, int64_t reduction, int64_t ignore_index);
 TORCH_API at::Tensor nll_loss2d(const at::Tensor & self, const at::Tensor & target, const std::optional<at::Tensor>& weight_opt, int64_t reduction, int64_t ignore_index);
 // The below ops don't get a duplicated C++ implementation.

aten/src/ATen/native/PadNd.cpp

@@ -86,7 +86,7 @@ Tensor constant_pad_nd(const Tensor& self, IntArrayRef pad, const Scalar& value)
                     "Only per-tensor padding is supported.");
         output = at::_empty_affine_quantized(
             new_shape, self.options().memory_format(memory_format),
-            self.q_scale(), self.q_zero_point(), c10::nullopt);
+            self.q_scale(), self.q_zero_point(), std::nullopt);
     } else {
         output = at::empty(new_shape, self.options().memory_format(memory_format));
     }

aten/src/ATen/native/QuantizedLinear.cpp

@@ -404,7 +404,7 @@ Tensor fbgemm_pack_gemm_matrix_fp16(const Tensor& weight) {
   auto ptr = std::make_unique<fbgemm::PackedGemmMatrixFP16>(
       fbgemm::matrix_op_t::Transpose, K, N, 1, weight_contig_ptr);
   c10::intrusive_ptr<LinearPackedParamsBase> packed_weight =
-      c10::make_intrusive<PackedLinearWeightFp16>(std::move(ptr), c10::nullopt);
+      c10::make_intrusive<PackedLinearWeightFp16>(std::move(ptr), std::nullopt);
   auto unique_ptr_wrapper =
       std::make_unique<decltype(packed_weight)>(std::move(packed_weight));
   return cpp_custom_type_hack::create(

aten/src/ATen/native/README.md

@@ -42,7 +42,7 @@ signature.
 - `Tensor`.  A `Tensor` argument translates into a C++ argument of type `const Tensor&`
   (except when the argument is "inplace"; in this case, it is simply `Tensor&`).
   A trailing `?`, as in `Tensor?`, indicates that the tensor argument is optional
-  and may be omitted by passing c10::nullopt.  When a function takes multiple
+  and may be omitted by passing std::nullopt.  When a function takes multiple
   `Tensor` arguments, these tensors are assumed to be the same type (e.g.,
   if one argument is a `FloatTensor`, all other arguments are checked
   to be `FloatTensor`s).

aten/src/ATen/native/ReduceOps.h

@@ -2,7 +2,7 @@
 
 #include <ATen/native/DispatchStub.h>
 #include <c10/util/ArrayRef.h>
-#include <c10/util/Optional.h>
+#include <optional>
 
 namespace c10 {
 class Scalar;

aten/src/ATen/native/ReduceOpsUtils.h

@@ -84,7 +84,7 @@ inline std::optional<Tensor> _allreduce_return_trivial(
   if (self.numel() == 0) {
     return at::scalar_tensor(ident, self.options());
   }
-  return c10::nullopt;
+  return std::nullopt;
 }
 
 #define OPTION_TYPE_EQUALITY_CHECK(option, out, self) \

aten/src/ATen/native/Resize.cpp

@@ -239,7 +239,7 @@ const Tensor& _resize_(
   auto* self_ = self.unsafeGetTensorImpl();
   int64_t old_storage_nbytes = self_->unsafe_storage() ? self_->unsafe_storage().sym_nbytes().maybe_as_int().value_or(-1) : 0;
   // NOLINTNEXTLINE(bugprone-argument-comment)
-  _resize_impl_<T>(self_, size, /*strides=*/c10::nullopt, true);
+  _resize_impl_<T>(self_, size, /*strides=*/std::nullopt, true);
   if (optional_memory_format.has_value()) {
     auto memory_format =
         optional_memory_format.value();

aten/src/ATen/native/Resize.h

@@ -167,7 +167,7 @@ inline void setStrided(
 
   /* storage offset */
   TORCH_CHECK(storage_offset >= 0, "Tensor: invalid storage offset ", storage_offset);
-  self_->set_sizes_and_strides(size, stride, c10::make_optional(storage_offset));
+  self_->set_sizes_and_strides(size, stride, std::make_optional(storage_offset));
 }
 
 } // namespace at::native

aten/src/ATen/native/ScatterGatherChecks.h

@@ -15,7 +15,7 @@ static void scatter_gather_dtype_check(
   const std::string& method_name,
   const Tensor& self,
   const Tensor& index,
-  const std::optional<Tensor>& src_opt = c10::nullopt
+  const std::optional<Tensor>& src_opt = std::nullopt
 ) {
   if (index.numel() != 0) {
     TORCH_CHECK(
@@ -66,7 +66,7 @@ static C10_UNUSED void gather_shape_check(const Tensor& self, int64_t dim,
 //  3. index.dim() == self.dim() == src.dim()
 static C10_UNUSED void scatter_shape_check(
   const Tensor& self, int64_t dim, const Tensor& index,
-  const std::optional<Tensor>& src_opt = c10::nullopt
+  const std::optional<Tensor>& src_opt = std::nullopt
 ) {
   if (index.numel() == 0) return;
   TORCH_CHECK(

aten/src/ATen/native/SegmentReduce.h

@@ -3,7 +3,7 @@
 #include <ATen/native/DispatchStub.h>
 #include <ATen/native/ReductionType.h>
 #include <c10/core/Scalar.h>
-#include <c10/util/Optional.h>
+#include <optional>
 
 namespace at {
 class Tensor;

aten/src/ATen/native/TensorConversions.h

@@ -4,7 +4,7 @@
 #include <c10/core/Layout.h>
 #include <c10/core/MemoryFormat.h>
 #include <c10/core/ScalarType.h>
-#include <c10/util/Optional.h>
+#include <optional>
 
 namespace at {
   class Tensor;

aten/src/ATen/native/UpSample.h

@@ -59,7 +59,7 @@ TORCH_API c10::SmallVector<int64_t, 3> compute_output_size(
 
 inline std::optional<double> get_scale_value(std::optional<c10::ArrayRef<double>> scales, int idx) {
   if (!scales) {
-    return c10::nullopt;
+    return std::nullopt;
   }
   return scales->at(idx);
 }

aten/src/ATen/native/cpu/MaxUnpoolKernel.cpp

@@ -7,7 +7,7 @@
 #include <ATen/native/cpu/utils.h>
 #include <c10/util/irange.h>
 
-#include <c10/util/Optional.h>
+#include <optional>
 
 namespace at::native {
 

aten/src/ATen/native/cpu/ReduceOpsKernel.cpp

@@ -20,7 +20,6 @@
 #include <ATen/ops/imag.h>
 #endif
 
-#include <c10/util/Optional.h>
 #include <c10/util/irange.h>
 #include <ATen/AccumulateType.h>
 

aten/src/ATen/native/cpu/SoftMaxKernel.cpp

@@ -13,7 +13,6 @@
 #include <ATen/core/Tensor.h>
 #include <ATen/cpu/vec/functional.h>
 #include <ATen/cpu/vec/vec.h>
-#include <c10/util/Optional.h>
 #include <c10/util/irange.h>
 #include <ATen/OpMathType.h>
 

aten/src/ATen/native/cpu/TensorCompareKernel.cpp

@@ -15,7 +15,6 @@
 #include <ATen/NumericUtils.h>
 #include <ATen/TensorIterator.h>
 #include <ATen/WrapDimUtils.h>
-#include <c10/util/Optional.h>
 #include <c10/util/irange.h>
 #include <ATen/native/ReduceOpsUtils.h>
 #include <ATen/native/Resize.h>

aten/src/ATen/native/cuda/Blas.cpp

@@ -331,9 +331,9 @@ Tensor& addmm_out_cuda_impl(Tensor& result, const Tensor& self, const Tensor& ma
         at::native::scalar_tensor(
             beta,
             self.scalar_type(),
-            c10::nullopt /* layout */,
+            std::nullopt /* layout */,
             at::kCPU,
-            c10::nullopt /* pin_memory */));
+            std::nullopt /* pin_memory */));
   }
 
   TORCH_INTERNAL_ASSERT_DEBUG_ONLY(!args.result->is_conj());
@@ -716,7 +716,7 @@ TORCH_IMPL_FUNC(addmv_out_cuda)(const Tensor &self, const Tensor &mat, const Ten
           const_cast<Tensor&>(result),
           self,
           at::native::scalar_tensor(
-              beta_, self.scalar_type(), c10::nullopt /* layout */, at::kCPU, c10::nullopt /* pin_memory */));
+              beta_, self.scalar_type(), std::nullopt /* layout */, at::kCPU, std::nullopt /* pin_memory */));
     }
   } else {
     if (!result.is_same(*self_) && betaval != 0.0) { //if beta is 0, result contents will be zeroed later

aten/src/ATen/native/cuda/CUDAScalar.cu

@@ -22,10 +22,10 @@ Scalar _local_scalar_dense_cuda(const Tensor& self) {
         auto value = at::detail::empty_cpu(
           {1}, /* size */
           c10::CppTypeToScalarType<scalar_t>(), /* dtype */
-          c10::nullopt, /* layout */
-          c10::nullopt, /* device */
+          std::nullopt, /* layout */
+          std::nullopt, /* device */
           true, /* pin_memory */
-          c10::nullopt /* memory format */
+          std::nullopt /* memory format */
         );
         cudaStream_t stream = at::cuda::getCurrentCUDAStream();
         at::cuda::memcpy_and_sync((void *)value.const_data_ptr<scalar_t>(), self.const_data_ptr<scalar_t>(), sizeof(scalar_t), cudaMemcpyDeviceToHost, stream);

aten/src/ATen/native/cuda/Dropout.cu

@@ -380,7 +380,7 @@ native_dropout_cuda(const Tensor& self, double p, std::optional<bool> train){
     return std::tuple<Tensor,Tensor>(ret, mask);
   }
 
-  auto gen = get_generator_or_default<CUDAGeneratorImpl>(c10::nullopt, cuda::detail::getDefaultCUDAGenerator());
+  auto gen = get_generator_or_default<CUDAGeneratorImpl>(std::nullopt, cuda::detail::getDefaultCUDAGenerator());
   double p1m = 1. - p;
   return dropout_cuda<bool>(gen, self, p1m);
 }

aten/src/ATen/native/cuda/ForeachReduceOp.cu

@@ -393,7 +393,7 @@ inline void check_foreach_norm_dtype(
 std::vector<Tensor> foreach_tensor_norm_cuda(
     TensorList tensors,
     const Scalar& ord,
-    c10::optional<ScalarType> dtype) {
+    std::optional<ScalarType> dtype) {
   const auto p = [&]() -> double {
     if (ord.isIntegral(false)) {
       return ord.to<int64_t>();

aten/src/ATen/native/cuda/FusedAdamKernel.cu

@@ -111,12 +111,12 @@ void _fused_adam_kernel_cuda_(
   // Manually check devices since we specify no device check in
   // native_functions.yaml
   Device param_device = params[0].device();
-  if (grad_scale != c10::nullopt) {
+  if (grad_scale != std::nullopt) {
     TORCH_CHECK(
         grad_scale->device() == param_device,
         "grad_scale must be on the same GPU device as the params");
   }
-  if (found_inf != c10::nullopt) {
+  if (found_inf != std::nullopt) {
     TORCH_CHECK(
         found_inf->device() == param_device,
         "found_inf must be on the same GPU device as the params");

aten/src/ATen/native/cuda/FusedAdamWKernel.cu

@@ -112,12 +112,12 @@ void _fused_adamw_kernel_cuda_(
   // Manually check devices since we specify no device check in
   // native_functions.yaml
   Device param_device = params[0].device();
-  if (grad_scale != c10::nullopt) {
+  if (grad_scale != std::nullopt) {
     TORCH_CHECK(
         grad_scale->device() == param_device,
         "grad_scale must be on the same GPU device as the params");
   }
-  if (found_inf != c10::nullopt) {
+  if (found_inf != std::nullopt) {
     TORCH_CHECK(
         found_inf->device() == param_device,
         "found_inf must be on the same GPU device as the params");

aten/src/ATen/native/cuda/FusedSgdKernel.cu

@@ -220,12 +220,12 @@ void _fused_sgd_with_momentum_kernel_cuda_(
   TORCH_CHECK_GT(momentum, 0);
   TORCH_CHECK(at::native::check_fast_path_restrictions(
       {params, grads, momentum_buffer_list}));
-  if (grad_scale != c10::nullopt) {
+  if (grad_scale != std::nullopt) {
     TORCH_CHECK(
         grad_scale->device() == params[0].device(),
         "grad_scale must be on the same GPU device as the params");
   }
-  if (found_inf != c10::nullopt) {
+  if (found_inf != std::nullopt) {
     TORCH_CHECK(
         found_inf->device() == params[0].device(),
         "found_inf must be on the same GPU device as the params");

aten/src/ATen/native/cuda/Normalization.cuh

@@ -1470,7 +1470,7 @@ void batch_norm_elemt_channels_last_cuda_template(
     const at::Tensor& shift,  // bias of BN
     const at::Tensor& mean,
     const at::Tensor& inv_std,
-    const std::optional<at::Tensor>& z = c10::nullopt,  // bias after BN
+    const std::optional<at::Tensor>& z = std::nullopt,  // bias after BN
     const bool fuse_relu = false) {
   const auto stride = input.sizes()[1];
   const auto reduction_size = input.numel() / stride;

aten/src/ATen/native/cuda/Resize.cpp

@@ -55,7 +55,7 @@ const Tensor& resize_cuda_(
   }
   auto* self_ = self.unsafeGetTensorImpl();
   int64_t old_storage_nbytes = self_->unsafe_storage() ? self_->unsafe_storage().nbytes() : 0;
-  resize_impl_cuda_(self_, size, /*strides=*/c10::nullopt);
+  resize_impl_cuda_(self_, size, /*strides=*/std::nullopt);
   if (optional_memory_format.has_value()) {
     auto memory_format =
         optional_memory_format.value();