diff --git a/runtime/compiler/x/codegen/J9CodeGenerator.cpp b/runtime/compiler/x/codegen/J9CodeGenerator.cpp
index 23c33ef97dd..6a9804b6965 100644
--- a/runtime/compiler/x/codegen/J9CodeGenerator.cpp
+++ b/runtime/compiler/x/codegen/J9CodeGenerator.cpp
@@ -99,9 +99,6 @@ J9::X86::CodeGenerator::initialize()
    cg->setSupportsInliningOfTypeCoersionMethods();
    cg->setSupportsNewInstanceImplOpt();
 
-   TR_ASSERT_FATAL(comp->compileRelocatableCode() || comp->isOutOfProcessCompilation() || comp->compilePortableCode() || comp->target().cpu.supportsFeature(OMR_FEATURE_X86_SSE4_1) == cg->getX86ProcessorInfo().supportsSSE4_1(), "supportsSSE4_1() failed\n");
-   TR_ASSERT_FATAL(comp->compileRelocatableCode() || comp->isOutOfProcessCompilation() || comp->compilePortableCode() || comp->target().cpu.supportsFeature(OMR_FEATURE_X86_SSSE3) == cg->getX86ProcessorInfo().supportsSSSE3(), "supportsSSSE3() failed\n");
-
    if (comp->target().cpu.supportsFeature(OMR_FEATURE_X86_SSE4_1) &&
        !comp->getOption(TR_DisableSIMDStringCaseConv) &&
        !TR::Compiler->om.canGenerateArraylets() && !TR::Compiler->om.isOffHeapAllocationEnabled())
diff --git a/runtime/compiler/x/env/J9CPU.cpp b/runtime/compiler/x/env/J9CPU.cpp
index 40af5779d04..9e8145a25c3 100644
--- a/runtime/compiler/x/env/J9CPU.cpp
+++ b/runtime/compiler/x/env/J9CPU.cpp
@@ -139,6 +139,9 @@ J9::X86::CPU::supportsFeature(uint32_t feature)
    {
    OMRPORT_ACCESS_FROM_OMRPORT(TR::Compiler->omrPortLib);
 
+   if (is_feature_disabled(feature))
+      return false;
+
    static bool disableCPUDetectionTest = feGetEnv("TR_DisableCPUDetectionTest");
    if (!disableCPUDetectionTest)
       {
@@ -146,29 +149,6 @@ J9::X86::CPU::supportsFeature(uint32_t feature)
       TR_ASSERT_FATAL(TRUE == omrsysinfo_processor_has_feature(&_supportedFeatureMasks, feature), "New processor feature usage detected, please add feature %d to _supportedFeatureMasks via TR::CPU::enableFeatureMasks()\n", feature);
       }
 
-   static bool disableAVX512 = feGetEnv("TR_DisableAVX512");
-
-   if (disableAVX512)
-      {
-      switch (feature)
-         {
-         case OMR_FEATURE_X86_AVX512F:
-         case OMR_FEATURE_X86_AVX512VL:
-         case OMR_FEATURE_X86_AVX512BW:
-         case OMR_FEATURE_X86_AVX512DQ:
-         case OMR_FEATURE_X86_AVX512CD:
-         case OMR_FEATURE_X86_AVX512ER:
-         case OMR_FEATURE_X86_AVX512PF:
-         case OMR_FEATURE_X86_AVX512_BITALG:
-         case OMR_FEATURE_X86_AVX512_IFMA:
-         case OMR_FEATURE_X86_AVX512_VBMI:
-         case OMR_FEATURE_X86_AVX512_VBMI2:
-         case OMR_FEATURE_X86_AVX512_VNNI:
-         case OMR_FEATURE_X86_AVX512_VPOPCNTDQ:
-            return false;
-         }
-      }
-
    return TRUE == omrsysinfo_processor_has_feature(&_processorDescription, feature);
    }