diff --git a/README.md b/README.md index fbb848319..9bebac32d 100644 --- a/README.md +++ b/README.md @@ -47,6 +47,7 @@ ARM * [ADLINK IPi-SMARC ARM](../master/docs/adlink_ipi_arm.md) * [Radxa ROCK 5A](../mraa//docs/radxa_rock_5a.md) * [Rock Pi 4](../master/docs/rockpi4.md) +* [Rock Pi S](../master/docs/rockpiS.md) MIPS --- diff --git a/api/mraa/types.h b/api/mraa/types.h index 98c06c188..009459082 100644 --- a/api/mraa/types.h +++ b/api/mraa/types.h @@ -65,13 +65,14 @@ typedef enum { MRAA_ROCKPI4 = 20, /**< Radxa ROCK PI 4 Models A/B/C */ MRAA_ADLINK_IPI = 21, /**< Adlink Industrial PI */ MRAA_ADLINK_LEC_AL = 22, /**< Adlink LEC-AL*/ - MRAA_ADLINK_LEC_AL_AI = 23, /**< Adlink LEC-AL*/ + MRAA_ADLINK_LEC_AL_AI = 23, /**< Adlink LEC-AL*/ MRAA_UPXTREME = 24, /**< The UPXTREME Board */ MRAA_INTEL_ILK = 25, /**< Intel Learning Kit */ MRAA_SIEMENS_IOT2050 = 26, /**< Siemens IOT2050 board */ MRAA_RADXA_ROCK_3C = 27, /**< Radxa ROCK 3 Model C */ MRAA_VISIONFIVE = 28, /**< StarFive VisionFive board */ MRAA_RADXA_ROCK_5A = 29, /**< Radxa ROCK 5 Model A */ + MRAA_ROCKPIS = 30, /**< Radxa ROCK PI S */ // USB platform extenders start at 256 MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */ @@ -279,6 +280,40 @@ typedef enum { MRAA_ROCKPI4_PIN40 = 40 } mraa_rockpi4_wiring_t; +/** + * ROCKPIS GPIO numbering enum + */ +typedef enum { + MRAA_ROCKPIS_PIN3 = 3, + MRAA_ROCKPIS_PIN5 = 5, + MRAA_ROCKPIS_PIN7 = 7, + MRAA_ROCKPIS_PIN8 = 8, + MRAA_ROCKPIS_PIN10 = 10, + MRAA_ROCKPIS_PIN11 = 11, + MRAA_ROCKPIS_PIN12 = 12, + MRAA_ROCKPIS_PIN13 = 13, + MRAA_ROCKPIS_PIN15 = 15, + MRAA_ROCKPIS_PIN16 = 16, + MRAA_ROCKPIS_PIN18 = 18, + MRAA_ROCKPIS_PIN19 = 19, + MRAA_ROCKPIS_PIN21 = 21, + MRAA_ROCKPIS_PIN22 = 22, + MRAA_ROCKPIS_PIN23 = 23, + MRAA_ROCKPIS_PIN24 = 24, + MRAA_ROCKPIS_PIN28 = 28, + MRAA_ROCKPIS_PIN30 = 30, + MRAA_ROCKPIS_PIN32 = 32, + MRAA_ROCKPIS_PIN34 = 34, + MRAA_ROCKPIS_PIN39 = 39, + MRAA_ROCKPIS_PIN40 = 40, + MRAA_ROCKPIS_PIN41 = 41, + MRAA_ROCKPIS_PIN42 = 42, + MRAA_ROCKPIS_PIN43 = 43, + MRAA_ROCKPIS_PIN44 = 44, + MRAA_ROCKPIS_PIN45 = 45, + MRAA_ROCKPIS_PIN46 = 46 +} mraa_rockpis_wiring_t; + /** * Raspberry PI Wiring compatible numbering enum */ diff --git a/api/mraa/types.hpp b/api/mraa/types.hpp index d6629aa4e..f1f18654d 100644 --- a/api/mraa/types.hpp +++ b/api/mraa/types.hpp @@ -61,6 +61,7 @@ typedef enum { MTK_OMEGA2 = 18, /**< MT7688 based Onion Omega2 board */ IEI_TANK = 19, /**< IEI Tank System*/ ROCKPI4 = 20, /**< Radxa ROCK PI 4 Models A/B/C */ + ROCKPIS = 21, /**< Radxa ROCK PI S */ INTEL_UPXTREME = 24, /**< The UPXTREME Board */ SIEMENS_IOT2050 = 26, /**< Siemens IOT2050 board */ RADXA_ROCK_3C = 27, /**< Radxa ROCK 3 Model C */ @@ -270,6 +271,40 @@ typedef enum { ROCKPI4_PIN40 = 40 } RockPi4Wiring; +/** + * ROCKPIS GPIO numbering enum + */ +typedef enum { + ROCKPIS_PIN3 = 3, + ROCKPIS_PIN5 = 5, + ROCKPIS_PIN7 = 7, + ROCKPIS_PIN8 = 8, + ROCKPIS_PIN10 = 10, + ROCKPIS_PIN11 = 11, + ROCKPIS_PIN12 = 12, + ROCKPIS_PIN13 = 13, + ROCKPIS_PIN15 = 15, + ROCKPIS_PIN16 = 16, + ROCKPIS_PIN18 = 18, + ROCKPIS_PIN19 = 19, + ROCKPIS_PIN21 = 21, + ROCKPIS_PIN22 = 22, + ROCKPIS_PIN23 = 23, + ROCKPIS_PIN24 = 24, + ROCKPIS_PIN28 = 28, + ROCKPIS_PIN30 = 30, + ROCKPIS_PIN32 = 32, + ROCKPIS_PIN34 = 34, + ROCKPIS_PIN39 = 39, + ROCKPIS_PIN40 = 40, + ROCKPIS_PIN41 = 41, + ROCKPIS_PIN42 = 42, + ROCKPIS_PIN43 = 43, + ROCKPIS_PIN44 = 44, + ROCKPIS_PIN45 = 45, + ROCKPIS_PIN46 = 46 +} RockPiSWiring; + /** * Raspberry PI Wiring compatible numbering enum */ diff --git a/docs/rockpiS.md b/docs/rockpiS.md new file mode 100644 index 000000000..b9e99fac9 --- /dev/null +++ b/docs/rockpiS.md @@ -0,0 +1,53 @@ +Rock Pi S Single Board Computer {#_rockpi} +============================= + +ROCK Pi S is a Rockchip RK3308 based SBC(Single Board Computer) by Radxa. It equips a 64bits quad core processor, USB, ethernet, wireless connectivity and voice detection engine at the size of 1.7 inch, make it perfect for IoT and voice applications. ROCK Pi S comes in two ram sizes 256MB or 512MB DDR3, and uses uSD card for OS and storage. Optionally, ROCK Pi S can provide on board storage version with 1Gb/2Gb/4Gb/8Gb NAND flash. + +ROCK Pi S board comes with different versions. When you get the board, you need to know the hardware version like 'ROCK PI S V12', which is printed in the top side of the board. + +Board Support +------------- + +- [ROCK Pi S](https://wiki.radxa.com/RockpiS) + +Interface notes +--------------- + +- **UART**: ttyS0, ttyS2, and ttyS4 +- UART0 is enabled as U-boot and Linux serial console by default. Check RockpiS/dev/serial-console to use. Check /Device-tree-overlays to disable serial console on UART0. +- Function marked with color orange is the default function of this pin. +- Except Pins for power supply, all pins are laid out directly to Soc RK3308. +- RK3308 have two IO voltages, 1.8V/3.3V. For ROCK Pi S, the voltage level of GPIOs showed in the tables above are 3.3V and tolerance of those are 3.63V. For hardware V11 and V12, an ADC input is included (ADC_IN0). This ADC has an input voltage range of 0-1.8V. +- The pins, PIN#2 and PIN#4, can supply power of 5V. The maximum current that can output depends on the power adapter. +- The pins, PIN#1 and PIN#17, can supply power of 3.3V. The maximum current that can output is 200mA. + +Pin Mapping +----------- + +ROCK Pi 4 has two 26-pin expansion headers. Each pin is distinguished by color. +The function of each pin depends on the board version. The common functions between boards V11 to V13 on header 1 are shown below. GPIO names vary between board versions (V13 names are used below)), see /RockpiS/hardware/gpio. + +| Additional FunctionS | Primary Function| PIN | PIN | Primary Function | Additional Functions | +|----------------------|------------------|:------|------:|--------------------|----------------------| +| | | +3.3V | 1 | 2 | +5.0V | | | +| | | I2C1_SDA | 3 | 4 | +5.0V | | | +| | | I2C1_SCL | 5 | 6 | GND | | | +| | | GPIO2_A4 | 7 | 8 | UART0_TXD | | | +| | | GND | 9 | 10 | UART0_RXD | | | +| | | PWM2 | 11 | 12 | GPIO2_A5 | | | +| | | PWM3 | 13 | 14 | GND | | | +| | | GPIO0_C1 | 15 | 16 | GPIO2_B2 | | | +| | | +3.3V | 17 | 18 | GPIO2_B1 | | | +| | UART2_TXD | SPI2_TXD | 19 | 20 | GND | | | +| | UART2_RXD | SPI2_RXD | 21 | 22 | GPIO2_A7 | | | +| I2C0_SDA | UART1_RXD | SPI2_CLK | 23 | 24 | SPI2_CSn | UART1_TXD | I2C0_SCL | +| | | GND | 25 | 26 | ADC_IN0 | | | + +Resources +--------- + +The following links will take you to additional Rock Pi S resources + +- [Armbian for Rock Pi S](https://www.armbian.com/rockpi-s/) +- [Forums](https://forum.radxa.com/c/rockpiS) +- [Github Repo](https://github.com/radxa) diff --git a/include/arm/rockpi.h b/include/arm/rockpi.h new file mode 100644 index 000000000..a8278bd2d --- /dev/null +++ b/include/arm/rockpi.h @@ -0,0 +1,51 @@ +/* + * Author: Brian + * Author: Paul + * Copyright (c) 2019 Vamrs Corporation. + * + * SPDX-License-Identifier: MIT + */ + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#include "mraa_internal.h" + +/* + * Currently 2 product versions are supported: Rock Pi 4 and Rock Pi S + */ +#define ROCKPI_NUM_SUPPORTED_HW 2 + +/* + * Defines for Rock Pi 4 boards. + */ +#define MRAA_ROCKPI4_INDEX 0 +#define MRAA_ROCKPI4_I2C_COUNT 3 +#define MRAA_ROCKPI4_SPI_COUNT 2 +#define MRAA_ROCKPI4_UART_COUNT 2 +#define MRAA_ROCKPI4_PWM_COUNT 2 +#define MRAA_ROCKPI4_AIO_COUNT 1 +#define MRAA_ROCKPI4_PIN_COUNT 40 + +/* + * Defines for Rock Pi S boards (V11, V12, 13) + * Since there hardware board versions cannot be distinguished + * programatically,the lowest counts are be used. + */ +#define MRAA_ROCKPIS_INDEX 1 +#define MRAA_ROCKPIS_I2C_COUNT 3 +#define MRAA_ROCKPIS_SPI_COUNT 1 +#define MRAA_ROCKPIS_UART_COUNT 2 +#define MRAA_ROCKPIS_PWM_COUNT 2 +#define MRAA_ROCKPIS_AIO_COUNT 1 +#define MRAA_ROCKPIS_PIN_COUNT 52 + +mraa_board_t * + mraa_rockpi(); + +#ifdef __cplusplus +} +#endif diff --git a/include/arm/rockpi4.h b/include/arm/rockpi4.h deleted file mode 100644 index 693941c06..000000000 --- a/include/arm/rockpi4.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Author: Brian - * Copyright (c) 2019 Vamrs Corporation. - * - * SPDX-License-Identifier: MIT - */ - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -#include "mraa_internal.h" - -#define MRAA_ROCKPI4_GPIO_COUNT 27 -#define MRAA_ROCKPI4_I2C_COUNT 3 -#define MRAA_ROCKPI4_SPI_COUNT 2 -#define MRAA_ROCKPI4_UART_COUNT 2 -#define MRAA_ROCKPI4_PWM_COUNT 2 -#define MRAA_ROCKPI4_AIO_COUNT 1 -#define MRAA_ROCKPI4_PIN_COUNT 40 - -mraa_board_t * - mraa_rockpi4(); - -#ifdef __cplusplus -} -#endif diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index fb308a0ce..a8e70b0fe 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -110,6 +110,7 @@ set (mraa_LIB_ARM_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_3c.c ${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_5a.c ${PROJECT_SOURCE_DIR}/src/arm/rockpi4.c + ${PROJECT_SOURCE_DIR}/src/arm/rockpi.c ${PROJECT_SOURCE_DIR}/src/arm/adlink_ipi.c ${PROJECT_SOURCE_DIR}/src/arm/siemens/iot2050.c ${PROJECT_SOURCE_DIR}/src/arm/siemens/platform.c diff --git a/src/arm/arm.c b/src/arm/arm.c index 5c271a34d..34600dcc6 100644 --- a/src/arm/arm.c +++ b/src/arm/arm.c @@ -10,9 +10,9 @@ #include #include "arm/96boards.h" +#include "arm/rockpi.h" #include "arm/radxa_rock_3c.h" #include "arm/radxa_rock_5a.h" -#include "arm/rockpi4.h" #include "arm/de_nano_soc.h" #include "arm/banana.h" #include "arm/beaglebone.h" @@ -102,6 +102,8 @@ mraa_arm_platform() mraa_file_contains("/proc/device-tree/model", "ROCK 4") ) platform_type = MRAA_ROCKPI4; + else if (mraa_file_contains("/proc/device-tree/model", "ROCK Pi S")) + platform_type = MRAA_ROCKPIS; else if (mraa_file_contains("/proc/device-tree/compatible", "raspberrypi,")) platform_type = MRAA_RASPBERRY_PI; else if (mraa_file_contains("/proc/device-tree/model", "ADLINK ARM, LEC-PX30")) @@ -133,7 +135,10 @@ mraa_arm_platform() plat = mraa_radxa_rock_5a(); break; case MRAA_ROCKPI4: - plat = mraa_rockpi4(); + plat = mraa_rockpi(); + break; + case MRAA_ROCKPIS: + plat = mraa_rockpi(); break; case MRAA_DE_NANO_SOC: plat = mraa_de_nano_soc(); diff --git a/src/arm/rockpi.c b/src/arm/rockpi.c new file mode 100644 index 000000000..2e9393aa5 --- /dev/null +++ b/src/arm/rockpi.c @@ -0,0 +1,298 @@ +/* + * Author: Brian + * Author: Paul + * Copyright (c) 2019 Vamrs Corporation. + * + * SPDX-License-Identifier: MIT + */ + +#include +#include +#include +#include +#include + +#include "arm/rockpi.h" +#include "common.h" + +#define DT_BASE "/proc/device-tree" + +/* +* "Radxa ROCK Pi 4" is the model name on stock 5.x kernels +* "ROCK PI 4A", "ROCK PI 4B" and "ROCK PI 4C" is used on Radxa 4.4 kernel +* so we search for the string below by ignoring case +*/ +#define PLATFORM_NAME_ROCK_PI4 "ROCK Pi 4" +#define PLATFORM_NAME_ROCK_PI4_2 "ROCK PI 4" +#define PLATFORM_NAME_ROCK_PI4_3 "ROCK 4" + +#define PLATFORM_NAME_ROCK_PIS "ROCK Pi S" + +#define MAX_SIZE 64 +#define MAX_PERIPH 4 + +typedef struct +{ + int serialdev_index[MAX_PERIPH]; + int i2cbus_index[MAX_PERIPH]; + int spibus_index[MAX_PERIPH]; + int pwmdev_index[MAX_PERIPH]; +} PeripheralIndex; + +PeripheralIndex rockpi_index[ROCKPI_NUM_SUPPORTED_HW] = { + // Peripheral indices for Rock Pi 4 + { + .serialdev_index = { 2, 4 }, + .i2cbus_index = { 7, 2, 6 }, + .spibus_index = { 1, 2 }, + .pwmdev_index = { 0, 1 } + }, + + // Peripheral indices for Rock Pi S + { + .serialdev_index = { 0, 1, 2 }, + .i2cbus_index = { 1, 0, 3 }, + .spibus_index = { 2 }, + .pwmdev_index = { 2, 3 } + } +}; + +void +mraa_rockpi_pininfo(mraa_board_t* board, int index, int sysfs_pin, mraa_pincapabilities_t pincapabilities_t, char* fmt, ...) +{ + va_list arg_ptr; + if (index > board->phy_pin_count) + return; + + mraa_pininfo_t* pininfo = &board->pins[index]; + va_start(arg_ptr, fmt); + vsnprintf(pininfo->name, MRAA_PIN_NAME_SIZE, fmt, arg_ptr); + + if( pincapabilities_t.gpio == 1 ) { + pininfo->gpio.gpio_chip = sysfs_pin / 32; + pininfo->gpio.gpio_line = sysfs_pin % 32; + } + + pininfo->capabilities = pincapabilities_t; + + va_end(arg_ptr); + pininfo->gpio.pinmap = sysfs_pin; + pininfo->gpio.mux_total = 0; +} + +void +rockpi4_pins(mraa_board_t* b) +{ + mraa_rockpi_pininfo(b, 0, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID"); + mraa_rockpi_pininfo(b, 1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3"); + mraa_rockpi_pininfo(b, 2, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V"); + mraa_rockpi_pininfo(b, 3, 71, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SDA7"); + mraa_rockpi_pininfo(b, 4, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V"); + mraa_rockpi_pininfo(b, 5, 72, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SCL7"); + mraa_rockpi_pininfo(b, 6, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 7, 75, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI2_CLK"); + mraa_rockpi_pininfo(b, 8, 148, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "TXD2"); + mraa_rockpi_pininfo(b, 9, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 10, 147, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "RXD2"); + mraa_rockpi_pininfo(b, 11, 146, (mraa_pincapabilities_t){1,1,1,0,0,0,0,0}, "PWM0"); + mraa_rockpi_pininfo(b, 12, 131, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A3"); + mraa_rockpi_pininfo(b, 13, 150, (mraa_pincapabilities_t){1,1,1,0,0,0,0,0}, "PWM1"); + mraa_rockpi_pininfo(b, 14, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 15, 149, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_C5"); + mraa_rockpi_pininfo(b, 16, 154, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D2"); + mraa_rockpi_pininfo(b, 17, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3"); + mraa_rockpi_pininfo(b, 18, 156, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D4"); + mraa_rockpi_pininfo(b, 19, 40, (mraa_pincapabilities_t){1,1,0,0,1,0,0,1}, "SPI1TX,TXD4"); + mraa_rockpi_pininfo(b, 20, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 21, 39, (mraa_pincapabilities_t){1,1,0,0,1,0,0,1}, "SPI1RX,RXD4"); + mraa_rockpi_pininfo(b, 22, 157, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D5"); + mraa_rockpi_pininfo(b, 23, 41, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI1CLK"); + mraa_rockpi_pininfo(b, 24, 42, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI1CS"); + mraa_rockpi_pininfo(b, 25, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 26, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,1,0}, "ADC_IN0"); + mraa_rockpi_pininfo(b, 27, 64, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SDA2"); + mraa_rockpi_pininfo(b, 28, 65, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SCL2"); + mraa_rockpi_pininfo(b, 29, 74, (mraa_pincapabilities_t){1,1,0,0,1,1,0,0}, "SCL6,SPI2RX"); + mraa_rockpi_pininfo(b, 30, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 31, 73, (mraa_pincapabilities_t){1,1,0,0,1,1,0,0}, "SDA6,SPI2TX"); + mraa_rockpi_pininfo(b, 32, 112, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO3_C0"); + mraa_rockpi_pininfo(b, 33, 76, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI2CS"); + mraa_rockpi_pininfo(b, 34, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 35, 133, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A5"); + mraa_rockpi_pininfo(b, 36, 132, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A4"); + mraa_rockpi_pininfo(b, 37, 158, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D6"); + mraa_rockpi_pininfo(b, 38, 134, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A6"); + mraa_rockpi_pininfo(b, 39, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 40, 135, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A7"); +} + +void +rockpiS_pins(mraa_board_t* b) +{ + // GPIO pin names correspond to boards V12 and V13 + mraa_rockpi_pininfo(b, 0, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID"); + mraa_rockpi_pininfo(b, 1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3"); + mraa_rockpi_pininfo(b, 2, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V"); + mraa_rockpi_pininfo(b, 3, 11, (mraa_pincapabilities_t){1,0,0,0,0,1,0,0}, "SDA1"); + mraa_rockpi_pininfo(b, 4, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V"); + mraa_rockpi_pininfo(b, 5, 12, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SCL1"); + mraa_rockpi_pininfo(b, 6, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 7, 68, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_A4"); + mraa_rockpi_pininfo(b, 8, 65, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "TXD0"); + mraa_rockpi_pininfo(b, 9, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 10, 64, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "RXD0"); + mraa_rockpi_pininfo(b, 11, 15, (mraa_pincapabilities_t){1,1,1,0,0,1,0,0}, "PWM2"); + mraa_rockpi_pininfo(b, 12, 69, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_A5"); + mraa_rockpi_pininfo(b, 13, 16, (mraa_pincapabilities_t){1,1,1,0,0,1,0,0}, "PWM3"); + mraa_rockpi_pininfo(b, 14, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 15, 17, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO0_C1"); + mraa_rockpi_pininfo(b, 16, 74, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_B2"); + mraa_rockpi_pininfo(b, 17, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3"); + mraa_rockpi_pininfo(b, 18, 73, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_B1"); + mraa_rockpi_pininfo(b, 19, 55, (mraa_pincapabilities_t){1,1,0,0,1,0,0,1}, "SPI2TX,TXD2"); + mraa_rockpi_pininfo(b, 20, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 21, 54, (mraa_pincapabilities_t){1,1,0,0,1,0,0,1}, "SPI2RX,RXD2"); + mraa_rockpi_pininfo(b, 22, 71, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_A7"); + mraa_rockpi_pininfo(b, 23, 56, (mraa_pincapabilities_t){1,1,0,0,1,1,0,1}, "CK2,SDA0,RX1"); + mraa_rockpi_pininfo(b, 24, 57, (mraa_pincapabilities_t){1,1,0,0,1,1,0,1}, "CS2,SCL0,TX1"); + mraa_rockpi_pininfo(b, 25, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 26, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,1,0}, "ADC_IN0"); + + // Only use GPIO pins that are valid for all board versions: V11 to V13 + mraa_rockpi_pininfo(b, 27, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); + mraa_rockpi_pininfo(b, 28, 77, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_B5"); + mraa_rockpi_pininfo(b, 29, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "ADC_KEY_IN1"); + mraa_rockpi_pininfo(b, 30, 78, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_B6"); + mraa_rockpi_pininfo(b, 31, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MICBIAS2"); + mraa_rockpi_pininfo(b, 32, 79, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_B7"); + mraa_rockpi_pininfo(b, 33, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MICBIAS1"); + mraa_rockpi_pininfo(b, 34, 80, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_C0"); + mraa_rockpi_pininfo(b, 35, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MICN8"); + mraa_rockpi_pininfo(b, 36, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MCIP8"); + mraa_rockpi_pininfo(b, 37, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MICN7"); + mraa_rockpi_pininfo(b, 38, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MCIP7"); + mraa_rockpi_pininfo(b, 39, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MICN6"); + mraa_rockpi_pininfo(b, 40, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MCIP6"); + mraa_rockpi_pininfo(b, 41, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MICN5"); + mraa_rockpi_pininfo(b, 42, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MCIP5"); + mraa_rockpi_pininfo(b, 43, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MICN4"); + mraa_rockpi_pininfo(b, 44, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MCIP4"); + mraa_rockpi_pininfo(b, 45, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MICN3"); + mraa_rockpi_pininfo(b, 46, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MCIP3"); + mraa_rockpi_pininfo(b, 47, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MICN2"); + mraa_rockpi_pininfo(b, 48, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MCIP2"); + mraa_rockpi_pininfo(b, 49, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MICN1"); + mraa_rockpi_pininfo(b, 50, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "MCIP1"); + mraa_rockpi_pininfo(b, 51, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "LINEOUT_R"); + mraa_rockpi_pininfo(b, 52, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "LINEOUT_L"); +} + +mraa_board_t* +mraa_rockpi() +{ + int i, model_index; + char *serialdev_path; + mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t)); + if (b == NULL) { + return NULL; + } + + b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t)); + if (b->adv_func == NULL) { + free(b); + return NULL; + } + + // pin mux for buses are setup by default by kernel so tell mraa to ignore them + b->no_bus_mux = 1; + + if (mraa_file_exist(DT_BASE "/model")) { + // We are on a modern kernel, great!!!! + if (mraa_file_contains(DT_BASE "/model", PLATFORM_NAME_ROCK_PI4) || + mraa_file_contains(DT_BASE "/model", PLATFORM_NAME_ROCK_PI4_2) || + mraa_file_contains(DT_BASE "/model", PLATFORM_NAME_ROCK_PI4_3) + ) { + model_index = MRAA_ROCKPI4_INDEX; + b->phy_pin_count = MRAA_ROCKPI4_PIN_COUNT + 1; + b->platform_name = PLATFORM_NAME_ROCK_PI4; + b->uart_dev_count = MRAA_ROCKPI4_UART_COUNT; + b->spi_bus_count = MRAA_ROCKPI4_SPI_COUNT; + b->pwm_dev_count = MRAA_ROCKPI4_PWM_COUNT; + b->aio_count = MRAA_ROCKPI4_AIO_COUNT; + + if (strncmp(b->platform_name, PLATFORM_NAME_ROCK_PI4, MAX_SIZE) == 0) { + b->i2c_bus_count = MRAA_ROCKPI4_I2C_COUNT; + } + + // Rock Pi S + } else if (mraa_file_contains(DT_BASE "/model", PLATFORM_NAME_ROCK_PIS)) { + model_index = MRAA_ROCKPIS_INDEX; + b->phy_pin_count = MRAA_ROCKPIS_PIN_COUNT + 1; + b->platform_name = PLATFORM_NAME_ROCK_PIS; + b->uart_dev_count = MRAA_ROCKPIS_UART_COUNT; + b->spi_bus_count = MRAA_ROCKPIS_SPI_COUNT; + b->pwm_dev_count = MRAA_ROCKPIS_PWM_COUNT; + b->aio_count = MRAA_ROCKPIS_AIO_COUNT; + b->i2c_bus_count = MRAA_ROCKPIS_I2C_COUNT; + } + } + + // UART + b->def_uart_dev = 0; + for (i = 0; i < b->uart_dev_count; i++) { + b->uart_dev[i].index = rockpi_index[model_index].serialdev_index[i]; + sprintf(serialdev_path, "/dev/ttyS%i", b->uart_dev[i].index); + b->uart_dev[i].device_path = serialdev_path; + } + + // I2C + b->def_i2c_bus = 0; + for (i = 0; i < b->spi_bus_count; i++) { + b->i2c_bus[i].bus_id = rockpi_index[model_index].i2cbus_index[i]; + } + + // SPI + b->def_spi_bus = 0; + for (i = 0; i < b->spi_bus_count; i++) { + b->spi_bus[i].bus_id = rockpi_index[model_index].spibus_index[i]; + } + + // PWM + b->pwm_default_period = 500; + b->pwm_max_period = 2147483; + b->pwm_min_period = 1; + + b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count); + if (b->pins == NULL) { + free(b->adv_func); + free(b); + return NULL; + } + + b->pins[11].pwm.parent_id = rockpi_index[model_index].pwmdev_index[0]; + b->pins[11].pwm.mux_total = 0; + b->pins[11].pwm.pinmap = 0; + b->pins[13].pwm.parent_id = rockpi_index[model_index].pwmdev_index[1]; + b->pins[13].pwm.mux_total = 0; + b->pins[13].pwm.pinmap = 0; + + // ADC + b->adc_raw = 10; + b->adc_supported = 10; + b->aio_dev[0].pin = 26; + b->aio_non_seq = 1; + b->chardev_capable = 1; + + // Define pin mappings + switch (model_index) { + case MRAA_ROCKPI4_INDEX: + rockpi4_pins(b); + break; + + case MRAA_ROCKPIS_INDEX: + rockpiS_pins(b); + break; + } + + return b; +} diff --git a/src/arm/rockpi4.c b/src/arm/rockpi4.c deleted file mode 100644 index 684bf91fd..000000000 --- a/src/arm/rockpi4.c +++ /dev/null @@ -1,173 +0,0 @@ -/* - * Author: Brian - * Copyright (c) 2019 Vamrs Corporation. - * - * SPDX-License-Identifier: MIT - */ - -#include -#include -#include -#include -#include - -#include "arm/rockpi4.h" -#include "common.h" - -#define DT_BASE "/proc/device-tree" -/* -* "Radxa ROCK Pi 4" is the model name on stock 5.x kernels -* "ROCK PI 4A", "ROCK PI 4B" and "ROCK PI 4C" is used on Radxa 4.4 kernel -* so we search for the string below by ignoring case -*/ -#define PLATFORM_NAME_ROCK_PI4 "ROCK Pi 4" -#define PLATFORM_NAME_ROCK_PI4_2 "ROCK PI 4" -#define PLATFORM_NAME_ROCK_PI4_3 "ROCK 4" -#define MAX_SIZE 64 - -const char* rockpi4_serialdev[MRAA_ROCKPI4_UART_COUNT] = { "/dev/ttyS2", "/dev/ttyS4" }; - -void -mraa_rockpi4_pininfo(mraa_board_t* board, int index, int sysfs_pin, mraa_pincapabilities_t pincapabilities_t, char* fmt, ...) -{ - va_list arg_ptr; - if (index > board->phy_pin_count) - return; - - mraa_pininfo_t* pininfo = &board->pins[index]; - va_start(arg_ptr, fmt); - vsnprintf(pininfo->name, MRAA_PIN_NAME_SIZE, fmt, arg_ptr); - - if( pincapabilities_t.gpio == 1 ) { - pininfo->gpio.gpio_chip = sysfs_pin / 32; - pininfo->gpio.gpio_line = sysfs_pin % 32; - } - - pininfo->capabilities = pincapabilities_t; - - va_end(arg_ptr); - pininfo->gpio.pinmap = sysfs_pin; - pininfo->gpio.mux_total = 0; -} - -mraa_board_t* -mraa_rockpi4() -{ - mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t)); - if (b == NULL) { - return NULL; - } - - b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t)); - if (b->adv_func == NULL) { - free(b); - return NULL; - } - - // pin mux for buses are setup by default by kernel so tell mraa to ignore them - b->no_bus_mux = 1; - b->phy_pin_count = MRAA_ROCKPI4_PIN_COUNT + 1; - - if (mraa_file_exist(DT_BASE "/model")) { - // We are on a modern kernel, great!!!! - if (mraa_file_contains(DT_BASE "/model", PLATFORM_NAME_ROCK_PI4) || - mraa_file_contains(DT_BASE "/model", PLATFORM_NAME_ROCK_PI4_2) || - mraa_file_contains(DT_BASE "/model", PLATFORM_NAME_ROCK_PI4_3) - ) { - b->platform_name = PLATFORM_NAME_ROCK_PI4; - b->uart_dev[0].device_path = (char*) rockpi4_serialdev[0]; - b->uart_dev[1].device_path = (char*) rockpi4_serialdev[1]; - } - } - - // UART - b->uart_dev_count = MRAA_ROCKPI4_UART_COUNT; - b->def_uart_dev = 0; - b->uart_dev[0].index = 2; - b->uart_dev[1].index = 4; - - // I2C - if (strncmp(b->platform_name, PLATFORM_NAME_ROCK_PI4, MAX_SIZE) == 0) { - b->i2c_bus_count = MRAA_ROCKPI4_I2C_COUNT; - b->def_i2c_bus = 0; - b->i2c_bus[0].bus_id = 7; - b->i2c_bus[1].bus_id = 2; - b->i2c_bus[2].bus_id = 6; - } - - // SPI - b->spi_bus_count = MRAA_ROCKPI4_SPI_COUNT; - b->def_spi_bus = 0; - b->spi_bus[0].bus_id = 1; - b->spi_bus[1].bus_id = 2; - - b->pwm_dev_count = MRAA_ROCKPI4_PWM_COUNT; - b->pwm_default_period = 500; - b->pwm_max_period = 2147483; - b->pwm_min_period = 1; - - b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count); - if (b->pins == NULL) { - free(b->adv_func); - free(b); - return NULL; - } - - b->pins[11].pwm.parent_id = 0; - b->pins[11].pwm.mux_total = 0; - b->pins[11].pwm.pinmap = 0; - b->pins[13].pwm.parent_id = 1; - b->pins[13].pwm.mux_total = 0; - b->pins[13].pwm.pinmap = 0; - - b->aio_count = MRAA_ROCKPI4_AIO_COUNT; - b->adc_raw = 10; - b->adc_supported = 10; - b->aio_dev[0].pin = 26; - b->aio_non_seq = 1; - b->chardev_capable = 1; - - mraa_rockpi4_pininfo(b, 0, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID"); - mraa_rockpi4_pininfo(b, 1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3"); - mraa_rockpi4_pininfo(b, 2, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V"); - mraa_rockpi4_pininfo(b, 3, 71, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SDA7"); - mraa_rockpi4_pininfo(b, 4, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V"); - mraa_rockpi4_pininfo(b, 5, 72, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SCL7"); - mraa_rockpi4_pininfo(b, 6, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); - mraa_rockpi4_pininfo(b, 7, 75, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI2_CLK"); - mraa_rockpi4_pininfo(b, 8, 148, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "TXD2"); - mraa_rockpi4_pininfo(b, 9, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); - mraa_rockpi4_pininfo(b, 10, 147, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "RXD2"); - mraa_rockpi4_pininfo(b, 11, 146, (mraa_pincapabilities_t){1,1,1,0,0,0,0,0}, "PWM0"); - mraa_rockpi4_pininfo(b, 12, 131, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A3"); - mraa_rockpi4_pininfo(b, 13, 150, (mraa_pincapabilities_t){1,1,1,0,0,0,0,0}, "PWM1"); - mraa_rockpi4_pininfo(b, 14, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); - mraa_rockpi4_pininfo(b, 15, 149, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_C5"); - mraa_rockpi4_pininfo(b, 16, 154, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D2"); - mraa_rockpi4_pininfo(b, 17, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3"); - mraa_rockpi4_pininfo(b, 18, 156, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D4"); - mraa_rockpi4_pininfo(b, 19, 40, (mraa_pincapabilities_t){1,1,0,0,1,0,0,1}, "SPI1TX,TXD4"); - mraa_rockpi4_pininfo(b, 20, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); - mraa_rockpi4_pininfo(b, 21, 39, (mraa_pincapabilities_t){1,1,0,0,1,0,0,1}, "SPI1RX,RXD4"); - mraa_rockpi4_pininfo(b, 22, 157, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D5"); - mraa_rockpi4_pininfo(b, 23, 41, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI1CLK"); - mraa_rockpi4_pininfo(b, 24, 42, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI1CS"); - mraa_rockpi4_pininfo(b, 25, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); - mraa_rockpi4_pininfo(b, 26, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,1,0}, "ADC_IN0"); - mraa_rockpi4_pininfo(b, 27, 64, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SDA2"); - mraa_rockpi4_pininfo(b, 28, 65, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SCL2"); - mraa_rockpi4_pininfo(b, 29, 74, (mraa_pincapabilities_t){1,1,0,0,1,1,0,0}, "SCL6,SPI2RX"); - mraa_rockpi4_pininfo(b, 30, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); - mraa_rockpi4_pininfo(b, 31, 73, (mraa_pincapabilities_t){1,1,0,0,1,1,0,0}, "SDA6,SPI2TX"); - mraa_rockpi4_pininfo(b, 32, 112, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO3_C0"); - mraa_rockpi4_pininfo(b, 33, 76, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI2CS"); - mraa_rockpi4_pininfo(b, 34, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); - mraa_rockpi4_pininfo(b, 35, 133, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A5"); - mraa_rockpi4_pininfo(b, 36, 132, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A4"); - mraa_rockpi4_pininfo(b, 37, 158, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D6"); - mraa_rockpi4_pininfo(b, 38, 134, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A6"); - mraa_rockpi4_pininfo(b, 39, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); - mraa_rockpi4_pininfo(b, 40, 135, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A7"); - - return b; -}