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Commit ab46291

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ficetoficeto
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fix uart triggering reset when spi has been read/written
1 parent 66d9dbb commit ab46291

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cores/esp8266/spiffs/spiffs_flashmem.c

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,7 @@ uint32_t flashmem_read( void *to, uint32_t fromaddr, uint32_t size )
9797

9898
bool flashmem_erase_sector( uint32_t sector_id )
9999
{
100-
WRITE_PERI_REG(0x60000914, 0x73);
100+
WDT_RESET();
101101
return spi_flash_erase_sector( sector_id ) == SPI_FLASH_RESULT_OK;
102102
}
103103

@@ -186,7 +186,9 @@ uint32_t flashmem_write_internal( const void *from, uint32_t toaddr, uint32_t si
186186
os_memcpy(apbuf, from, size);
187187
}
188188
WDT_RESET();
189+
ETS_UART_INTR_DISABLE();
189190
r = spi_flash_write(toaddr, apbuf?(uint32 *)apbuf:(uint32 *)from, size);
191+
ETS_UART_INTR_ENABLE();
190192
if(apbuf)
191193
os_free(apbuf);
192194
if(SPI_FLASH_RESULT_OK == r)
@@ -202,7 +204,9 @@ uint32_t flashmem_read_internal( void *to, uint32_t fromaddr, uint32_t size )
202204
fromaddr -= INTERNAL_FLASH_START_ADDRESS;
203205
SpiFlashOpResult r;
204206
WDT_RESET();
207+
ETS_UART_INTR_DISABLE();
205208
r = spi_flash_read(fromaddr, (uint32 *)to, size);
209+
ETS_UART_INTR_ENABLE();
206210
if(SPI_FLASH_RESULT_OK == r)
207211
return size;
208212
else{

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