Merge pull request #266 from ficeto/esp8266

fix buffer and block size

Author: igrr

cores/esp8266/Esp.cpp

@@ -158,6 +158,11 @@ uint32_t EspClass::getFlashChipId(void)
     return spi_flash_get_id();
 }
 
+uint32_t EspClass::getFlashChipRealSize(void)
+{
+    return (1 << ((spi_flash_get_id() >> 16) & 0xFF));
+}
+
 uint32_t EspClass::getFlashChipSize(void)
 {
     uint32_t data;
@@ -175,6 +180,12 @@ uint32_t EspClass::getFlashChipSize(void)
                 return (2_MB);
             case 0x4: // 32 MBit (4MB)
                 return (4_MB);
+            case 0x5: // 64 MBit (8MB)
+                return (8_MB);
+            case 0x6: // 128 MBit (16MB)
+                return (16_MB);
+            case 0x7: // 256 MBit (32MB)
+                return (32_MB);
             default: // fail?
                 return 0;
         }

cores/esp8266/Esp.h

@@ -90,6 +90,9 @@ class EspClass {
         uint8_t getCpuFreqMHz(void);
 
         uint32_t getFlashChipId(void);
+        //gets the actual chip size based on the flash id
+        uint32_t getFlashChipRealSize(void);
+        //gets the size of the flash as set by the compiler
         uint32_t getFlashChipSize(void);
         uint32_t getFlashChipSpeed(void);
         FlashMode_t getFlashChipMode(void);

cores/esp8266/FileSystem.cpp

@@ -23,7 +23,7 @@
 #include "spiffs/spiffs_esp8266.h"
 
 #define LOGICAL_PAGE_SIZE       256
-#define LOGICAL_BLOCK_SIZE      512
+#define LOGICAL_BLOCK_SIZE      (INTERNAL_FLASH_SECTOR_SIZE * 1)
 
 
 // These addresses are defined in the linker script.
@@ -64,7 +64,7 @@ int FSClass::_mountInternal(){
 
   SPIFFS_API_DBG_V("FSClass::_mountInternal: start:%x, size:%d Kb\n", cfg.phys_addr, cfg.phys_size / 1024);
 
-  _work.reset(new uint8_t[LOGICAL_BLOCK_SIZE]);
+  _work.reset(new uint8_t[2*LOGICAL_PAGE_SIZE]);
   _fdsSize = 32 * _maxOpenFiles;
   _fds.reset(new uint8_t[_fdsSize]);
   _cacheSize = (32 + LOGICAL_PAGE_SIZE) * _maxOpenFiles;