Merge branch 'refactor/usb_periph' into 'master'

Refactor: USB peripheral

See merge request espressif/esp-idf!33971

Author: tore-espressif

Diff for: components/hal/CMakeLists.txt

@@ -271,6 +271,10 @@ if(NOT BOOTLOADER_BUILD)
         list(APPEND srcs "usb_serial_jtag_hal.c")
     endif()
 
+    if(CONFIG_SOC_USB_UTMI_PHY_NUM GREATER 0)
+        list(APPEND srcs "usb_utmi_hal.c")
+    endif()
+
     if(CONFIG_SOC_USB_OTG_SUPPORTED)
         list(APPEND srcs
                     "usb_dwc_hal.c"

Diff for: components/hal/include/hal/usb_dwc_ll.h renamed to components/hal/esp32p4/include/hal/usb_dwc_ll.h

@@ -6,25 +6,22 @@
 
 #pragma once
 
-#include "soc/soc_caps.h"
-/*
-This header is shared across all targets. Resolve to an empty header for targets
-that don't support USB OTG.
-*/
-#if SOC_USB_OTG_SUPPORTED
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/usb_dwc_struct.h"
 #include "soc/usb_dwc_cfg.h"
 #include "hal/usb_dwc_types.h"
 #include "hal/misc.h"
-#endif // SOC_USB_OTG_SUPPORTED
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#if SOC_USB_OTG_SUPPORTED
+/* ----------------------------- Helper Macros ------------------------------ */
+
+// Get USB hardware instance
+// TODO: extend this macros when we have support for both FS and HS hardware on P4
+#define USB_DWC_LL_GET_HW(num) (&USB_DWC_HS)
 
 /* -----------------------------------------------------------------------------
 --------------------------------- DWC Constants --------------------------------
@@ -222,14 +219,14 @@ static inline void usb_dwc_ll_gusbcfg_set_timeout_cal(usb_dwc_dev_t *hw, uint8_t
     hw->gusbcfg_reg.toutcal = tout_cal;
 }
 
-#if (OTG_HSPHY_INTERFACE != 0)
 static inline void usb_dwc_ll_gusbcfg_set_utmi_phy(usb_dwc_dev_t *hw)
 {
+#if (OTG_HSPHY_INTERFACE != 0)
     hw->gusbcfg_reg.phyif = 1;       // 16 bits interface
     hw->gusbcfg_reg.ulpiutmisel = 0; // UTMI+
     hw->gusbcfg_reg.physel = 0;      // HS PHY
-}
 #endif // (OTG_HSPHY_INTERFACE != 0)
+}
 
 // --------------------------- GRSTCTL Register --------------------------------
 
@@ -356,9 +353,9 @@ static inline uint32_t usb_dwc_ll_gsnpsid_get_id(usb_dwc_dev_t *hw)
 // --------------------------- GHWCFGx Register --------------------------------
 
 /**
- * @brief Get the hardware configuration regiters of the DWC_OTG controller
+ * @brief Get the hardware configuration registers of the DWC_OTG controller
  *
- * The hardware configuraiton regitsers are read only and indicate the various
+ * The hardware configuration regitsers are read only and indicate the various
  * features of the DWC_OTG core.
  *
  * @param hw Start address of the DWC_OTG registers
@@ -405,7 +402,7 @@ static inline void usb_dwc_ll_hcfg_dis_perio_sched(usb_dwc_dev_t *hw)
 /**
  * Sets the length of the frame list
  *
- * @param num_entires Number of entires in the frame list
+ * @param num_entires Number of entries in the frame list
  */
 static inline void usb_dwc_ll_hcfg_set_num_frame_list_entries(usb_dwc_dev_t *hw, usb_hal_frame_list_len_t num_entries)
 {
@@ -903,7 +900,7 @@ static inline usb_dwc_host_chan_regs_t *usb_dwc_ll_chan_get_regs(usb_dwc_dev_t *
 // ------------------------------ QTD related ----------------------------------
 
 #define USB_DWC_LL_QTD_STATUS_SUCCESS      0x0     //If QTD was processed, it indicates the data was transmitted/received successfully
-#define USB_DWC_LL_QTD_STATUS_PKTERR       0x1     //Data trasnmitted/received with errors (CRC/Timeout/Stuff/False EOP/Excessive NAK).
+#define USB_DWC_LL_QTD_STATUS_PKTERR       0x1     //Data transmitted/received with errors (CRC/Timeout/Stuff/False EOP/Excessive NAK).
 //Note: 0x2 is reserved
 #define USB_DWC_LL_QTD_STATUS_BUFFER       0x3     //AHB error occurred.
 #define USB_DWC_LL_QTD_STATUS_NOT_EXECUTED 0x4     //QTD as never processed
@@ -914,7 +911,7 @@ static inline usb_dwc_host_chan_regs_t *usb_dwc_ll_chan_get_regs(usb_dwc_dev_t *
  * @param qtd Pointer to the QTD
  * @param data_buff Pointer to buffer containing the data to transfer
  * @param xfer_len Number of bytes in transfer. Setting 0 will do a zero length IN transfer.
- *                 Non zero length must be mulitple of the endpoint's MPS.
+ *                 Non zero length must be multiple of the endpoint's MPS.
  * @param hoc Halt on complete (will generate an interrupt and halt the channel)
  */
 static inline void usb_dwc_ll_qtd_set_in(usb_dwc_ll_dma_qtd_t *qtd, uint8_t *data_buff, int xfer_len, bool hoc)
@@ -932,7 +929,7 @@ static inline void usb_dwc_ll_qtd_set_in(usb_dwc_ll_dma_qtd_t *qtd, uint8_t *dat
 /**
  * @brief Set a QTD for a non isochronous OUT transfer
  *
- * @param qtd Poitner to the QTD
+ * @param qtd Pointer to the QTD
  * @param data_buff Pointer to buffer containing the data to transfer
  * @param xfer_len Number of bytes to transfer. Setting 0 will do a zero length transfer.
  *                 For ctrl setup packets, this should be set to 8.
@@ -972,9 +969,9 @@ static inline void usb_dwc_ll_qtd_set_null(usb_dwc_ll_dma_qtd_t *qtd)
 /**
  * @brief Get the status of a QTD
  *
- * When a channel get's halted, call this to check whether each QTD was executed successfully
+ * When a channel gets halted, call this to check whether each QTD was executed successfully
  *
- * @param qtd Poitner to the QTD
+ * @param qtd Pointer to the QTD
  * @param[out] rem_len Number of bytes ramining in the QTD
  * @param[out] status Status of the QTD
  */
@@ -992,8 +989,6 @@ static inline void usb_dwc_ll_qtd_get_status(usb_dwc_ll_dma_qtd_t *qtd, int *rem
     qtd->buffer_status_val = 0;
 }
 
-#endif // SOC_USB_OTG_SUPPORTED
-
 #ifdef __cplusplus
 }
 #endif

Diff for: components/hal/esp32p4/include/hal/usb_utmi_ll.h

@@ -53,7 +53,7 @@ FORCE_INLINE_ATTR void _usb_utmi_ll_enable_bus_clock(bool clk_en)
 /**
  * @brief Reset the USB UTMI PHY and USB_DWC_HS controller
  */
-FORCE_INLINE_ATTR void usb_utmi_ll_reset_register(void)
+FORCE_INLINE_ATTR void _usb_utmi_ll_reset_register(void)
 {
     // Reset the USB_UTMI and USB_DWC_HS
     LP_AON_CLKRST.hp_usb_clkrst_ctrl1.rst_en_usb_otg20 = 1;
@@ -63,7 +63,7 @@ FORCE_INLINE_ATTR void usb_utmi_ll_reset_register(void)
 }
 
 // P_AON_CLKRST.hp_usb_clkrst_ctrlx is shared register, so this function must be used in an atomic way
-#define usb_utmi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; usb_utmi_ll_reset_register(__VA_ARGS__)
+#define usb_utmi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; _usb_utmi_ll_reset_register(__VA_ARGS__)
 
 /**
  * @brief Enable precise detection of VBUS