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| 1 | +2023-09-14 David Malcolm < [email protected]> |
| 2 | + |
| 3 | + * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef. |
| 4 | + * diagnostic-format-sarif.cc (class sarif_thread_flow): New. |
| 5 | + (sarif_thread_flow::sarif_thread_flow): New. |
| 6 | + (sarif_builder::make_code_flow_object): Reimplement, creating |
| 7 | + per-thread threadFlow objects, populating them with the relevant |
| 8 | + events. |
| 9 | + (sarif_builder::make_thread_flow_object): Delete, moving the |
| 10 | + code into sarif_builder::make_code_flow_object. |
| 11 | + (sarif_builder::make_thread_flow_location_object): Add |
| 12 | + "path_event_idx" param. Use it to set "executionOrder" |
| 13 | + property. |
| 14 | + * diagnostic-path.h (diagnostic_event::get_thread_id): New |
| 15 | + pure-virtual vfunc. |
| 16 | + (class diagnostic_thread): New. |
| 17 | + (diagnostic_path::num_threads): New pure-virtual vfunc. |
| 18 | + (diagnostic_path::get_thread): New pure-virtual vfunc. |
| 19 | + (diagnostic_path::multithreaded_p): New decl. |
| 20 | + (simple_diagnostic_event::simple_diagnostic_event): Add optional |
| 21 | + thread_id param. |
| 22 | + (simple_diagnostic_event::get_thread_id): New accessor. |
| 23 | + (simple_diagnostic_event::m_thread_id): New. |
| 24 | + (class simple_diagnostic_thread): New. |
| 25 | + (simple_diagnostic_path::simple_diagnostic_path): Move definition |
| 26 | + to diagnostic.cc. |
| 27 | + (simple_diagnostic_path::num_threads): New. |
| 28 | + (simple_diagnostic_path::get_thread): New. |
| 29 | + (simple_diagnostic_path::add_thread): New. |
| 30 | + (simple_diagnostic_path::add_thread_event): New. |
| 31 | + (simple_diagnostic_path::m_threads): New. |
| 32 | + * diagnostic-show-locus.cc (layout::layout): Add pretty_printer |
| 33 | + param for overriding the context's printer. |
| 34 | + (diagnostic_show_locus): Likwise. |
| 35 | + * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path): |
| 36 | + Move here from diagnostic-path.h. Add main thread. |
| 37 | + (simple_diagnostic_path::num_threads): New. |
| 38 | + (simple_diagnostic_path::get_thread): New. |
| 39 | + (simple_diagnostic_path::add_thread): New. |
| 40 | + (simple_diagnostic_path::add_thread_event): New. |
| 41 | + (simple_diagnostic_event::simple_diagnostic_event): Add thread_id |
| 42 | + param and use it to initialize m_thread_id. Reformat. |
| 43 | + * diagnostic.h: Add pretty_printer param for overriding the |
| 44 | + context's printer. |
| 45 | + * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR. |
| 46 | + (can_consolidate_events): Compare thread ids. |
| 47 | + (class per_thread_summary): New. |
| 48 | + (event_range::event_range): Add per_thread_summary arg. |
| 49 | + (event_range::print): Add "pp" param and use it rather than dc's |
| 50 | + printer. |
| 51 | + (event_range::m_thread_id): New field. |
| 52 | + (event_range::m_per_thread_summary): New field. |
| 53 | + (path_summary::multithreaded_p): New. |
| 54 | + (path_summary::get_events_for_thread_id): New. |
| 55 | + (path_summary::m_per_thread_summary): New field. |
| 56 | + (path_summary::m_thread_id_to_events): New field. |
| 57 | + (path_summary::get_or_create_events_for_thread_id): New. |
| 58 | + (path_summary::path_summary): Create per_thread_summary instances |
| 59 | + as needed and associate the event_range instances with them. |
| 60 | + (base_indent): Move here from print_path_summary_as_text. |
| 61 | + (per_frame_indent): Likewise. |
| 62 | + (class thread_event_printer): New, adapted from parts of |
| 63 | + print_path_summary_as_text. |
| 64 | + (print_path_summary_as_text): Make static. Reimplement to |
| 65 | + moving most of existing code to class thread_event_printer, |
| 66 | + capturing state as per-thread as appropriate. |
| 67 | + (default_tree_diagnostic_path_printer): Add missing 'break' on |
| 68 | + final case. |
| 69 | + |
| 70 | +2023-09-14 David Malcolm < [email protected]> |
| 71 | + |
| 72 | + * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New. |
| 73 | + * dwarf2out.h (dwarf2cfi_cc_finalize): New decl. |
| 74 | + * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when |
| 75 | + clearing the deletable gcc_root_tab_t. |
| 76 | + (ggc_common_finalize): New. |
| 77 | + * ggc.h (ggc_common_finalize): New decl. |
| 78 | + * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and |
| 79 | + ggc_common_finalize. |
| 80 | + |
| 81 | +2023-09-14 Max Filippov < [email protected]> |
| 82 | + |
| 83 | + * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add |
| 84 | + unsigned comparisons. |
| 85 | + * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code |
| 86 | + generation of salt/saltu instructions. |
| 87 | + * config/xtensa/xtensa.h (TARGET_SALT): New macro. |
| 88 | + * config/xtensa/xtensa.md (salt, saltu): New instruction |
| 89 | + patterns. |
| 90 | + |
| 91 | +2023-09-14 Vladimir N. Makarov < [email protected]> |
| 92 | + |
| 93 | + * ira-costs.cc (find_costs_and_classes): Decrease memory cost |
| 94 | + by equiv savings. |
| 95 | + |
| 96 | +2023-09-14 Lehua Ding < [email protected]> |
| 97 | + |
| 98 | + * config/riscv/autovec.md: Change rtx code to unspec. |
| 99 | + * config/riscv/riscv-protos.h (expand_reduction): Change prototype. |
| 100 | + * config/riscv/riscv-v.cc (expand_reduction): Change prototype. |
| 101 | + * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop): |
| 102 | + Removed. |
| 103 | + (class widen_freducop): Removed. |
| 104 | + * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs. |
| 105 | + * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name. |
| 106 | + (@pred_<reduc_op><mode>): New name. |
| 107 | + (@pred_widen_reduc_plus<v_su><mode>): Change name. |
| 108 | + (@pred_reduc_plus<order><mode>): Change name. |
| 109 | + (@pred_widen_reduc_plus<order><mode>): Change name. |
| 110 | + |
| 111 | +2023-09-14 Lehua Ding < [email protected]> |
| 112 | + |
| 113 | + * config/riscv/riscv-v.cc (expand_reduction): Adjust call. |
| 114 | + * config/riscv/riscv-vector-builtins-bases.cc: Adjust call. |
| 115 | + * config/riscv/vector-iterators.md: New iterators and attrs. |
| 116 | + * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): |
| 117 | + Removed. |
| 118 | + (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed. |
| 119 | + (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed. |
| 120 | + (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed. |
| 121 | + (@pred_reduc_<reduc><mode>): Added. |
| 122 | + (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed. |
| 123 | + (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed. |
| 124 | + (@pred_widen_reduc_plus<v_su><mode>): Added. |
| 125 | + (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed. |
| 126 | + (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed. |
| 127 | + (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed. |
| 128 | + (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed. |
| 129 | + (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed. |
| 130 | + (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed. |
| 131 | + (@pred_reduc_plus<order><mode>): Added. |
| 132 | + (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed. |
| 133 | + (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed. |
| 134 | + (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed. |
| 135 | + (@pred_widen_reduc_plus<order><mode>): Added. |
| 136 | + |
| 137 | +2023-09-14 Richard Sandiford < [email protected]> |
| 138 | + |
| 139 | + * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info): |
| 140 | + Move WHILELO handling to... |
| 141 | + (aarch64_vector_costs::finish_cost): ...here. Check whether the |
| 142 | + vectorizer has decided to use a predicated loop. |
| 143 | + |
| 144 | +2023-09-14 Andrew Pinski < [email protected]> |
| 145 | + |
| 146 | + PR tree-optimization/106164 |
| 147 | + * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`): |
| 148 | + Expand to support constants that are off by one. |
| 149 | + |
| 150 | +2023-09-14 Andrew Pinski < [email protected]> |
| 151 | + |
| 152 | + * genmatch.cc (parser::parse_result): For an else clause |
| 153 | + of an if statement inside a switch, error out explictly. |
| 154 | + |
| 155 | +2023-09-14 Juzhe-Zhong < [email protected]> |
| 156 | + |
| 157 | + * config/riscv/autovec-opt.md: Add VLS mask modes. |
| 158 | + * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @. |
| 159 | + (vcond_mask_<mode><vm>): Add VLS mask modes. |
| 160 | + * config/riscv/vector.md: Ditto. |
| 161 | + |
| 162 | +2023-09-14 Richard Biener < [email protected]> |
| 163 | + |
| 164 | + PR tree-optimization/111294 |
| 165 | + * tree-ssa-forwprop.cc (pass_forwprop::execute): Track |
| 166 | + operands that eventually become dead and use simple_dce_from_worklist |
| 167 | + to remove their definitions if they did so. |
| 168 | + |
| 169 | +2023-09-14 Richard Sandiford < [email protected]> |
| 170 | + |
| 171 | + * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le): |
| 172 | + Accept all nonimmediate_operands, but keep the existing constraints. |
| 173 | + If the instruction is split before RA, load invalid addresses into |
| 174 | + a temporary register. |
| 175 | + * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete. |
| 176 | + |
| 177 | +2023-09-14 Juzhe-Zhong < [email protected]> |
| 178 | + |
| 179 | + PR target/111395 |
| 180 | + * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE. |
| 181 | + (vector_insn_info::global_merge): Ditto. |
| 182 | + (vector_insn_info::get_avl_or_vl_reg): Ditto. |
| 183 | + |
| 184 | +2023-09-14 Juzhe-Zhong < [email protected]> |
| 185 | + |
| 186 | + * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it. |
| 187 | + |
| 188 | +2023-09-14 Lulu Cheng < [email protected]> |
| 189 | + |
| 190 | + * config/loongarch/loongarch-def.c: Modify the default value of |
| 191 | + branch_cost. |
| 192 | + |
| 193 | +2023-09-14 Takayuki 'January June' Suwa < [email protected]> |
| 194 | + |
| 195 | + * config/xtensa/xtensa.cc (xtensa_expand_scc): |
| 196 | + Revert the changes from the last patch, as the work in the RTL |
| 197 | + expansion pass is too far to determine the physical registers. |
| 198 | + * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto. |
| 199 | + (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns. |
| 200 | + |
| 201 | +2023-09-14 Lulu Cheng < [email protected]> |
| 202 | + |
| 203 | + PR target/111334 |
| 204 | + * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'. |
| 205 | + |
1 | 206 | 2023-09-13 Juzhe-Zhong < [email protected]>
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2 | 207 |
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3 | 208 | * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
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