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import os
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import re
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from pprint import pprint
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- from hdlparse .minilexer import MiniLexer
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+ from typing import List , Optional
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+ from .minilexer import MiniLexer
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"""VHDL documentation parser"""
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@@ -171,20 +172,48 @@ def __init__(self, name, desc=None):
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self .kind = 'unknown'
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self .desc = desc
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+ def remove_outer_parenthesis (s : Optional [str ]):
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+ if s :
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+ n = 1
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+ while n :
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+ s , n = re .subn (r'\([^()]*\)' , '' , s .strip ()) # remove non-nested/flat balanced parts
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+ return s
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+
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+ class VhdlParameterType :
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+ """Parameter type definition
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+
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+ Args:
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+ name (str): Name of the type
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+ direction(str): "to" or "downto"
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+ r_bound (str): A simple expression based on digits or variable names
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+ l_bound (str): A simple expression based on digits or variable names
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+ arange (str): Original array range string
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+ """
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+
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+ def __init__ (self , name , direction = "" , r_bound = "" , l_bound = "" , arange = "" ):
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+ self .name = name
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+ self .direction = direction .lower ().strip ()
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+ self .r_bound = r_bound .strip ()
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+ self .l_bound = l_bound .strip ()
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+ self .arange = arange
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+
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+ def __repr__ (self ):
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+ return f"VhdlParameterType('{ self .name } ','{ self .arange } ')"
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+
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class VhdlParameter :
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"""Parameter to subprograms, ports, and generics
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Args:
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name (str): Name of the object
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- mode (str): Direction mode for the parameter
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- data_type (str ): Type name for the parameter
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- default_value (str): Default value of the parameter
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- desc (str): Description from object metacomments
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- param_desc (str): Description of the parameter
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+ mode (optional str): Direction mode for the parameter
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+ data_type (optional VhdlParameterType ): Type name for the parameter
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+ default_value (optional str): Default value of the parameter
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+ desc (optional str): Description from object metacomments
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+ param_desc (optional str): Description of the parameter
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"""
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- def __init__ (self , name , mode = None , data_type = None , default_value = None , desc = None , param_desc = None ):
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+ def __init__ (self , name , mode : Optional [ str ] = None , data_type : Optional [ VhdlParameterType ] = None , default_value : Optional [ str ] = None , desc : Optional [ str ] = None , param_desc : Optional [ str ] = None ):
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self .name = name
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self .mode = mode
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self .data_type = data_type
@@ -210,28 +239,6 @@ def __repr__(self):
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return f"VhdlParameter('{ self .name } ', '{ self .mode } ', '{ self .data_type .name + self .data_type .arange } ')"
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- class VhdlParameterType :
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- """Parameter type definition
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-
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- Args:
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- name (str): Name of the type
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- direction(str): "to" or "downto"
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- r_bound (str): A simple expression based on digits or variable names
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- l_bound (str): A simple expression based on digits or variable names
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- arange (str): Original array range string
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- """
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-
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- def __init__ (self , name , direction = "" , r_bound = "" , l_bound = "" , arange = "" ):
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- self .name = name
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- self .direction = direction .strip ()
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- self .r_bound = r_bound .strip ()
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- self .l_bound = l_bound .strip ()
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- self .arange = arange
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-
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- def __repr__ (self ):
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- return f"VhdlParameterType('{ self .name } ','{ self .arange } ')"
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-
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-
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class VhdlPackage (VhdlObject ):
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"""Package declaration
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@@ -357,7 +364,7 @@ class VhdlEntity(VhdlObject):
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desc (str, optional): Description from object metacomments
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"""
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- def __init__ (self , name , ports , generics = None , sections = None , desc = None ):
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+ def __init__ (self , name : str , ports : List [ VhdlParameter ] , generics : List [ VhdlParameter ] = [] , sections : List [ str ] = [] , desc : Optional [ str ] = None ):
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VhdlObject .__init__ (self , name , desc )
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self .kind = 'entity'
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self .generics = generics if generics is not None else []
@@ -602,7 +609,7 @@ def parse_vhdl(text):
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saved_type = groups [0 ]
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elif action in (
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- 'array_type' , 'file_type' , 'access_type' , 'record_type' , 'range_type' , 'enum_type' , 'incomplete_type' ):
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+ 'array_type' , 'file_type' , 'access_type' , 'record_type' , 'range_type' , 'enum_type' , 'incomplete_type' ):
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vobj = VhdlType (saved_type , cur_package , action , metacomments )
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objects .append (vobj )
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kind = None
@@ -684,7 +691,7 @@ def is_vhdl(fname):
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Returns:
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True when file has a VHDL extension.
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"""
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- return os .path .splitext (fname )[1 ].lower () in ('.vhdl' , '.vhd' )
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+ return os .path .splitext (fname )[- 1 ].lower () in ('.vhdl' , '.vhd' )
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class VhdlExtractor :
@@ -721,7 +728,11 @@ def extract_objects(self, fname, type_filter=None):
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self ._register_array_types (objects )
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if type_filter :
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- objects = [o for o in objects if isinstance (o , type_filter )]
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+ if not isinstance (type_filter , list ):
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+ type_filter = [type_filter ]
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+ objects = [
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+ o for o in objects if any (map (lambda clz : isinstance (o , clz ), type_filter ))
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+ ]
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return objects
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@@ -750,11 +761,7 @@ def is_array(self, data_type):
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Returns:
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True if ``data_type`` is a known array type.
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"""
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-
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- # Split off any brackets
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- data_type = data_type .split ('[' )[0 ].strip ()
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-
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- return data_type .lower () in self .array_types
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+ return data_type .name .lower () in self .array_types
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def _add_array_types (self , type_defs ):
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"""Add array data types to internal registry
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