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hackpascaldanielschwierzeck
hackpascal
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danielschwierzeck
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mips: mtmips: add two reference boards for mt7621
The mt7621_rfb board supports integrated giga PHYs plus one external giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1 slots, SDXC and USB. The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it uses NAND flash and SDXC is not available. Reviewed-by: Stefan Roese <[email protected]> Reviewed-by: Daniel Schwierzeck <[email protected]> Signed-off-by: Weijie Gao <[email protected]>
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‎arch/mips/dts/Makefile

+2
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@ dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
1616
dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
1717
dtb-$(CONFIG_BOARD_MT7620_RFB) += mediatek,mt7620-rfb.dtb
1818
dtb-$(CONFIG_BOARD_MT7620_MT7530_RFB) += mediatek,mt7620-mt7530-rfb.dtb
19+
dtb-$(CONFIG_BOARD_MT7621_RFB) += mediatek,mt7621-rfb.dtb
20+
dtb-$(CONFIG_BOARD_MT7621_NAND_RFB) += mediatek,mt7621-nand-rfb.dtb
1921
dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb
2022
dtb-$(CONFIG_BOARD_GARDENA_SMART_GATEWAY_MT7688) += gardena-smart-gateway-mt7688.dtb
2123
dtb-$(CONFIG_BOARD_LINKIT_SMART_7688) += linkit-smart-7688.dtb

‎arch/mips/dts/mediatek,mt7621-nand-rfb.dts

+67
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@@ -0,0 +1,67 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 MediaTek Inc. All rights reserved.
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*
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* Author: Weijie Gao <[email protected]>
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*/
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/dts-v1/;
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#include "mt7621.dtsi"
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/ {
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compatible = "mediatek,mt7621-nand-rfb", "mediatek,mt7621-soc";
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model = "MediaTek MT7621 RFB (NAND)";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = &uart0;
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};
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};
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&pinctrl {
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state_default: pin_state {
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nand {
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groups = "spi", "sdxc";
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function = "nand";
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};
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gpios {
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groups = "i2c", "uart3", "pcie reset";
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function = "gpio";
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};
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wdt {
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groups = "wdt";
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function = "wdt rst";
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};
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jtag {
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groups = "jtag";
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function = "jtag";
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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&eth {
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status = "okay";
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};
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&ssusb {
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status = "okay";
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};
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&u3phy {
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status = "okay";
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};

‎arch/mips/dts/mediatek,mt7621-rfb.dts

+82
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@@ -0,0 +1,82 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 MediaTek Inc. All rights reserved.
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*
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* Author: Weijie Gao <[email protected]>
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*/
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/dts-v1/;
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#include "mt7621.dtsi"
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/ {
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compatible = "mediatek,mt7621-rfb", "mediatek,mt7621-soc";
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model = "MediaTek MT7621 RFB (SPI-NOR)";
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aliases {
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serial0 = &uart0;
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spi0 = &spi;
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};
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chosen {
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stdout-path = &uart0;
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};
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};
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&pinctrl {
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state_default: pin_state {
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gpios {
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groups = "i2c", "uart3", "pcie reset";
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function = "gpio";
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};
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wdt {
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groups = "wdt";
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function = "wdt rst";
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};
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jtag {
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groups = "jtag";
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function = "jtag";
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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&spi {
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status = "okay";
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num-cs = <2>;
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <25000000>;
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reg = <0>;
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};
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};
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&eth {
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status = "okay";
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};
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&mmc {
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cap-sd-highspeed;
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status = "okay";
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};
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&ssusb {
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status = "okay";
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};
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&u3phy {
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status = "okay";
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};

‎arch/mips/mach-mtmips/mt7621/Kconfig

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@@ -79,6 +79,26 @@ config MT7621_BOOT_FROM_NAND
7979
choice
8080
prompt "Board select"
8181

82+
config BOARD_MT7621_RFB
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bool "MediaTek MT7621 RFB (SPI-NOR)"
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help
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The reference design of MT7621A (WS3010) booting from SPI-NOR flash.
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The board can be configured with DDR2 (64MiB~256MiB) or DDR3
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(128MiB~512MiB). The board has 16 MiB SPI-NOR flash, built-in MT7530
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GbE switch, 1 UART, 1 USB 2.0 host, 1 USB 3.0 host, 1 SDXC, 3 PCIe
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sockets, 1 RGMII to external GbE PHY, 2 audio jacks (in/out),
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JTAG pins and expansion GPIO pins.
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config BOARD_MT7621_NAND_RFB
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bool "MediaTek MT7621 RFB (NAND)"
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help
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The reference design of MT7621A (WS3010) booting from NAND flash.
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The board can be configured with DDR2 (64MiB~256MiB) or DDR3
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(128MiB~512MiB). The board has 128 MiB parallel NAND flash, built-in
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MT7530 GbE switch, 1 UART, 1 USB 2.0 host, 1 USB 3.0 host, 3 PCIe
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sockets, 1 RGMII to external GbE PHY, 2 audio jacks (in/out),
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JTAG pins and expansion GPIO pins.
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82102
endchoice
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84104
config SYS_CONFIG_NAME

‎board/mediatek/mt7621/MAINTAINERS

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MT7621_RFB BOARD
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M: Weijie Gao <[email protected]>
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S: Maintained
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F: board/mediatek/mt7621
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F: configs/mt7621_rfb_defconfig
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F: configs/mt7621_nand_rfb_defconfig
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F: arch/mips/dts/mediatek,mt7621-rfb.dts
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F: arch/mips/dts/mediatek,mt7621-nand-rfb.dts

‎board/mediatek/mt7621/Makefile

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@@ -0,0 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-y += board.o

‎board/mediatek/mt7621/board.c

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@@ -0,0 +1,6 @@
1+
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 MediaTek Inc. All rights reserved.
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*
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* Author: Weijie Gao <[email protected]>
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*/

‎configs/mt7621_nand_rfb_defconfig

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@@ -0,0 +1,89 @@
1+
CONFIG_MIPS=y
2+
CONFIG_SYS_MALLOC_LEN=0x100000
3+
CONFIG_SPL_LIBCOMMON_SUPPORT=y
4+
CONFIG_SPL_LIBGENERIC_SUPPORT=y
5+
CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x1000
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CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-nand-rfb"
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
10+
CONFIG_SPL=y
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CONFIG_DEBUG_UART_BASE=0xbe000c00
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CONFIG_DEBUG_UART_CLOCK=50000000
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CONFIG_SYS_LOAD_ADDR=0x83000000
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CONFIG_ARCH_MTMIPS=y
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CONFIG_SOC_MT7621=y
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CONFIG_MT7621_BOOT_FROM_NAND=y
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CONFIG_BOARD_MT7621_NAND_RFB=y
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# CONFIG_MIPS_CACHE_SETUP is not set
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# CONFIG_MIPS_CACHE_DISABLE is not set
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CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
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CONFIG_MIPS_BOOT_FDT=y
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CONFIG_DEBUG_UART=y
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CONFIG_FIT=y
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# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_SPL_MAX_SIZE=0x30000
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CONFIG_SPL_BSS_START_ADDR=0x80140000
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CONFIG_SPL_BSS_MAX_SIZE=0x80000
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_SPL_NAND_BASE=y
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CONFIG_SPL_NAND_IDENT=y
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# CONFIG_BOOTM_NETBSD is not set
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# CONFIG_BOOTM_PLAN9 is not set
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# CONFIG_BOOTM_RTEMS is not set
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# CONFIG_BOOTM_VXWORKS is not set
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CONFIG_SYS_BOOTM_LEN=0x2000000
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# CONFIG_CMD_ELF is not set
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# CONFIG_CMD_XIMG is not set
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# CONFIG_CMD_CRC32 is not set
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# CONFIG_CMD_DM is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_GPIO=y
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_MTD=y
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CONFIG_CMD_PART=y
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# CONFIG_CMD_PINMUX is not set
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CONFIG_CMD_USB=y
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_ISO_PARTITION is not set
55+
CONFIG_EFI_PARTITION=y
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_PARTITION_TYPE_GUID=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
59+
CONFIG_NET_RANDOM_ETHADDR=y
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# CONFIG_I2C is not set
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# CONFIG_INPUT is not set
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CONFIG_MMC=y
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# CONFIG_MMC_QUIRKS is not set
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# CONFIG_MMC_HW_PARTITIONING is not set
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CONFIG_MMC_MTK=y
66+
CONFIG_MTD=y
67+
CONFIG_DM_MTD=y
68+
CONFIG_MTD_RAW_NAND=y
69+
CONFIG_NAND_MT7621=y
70+
CONFIG_SYS_NAND_ONFI_DETECTION=y
71+
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
72+
CONFIG_SYS_NAND_U_BOOT_OFFS=0x0
73+
CONFIG_MEDIATEK_ETH=y
74+
CONFIG_PHY=y
75+
CONFIG_PHY_MTK_TPHY=y
76+
CONFIG_DEBUG_UART_SHIFT=2
77+
CONFIG_SYSRESET=y
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CONFIG_SYSRESET_RESETCTL=y
79+
CONFIG_USB=y
80+
CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_MTK=y
82+
CONFIG_USB_STORAGE=y
83+
CONFIG_WDT=y
84+
CONFIG_WDT_MT7621=y
85+
CONFIG_FAT_WRITE=y
86+
# CONFIG_BINMAN_FDT is not set
87+
CONFIG_LZMA=y
88+
# CONFIG_GZIP is not set
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CONFIG_SPL_LZMA=y

‎configs/mt7621_rfb_defconfig

+86
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@@ -0,0 +1,86 @@
1+
CONFIG_MIPS=y
2+
CONFIG_SYS_MALLOC_LEN=0x100000
3+
CONFIG_SPL_LIBCOMMON_SUPPORT=y
4+
CONFIG_SPL_LIBGENERIC_SUPPORT=y
5+
CONFIG_NR_DRAM_BANKS=1
6+
CONFIG_ENV_SIZE=0x1000
7+
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-rfb"
8+
CONFIG_SPL_SERIAL=y
9+
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
10+
CONFIG_SPL=y
11+
CONFIG_DEBUG_UART_BASE=0xbe000c00
12+
CONFIG_DEBUG_UART_CLOCK=50000000
13+
CONFIG_SYS_LOAD_ADDR=0x83000000
14+
CONFIG_ARCH_MTMIPS=y
15+
CONFIG_SOC_MT7621=y
16+
# CONFIG_MIPS_CACHE_SETUP is not set
17+
# CONFIG_MIPS_CACHE_DISABLE is not set
18+
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
19+
CONFIG_MIPS_BOOT_FDT=y
20+
CONFIG_DEBUG_UART=y
21+
CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000
22+
CONFIG_FIT=y
23+
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
24+
CONFIG_SYS_CONSOLE_INFO_QUIET=y
25+
CONFIG_SPL_MAX_SIZE=0x30000
26+
CONFIG_SPL_BSS_START_ADDR=0x80140000
27+
CONFIG_SPL_BSS_MAX_SIZE=0x80000
28+
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
29+
CONFIG_SPL_NOR_SUPPORT=y
30+
CONFIG_TPL=y
31+
# CONFIG_TPL_FRAMEWORK is not set
32+
# CONFIG_BOOTM_NETBSD is not set
33+
# CONFIG_BOOTM_PLAN9 is not set
34+
# CONFIG_BOOTM_RTEMS is not set
35+
# CONFIG_BOOTM_VXWORKS is not set
36+
CONFIG_SYS_BOOTM_LEN=0x2000000
37+
# CONFIG_CMD_ELF is not set
38+
# CONFIG_CMD_XIMG is not set
39+
# CONFIG_CMD_CRC32 is not set
40+
# CONFIG_CMD_DM is not set
41+
CONFIG_CMD_GPIO=y
42+
# CONFIG_CMD_LOADS is not set
43+
CONFIG_CMD_MMC=y
44+
CONFIG_CMD_PART=y
45+
# CONFIG_CMD_PINMUX is not set
46+
CONFIG_CMD_SPI=y
47+
# CONFIG_CMD_NFS is not set
48+
CONFIG_DOS_PARTITION=y
49+
# CONFIG_SPL_DOS_PARTITION is not set
50+
# CONFIG_ISO_PARTITION is not set
51+
CONFIG_EFI_PARTITION=y
52+
# CONFIG_SPL_EFI_PARTITION is not set
53+
CONFIG_PARTITION_TYPE_GUID=y
54+
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
55+
CONFIG_NET_RANDOM_ETHADDR=y
56+
# CONFIG_I2C is not set
57+
# CONFIG_INPUT is not set
58+
CONFIG_MMC=y
59+
# CONFIG_MMC_QUIRKS is not set
60+
# CONFIG_MMC_HW_PARTITIONING is not set
61+
CONFIG_MMC_MTK=y
62+
CONFIG_SF_DEFAULT_SPEED=20000000
63+
CONFIG_SPI_FLASH_BAR=y
64+
CONFIG_SPI_FLASH_EON=y
65+
CONFIG_SPI_FLASH_GIGADEVICE=y
66+
CONFIG_SPI_FLASH_ISSI=y
67+
CONFIG_SPI_FLASH_MACRONIX=y
68+
CONFIG_SPI_FLASH_SPANSION=y
69+
CONFIG_SPI_FLASH_STMICRO=y
70+
CONFIG_SPI_FLASH_WINBOND=y
71+
CONFIG_SPI_FLASH_XMC=y
72+
CONFIG_SPI_FLASH_XTX=y
73+
CONFIG_MEDIATEK_ETH=y
74+
CONFIG_PHY=y
75+
CONFIG_PHY_MTK_TPHY=y
76+
CONFIG_DEBUG_UART_SHIFT=2
77+
CONFIG_SPI=y
78+
CONFIG_MT7621_SPI=y
79+
CONFIG_SYSRESET=y
80+
CONFIG_SYSRESET_RESETCTL=y
81+
CONFIG_WDT=y
82+
CONFIG_WDT_MT7621=y
83+
# CONFIG_BINMAN_FDT is not set
84+
CONFIG_LZMA=y
85+
# CONFIG_GZIP is not set
86+
CONFIG_SPL_LZMA=y

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