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trinitrini
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Merge tag 'u-boot-stm32-20220712' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Alignment with Linux kernel device tree v5.19 for stm32mp15 and stm32mp13 - Add OP-TEE nodes for stm32mp13x, alligned with upstreamed OP-TEE - Introduce of_to_plat ops in stm32_sdmmc2 driver - Activate more features in stm32mp13 defconfig and support of STM32MP13x Rev.Y - Drop fastboot and stm32prog trigger gpios on STM32MP15x DHCOM board
2 parents 36b661d + 48d9eaf commit 357fa8b

34 files changed

+1206
-140
lines changed

‎arch/arm/dts/Makefile

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1174,13 +1174,17 @@ dtb-$(CONFIG_STM32MP13x) += \
11741174

11751175
dtb-$(CONFIG_STM32MP15x) += \
11761176
stm32mp157a-dk1.dtb \
1177+
stm32mp157a-dk1-scmi.dtb \
11771178
stm32mp157a-icore-stm32mp1-ctouch2.dtb \
11781179
stm32mp157a-icore-stm32mp1-edimm2.2.dtb \
11791180
stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \
11801181
stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dtb \
11811182
stm32mp157c-dk2.dtb \
1183+
stm32mp157c-dk2-scmi.dtb \
11821184
stm32mp157c-ed1.dtb \
1185+
stm32mp157c-ed1-scmi.dtb \
11831186
stm32mp157c-ev1.dtb \
1187+
stm32mp157c-ev1-scmi.dtb \
11841188
stm32mp157c-odyssey.dtb \
11851189
stm32mp15xx-dhcom-drc02.dtb \
11861190
stm32mp15xx-dhcom-pdk2.dtb \

‎arch/arm/dts/stm32mp13-u-boot.dtsi

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -82,10 +82,34 @@
8282
u-boot,dm-pre-reloc;
8383
};
8484

85+
&optee {
86+
u-boot,dm-pre-reloc;
87+
};
88+
8589
&pinctrl {
8690
u-boot,dm-pre-reloc;
8791
};
8892

93+
&scmi {
94+
u-boot,dm-pre-reloc;
95+
};
96+
97+
&scmi_clk {
98+
u-boot,dm-pre-reloc;
99+
};
100+
101+
&scmi_reset {
102+
u-boot,dm-pre-reloc;
103+
};
104+
105+
&scmi_shm {
106+
u-boot,dm-pre-reloc;
107+
};
108+
109+
&scmi_sram {
110+
u-boot,dm-pre-reloc;
111+
};
112+
89113
&syscfg {
90114
u-boot,dm-pre-reloc;
91115
};

‎arch/arm/dts/stm32mp131.dtsi

Lines changed: 56 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,44 @@
2727
interrupt-parent = <&intc>;
2828
};
2929

30+
scmi_sram: sram@2ffff000 {
31+
compatible = "mmio-sram";
32+
reg = <0x2ffff000 0x1000>;
33+
#address-cells = <1>;
34+
#size-cells = <1>;
35+
ranges = <0 0x2ffff000 0x1000>;
36+
37+
scmi_shm: scmi_shm@0 {
38+
compatible = "arm,scmi-shmem";
39+
reg = <0 0x80>;
40+
};
41+
};
42+
43+
firmware {
44+
optee: optee {
45+
method = "smc";
46+
compatible = "linaro,optee-tz";
47+
};
48+
49+
scmi: scmi {
50+
compatible = "linaro,scmi-optee";
51+
#address-cells = <1>;
52+
#size-cells = <0>;
53+
linaro,optee-channel-id = <0>;
54+
shmem = <&scmi_shm>;
55+
56+
scmi_clk: protocol@14 {
57+
reg = <0x14>;
58+
#clock-cells = <1>;
59+
};
60+
61+
scmi_reset: protocol@16 {
62+
reg = <0x16>;
63+
#reset-cells = <1>;
64+
};
65+
};
66+
};
67+
3068
clocks {
3169
clk_axi: clk-axi {
3270
#clock-cells = <0>;
@@ -75,6 +113,12 @@
75113
compatible = "fixed-clock";
76114
clock-frequency = <99000000>;
77115
};
116+
117+
clk_rtc_k: clk-rtc-k {
118+
#clock-cells = <0>;
119+
compatible = "fixed-clock";
120+
clock-frequency = <32768>;
121+
};
78122
};
79123

80124
intc: interrupt-controller@a0021000 {
@@ -218,6 +262,15 @@
218262
status = "disabled";
219263
};
220264

265+
rtc: rtc@5c004000 {
266+
compatible = "st,stm32mp1-rtc";
267+
reg = <0x5c004000 0x400>;
268+
interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
269+
clocks = <&clk_pclk4>, <&clk_rtc_k>;
270+
clock-names = "pclk", "rtc_ck";
271+
status = "disabled";
272+
};
273+
221274
bsec: efuse@5c005000 {
222275
compatible = "st,stm32mp13-bsec";
223276
reg = <0x5c005000 0x400>;
@@ -239,11 +292,13 @@
239292
* Break node order to solve dependency probe issue between
240293
* pinctrl and exti.
241294
*/
242-
pinctrl: pin-controller@50002000 {
295+
pinctrl: pinctrl@50002000 {
243296
#address-cells = <1>;
244297
#size-cells = <1>;
245298
compatible = "st,stm32mp135-pinctrl";
246299
ranges = <0 0x50002000 0x8400>;
300+
interrupt-parent = <&exti>;
301+
st,syscfg = <&exti 0x60 0xff>;
247302
pins-are-numbered;
248303

249304
gpioa: gpio@50002000 {

‎arch/arm/dts/stm32mp135f-dk-u-boot.dtsi

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,18 @@
1111
};
1212

1313
config {
14+
u-boot,boot-led = "led-blue";
15+
u-boot,error-led = "led-red";
1416
u-boot,mmc-env-partition = "u-boot-env";
1517
};
18+
19+
leds {
20+
led-red {
21+
color = <LED_COLOR_ID_RED>;
22+
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
23+
default-state = "off";
24+
};
25+
};
1626
};
1727

1828
&uart4 {

‎arch/arm/dts/stm32mp135f-dk.dts

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,9 @@
66

77
/dts-v1/;
88

9+
#include <dt-bindings/gpio/gpio.h>
10+
#include <dt-bindings/input/input.h>
11+
#include <dt-bindings/leds/common.h>
912
#include "stm32mp135.dtsi"
1013
#include "stm32mp13xf.dtsi"
1114
#include "stm32mp13-pinctrl.dtsi"
@@ -23,6 +26,39 @@
2326
reg = <0xc0000000 0x20000000>;
2427
};
2528

29+
reserved-memory {
30+
#address-cells = <1>;
31+
#size-cells = <1>;
32+
ranges;
33+
34+
optee@de000000 {
35+
reg = <0xde000000 0x2000000>;
36+
no-map;
37+
};
38+
};
39+
40+
gpio-keys {
41+
compatible = "gpio-keys";
42+
43+
user-pa13 {
44+
label = "User-PA13";
45+
linux,code = <BTN_1>;
46+
gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
47+
};
48+
};
49+
50+
leds {
51+
compatible = "gpio-leds";
52+
53+
led-blue {
54+
function = LED_FUNCTION_HEARTBEAT;
55+
color = <LED_COLOR_ID_BLUE>;
56+
gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
57+
linux,default-trigger = "heartbeat";
58+
default-state = "off";
59+
};
60+
};
61+
2662
vdd_sd: vdd-sd {
2763
compatible = "regulator-fixed";
2864
regulator-name = "vdd_sd";
@@ -37,6 +73,10 @@
3773
status = "okay";
3874
};
3975

76+
&rtc {
77+
status = "okay";
78+
};
79+
4080
&sdmmc1 {
4181
pinctrl-names = "default", "opendrain", "sleep";
4282
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;

‎arch/arm/dts/stm32mp15-pinctrl.dtsi

Lines changed: 64 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -379,6 +379,40 @@
379379
};
380380
};
381381

382+
ethernet0_rmii_pins_c: rmii-2 {
383+
pins1 {
384+
pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
385+
<STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
386+
<STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
387+
<STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
388+
<STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
389+
<STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
390+
bias-disable;
391+
drive-push-pull;
392+
slew-rate = <2>;
393+
};
394+
pins2 {
395+
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
396+
<STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
397+
<STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
398+
bias-disable;
399+
};
400+
};
401+
402+
ethernet0_rmii_sleep_pins_c: rmii-sleep-2 {
403+
pins1 {
404+
pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
405+
<STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
406+
<STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
407+
<STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
408+
<STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
409+
<STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
410+
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
411+
<STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
412+
<STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
413+
};
414+
};
415+
382416
fmc_pins_a: fmc-0 {
383417
pins1 {
384418
pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
@@ -889,6 +923,21 @@
889923
};
890924
};
891925

926+
mco2_pins_a: mco2-0 {
927+
pins {
928+
pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
929+
bias-disable;
930+
drive-push-pull;
931+
slew-rate = <2>;
932+
};
933+
};
934+
935+
mco2_sleep_pins_a: mco2-sleep-0 {
936+
pins {
937+
pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
938+
};
939+
};
940+
892941
m_can1_pins_a: m-can1-0 {
893942
pins1 {
894943
pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
@@ -2331,4 +2380,19 @@
23312380
bias-disable;
23322381
};
23332382
};
2383+
2384+
spi1_pins_b: spi1-1 {
2385+
pins1 {
2386+
pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
2387+
<STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
2388+
bias-disable;
2389+
drive-push-pull;
2390+
slew-rate = <1>;
2391+
};
2392+
2393+
pins2 {
2394+
pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
2395+
bias-disable;
2396+
};
2397+
};
23342398
};

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