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- Sync DMA and CPSW DT bindings for K3 devices - Other minor fixes for mmc and other TI devices
2 parents 959a481 + 865fdfd commit 3f126c7

26 files changed

+929
-690
lines changed

arch/arm/dts/k3-am65-mcu.dtsi

+128
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,20 @@
66
*/
77

88
&cbass_mcu {
9+
mcu_conf: scm_conf@40f00000 {
10+
compatible = "syscon", "simple-mfd";
11+
reg = <0x0 0x40f00000 0x0 0x20000>;
12+
#address-cells = <1>;
13+
#size-cells = <1>;
14+
ranges = <0x0 0x0 0x40f00000 0x20000>;
15+
16+
phy_gmii_sel: phy@4040 {
17+
compatible = "ti,am654-phy-gmii-sel";
18+
reg = <0x4040 0x4>;
19+
#phy-cells = <1>;
20+
};
21+
};
22+
923
mcu_uart0: serial@40a00000 {
1024
compatible = "ti,am654-uart";
1125
reg = <0x00 0x40a00000 0x00 0x100>;
@@ -102,4 +116,118 @@
102116
#size-cells = <0>;
103117
};
104118
};
119+
120+
mcu_navss {
121+
compatible = "simple-mfd";
122+
#address-cells = <2>;
123+
#size-cells = <2>;
124+
ranges;
125+
dma-coherent;
126+
dma-ranges;
127+
128+
ti,sci-dev-id = <119>;
129+
130+
mcu_ringacc: ringacc@2b800000 {
131+
compatible = "ti,am654-navss-ringacc";
132+
reg = <0x0 0x2b800000 0x0 0x400000>,
133+
<0x0 0x2b000000 0x0 0x400000>,
134+
<0x0 0x28590000 0x0 0x100>,
135+
<0x0 0x2a500000 0x0 0x40000>;
136+
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
137+
ti,num-rings = <286>;
138+
ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
139+
ti,dma-ring-reset-quirk;
140+
ti,sci = <&dmsc>;
141+
ti,sci-dev-id = <195>;
142+
};
143+
144+
mcu_udmap: dma-controller@285c0000 {
145+
compatible = "ti,am654-navss-mcu-udmap";
146+
reg = <0x0 0x285c0000 0x0 0x100>,
147+
<0x0 0x2a800000 0x0 0x40000>,
148+
<0x0 0x2aa00000 0x0 0x40000>;
149+
reg-names = "gcfg", "rchanrt", "tchanrt";
150+
#dma-cells = <1>;
151+
152+
ti,sci = <&dmsc>;
153+
ti,sci-dev-id = <194>;
154+
ti,ringacc = <&mcu_ringacc>;
155+
156+
ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
157+
<0x2>; /* TX_CHAN */
158+
ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
159+
<0x4>; /* RX_CHAN */
160+
ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
161+
};
162+
};
163+
164+
mcu_cpsw: ethernet@46000000 {
165+
compatible = "ti,am654-cpsw-nuss";
166+
#address-cells = <2>;
167+
#size-cells = <2>;
168+
reg = <0x0 0x46000000 0x0 0x200000>;
169+
reg-names = "cpsw_nuss";
170+
ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
171+
dma-coherent;
172+
clocks = <&k3_clks 5 10>;
173+
clock-names = "fck";
174+
power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
175+
176+
dmas = <&mcu_udmap 0xf000>,
177+
<&mcu_udmap 0xf001>,
178+
<&mcu_udmap 0xf002>,
179+
<&mcu_udmap 0xf003>,
180+
<&mcu_udmap 0xf004>,
181+
<&mcu_udmap 0xf005>,
182+
<&mcu_udmap 0xf006>,
183+
<&mcu_udmap 0xf007>,
184+
<&mcu_udmap 0x7000>;
185+
dma-names = "tx0", "tx1", "tx2", "tx3",
186+
"tx4", "tx5", "tx6", "tx7",
187+
"rx";
188+
189+
ethernet-ports {
190+
#address-cells = <1>;
191+
#size-cells = <0>;
192+
193+
cpsw_port1: port@1 {
194+
reg = <1>;
195+
ti,mac-only;
196+
label = "port1";
197+
ti,syscon-efuse = <&mcu_conf 0x200>;
198+
phys = <&phy_gmii_sel 1>;
199+
};
200+
};
201+
202+
davinci_mdio: mdio@f00 {
203+
compatible = "ti,cpsw-mdio","ti,davinci_mdio";
204+
reg = <0x0 0xf00 0x0 0x100>;
205+
#address-cells = <1>;
206+
#size-cells = <0>;
207+
clocks = <&k3_clks 5 10>;
208+
clock-names = "fck";
209+
bus_freq = <1000000>;
210+
};
211+
212+
cpts@3d000 {
213+
compatible = "ti,am65-cpts";
214+
reg = <0x0 0x3d000 0x0 0x400>;
215+
clocks = <&mcu_cpsw_cpts_mux>;
216+
clock-names = "cpts";
217+
interrupts-extended = <&gic500 GIC_SPI 570 IRQ_TYPE_LEVEL_HIGH>;
218+
interrupt-names = "cpts";
219+
ti,cpts-ext-ts-inputs = <4>;
220+
ti,cpts-periodic-outputs = <2>;
221+
222+
mcu_cpsw_cpts_mux: refclk-mux {
223+
#clock-cells = <0>;
224+
clocks = <&k3_clks 118 5>, <&k3_clks 118 11>,
225+
<&k3_clks 118 6>, <&k3_clks 118 3>,
226+
<&k3_clks 118 8>, <&k3_clks 118 14>,
227+
<&k3_clks 120 3>, <&k3_clks 121 3>;
228+
assigned-clocks = <&mcu_cpsw_cpts_mux>;
229+
assigned-clock-parents = <&k3_clks 118 5>;
230+
};
231+
};
232+
};
105233
};

arch/arm/dts/k3-am654-base-board-u-boot.dtsi

+4-151
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,6 @@
44
*/
55

66
#include <dt-bindings/pinctrl/k3.h>
7-
#include <dt-bindings/dma/k3-udma.h>
87
#include <dt-bindings/net/ti-dp83867.h>
98

109
/ {
@@ -47,164 +46,17 @@
4746
&cbass_mcu {
4847
u-boot,dm-spl;
4948

50-
navss_mcu: navss-mcu {
51-
compatible = "simple-bus";
52-
#address-cells = <2>;
53-
#size-cells = <2>;
54-
ranges;
49+
mcu_navss {
5550
u-boot,dm-spl;
5651

57-
ti,sci-dev-id = <119>;
58-
59-
mcu_ringacc: ringacc@2b800000 {
60-
compatible = "ti,am654-navss-ringacc";
61-
reg = <0x0 0x2b800000 0x0 0x400000>,
62-
<0x0 0x2b000000 0x0 0x400000>,
63-
<0x0 0x28590000 0x0 0x100>,
64-
<0x0 0x2a500000 0x0 0x40000>;
65-
reg-names = "rt", "fifos",
66-
"proxy_gcfg", "proxy_target";
67-
ti,num-rings = <286>;
68-
ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
69-
ti,dma-ring-reset-quirk;
70-
ti,sci = <&dmsc>;
71-
ti,sci-dev-id = <195>;
52+
ringacc@2b800000 {
7253
u-boot,dm-spl;
7354
};
7455

75-
mcu_udmap: udmap@285c0000 {
76-
compatible = "ti,k3-navss-udmap";
77-
reg = <0x0 0x285c0000 0x0 0x100>,
78-
<0x0 0x2a800000 0x0 0x40000>,
79-
<0x0 0x2aa00000 0x0 0x40000>;
80-
reg-names = "gcfg", "rchanrt", "tchanrt";
81-
#dma-cells = <3>;
82-
83-
ti,ringacc = <&mcu_ringacc>;
84-
ti,psil-base = <0x6000>;
85-
86-
ti,sci = <&dmsc>;
87-
ti,sci-dev-id = <194>;
88-
89-
ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
90-
<0x2>; /* TX_CHAN */
91-
ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
92-
<0x4>; /* RX_CHAN */
93-
ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
94-
dma-coherent;
56+
dma-controller@285c0000 {
9557
u-boot,dm-spl;
9658
};
9759
};
98-
99-
mcu_conf: scm_conf@40f00000 {
100-
compatible = "syscon";
101-
reg = <0x0 0x40f00000 0x0 0x20000>;
102-
};
103-
104-
mcu_cpsw: cpsw_nuss@046000000 {
105-
compatible = "ti,am654-cpsw-nuss";
106-
#address-cells = <2>;
107-
#size-cells = <2>;
108-
reg = <0x0 0x46000000 0x0 0x200000>;
109-
reg-names = "cpsw_nuss";
110-
ranges;
111-
dma-coherent;
112-
clocks = <&k3_clks 5 10>;
113-
clock-names = "fck";
114-
power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
115-
ti,psil-base = <0x7000>;
116-
117-
dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>,
118-
<&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>,
119-
<&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>,
120-
<&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>,
121-
<&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>,
122-
<&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>,
123-
<&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>,
124-
<&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>,
125-
<&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>;
126-
dma-names = "tx0", "tx1", "tx2", "tx3",
127-
"tx4", "tx5", "tx6", "tx7",
128-
"rx";
129-
130-
ports {
131-
#address-cells = <1>;
132-
#size-cells = <0>;
133-
host: host@0 {
134-
reg = <0>;
135-
ti,label = "host";
136-
};
137-
138-
cpsw_port1: port@1 {
139-
reg = <1>;
140-
ti,mac-only;
141-
ti,label = "port1";
142-
ti,syscon-efuse = <&mcu_conf 0x200>;
143-
};
144-
};
145-
146-
davinci_mdio: mdio {
147-
#address-cells = <1>;
148-
#size-cells = <0>;
149-
bus_freq = <1000000>;
150-
};
151-
152-
ti,psil-config0 {
153-
linux,udma-mode = <UDMA_PKT_MODE>;
154-
statictr-type = <PSIL_STATIC_TR_NONE>;
155-
ti,needs-epib;
156-
ti,psd-size = <16>;
157-
};
158-
159-
ti,psil-config1 {
160-
linux,udma-mode = <UDMA_PKT_MODE>;
161-
statictr-type = <PSIL_STATIC_TR_NONE>;
162-
ti,needs-epib;
163-
ti,psd-size = <16>;
164-
};
165-
166-
ti,psil-config2 {
167-
linux,udma-mode = <UDMA_PKT_MODE>;
168-
statictr-type = <PSIL_STATIC_TR_NONE>;
169-
ti,needs-epib;
170-
ti,psd-size = <16>;
171-
};
172-
173-
ti,psil-config3 {
174-
linux,udma-mode = <UDMA_PKT_MODE>;
175-
statictr-type = <PSIL_STATIC_TR_NONE>;
176-
ti,needs-epib;
177-
ti,psd-size = <16>;
178-
};
179-
180-
ti,psil-config4 {
181-
linux,udma-mode = <UDMA_PKT_MODE>;
182-
statictr-type = <PSIL_STATIC_TR_NONE>;
183-
ti,needs-epib;
184-
ti,psd-size = <16>;
185-
};
186-
187-
ti,psil-config5 {
188-
linux,udma-mode = <UDMA_PKT_MODE>;
189-
statictr-type = <PSIL_STATIC_TR_NONE>;
190-
ti,needs-epib;
191-
ti,psd-size = <16>;
192-
};
193-
194-
ti,psil-config6 {
195-
linux,udma-mode = <UDMA_PKT_MODE>;
196-
statictr-type = <PSIL_STATIC_TR_NONE>;
197-
ti,needs-epib;
198-
ti,psd-size = <16>;
199-
};
200-
201-
ti,psil-config7 {
202-
linux,udma-mode = <UDMA_PKT_MODE>;
203-
statictr-type = <PSIL_STATIC_TR_NONE>;
204-
ti,needs-epib;
205-
ti,psd-size = <16>;
206-
};
207-
};
20860
};
20961

21062
&cbass_wakeup {
@@ -366,6 +218,7 @@
366218
reg = <0x0 0x46000000 0x0 0x200000>,
367219
<0x0 0x40f00200 0x0 0x2>;
368220
reg-names = "cpsw_nuss", "mac_efuse";
221+
/delete-property/ ranges;
369222

370223
cpsw-phy-sel@40f04040 {
371224
compatible = "ti,am654-cpsw-phy-sel";

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