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4 | 4 | */
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5 | 5 |
|
6 | 6 | #include <dt-bindings/pinctrl/k3.h>
|
7 |
| -#include <dt-bindings/dma/k3-udma.h> |
8 | 7 | #include <dt-bindings/net/ti-dp83867.h>
|
9 | 8 |
|
10 | 9 | / {
|
|
47 | 46 | &cbass_mcu {
|
48 | 47 | u-boot,dm-spl;
|
49 | 48 |
|
50 |
| - navss_mcu: navss-mcu { |
51 |
| - compatible = "simple-bus"; |
52 |
| - #address-cells = <2>; |
53 |
| - #size-cells = <2>; |
54 |
| - ranges; |
| 49 | + mcu_navss { |
55 | 50 | u-boot,dm-spl;
|
56 | 51 |
|
57 |
| - ti,sci-dev-id = <119>; |
58 |
| - |
59 |
| - mcu_ringacc: ringacc@2b800000 { |
60 |
| - compatible = "ti,am654-navss-ringacc"; |
61 |
| - reg = <0x0 0x2b800000 0x0 0x400000>, |
62 |
| - <0x0 0x2b000000 0x0 0x400000>, |
63 |
| - <0x0 0x28590000 0x0 0x100>, |
64 |
| - <0x0 0x2a500000 0x0 0x40000>; |
65 |
| - reg-names = "rt", "fifos", |
66 |
| - "proxy_gcfg", "proxy_target"; |
67 |
| - ti,num-rings = <286>; |
68 |
| - ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ |
69 |
| - ti,dma-ring-reset-quirk; |
70 |
| - ti,sci = <&dmsc>; |
71 |
| - ti,sci-dev-id = <195>; |
| 52 | + ringacc@2b800000 { |
72 | 53 | u-boot,dm-spl;
|
73 | 54 | };
|
74 | 55 |
|
75 |
| - mcu_udmap: udmap@285c0000 { |
76 |
| - compatible = "ti,k3-navss-udmap"; |
77 |
| - reg = <0x0 0x285c0000 0x0 0x100>, |
78 |
| - <0x0 0x2a800000 0x0 0x40000>, |
79 |
| - <0x0 0x2aa00000 0x0 0x40000>; |
80 |
| - reg-names = "gcfg", "rchanrt", "tchanrt"; |
81 |
| - #dma-cells = <3>; |
82 |
| - |
83 |
| - ti,ringacc = <&mcu_ringacc>; |
84 |
| - ti,psil-base = <0x6000>; |
85 |
| - |
86 |
| - ti,sci = <&dmsc>; |
87 |
| - ti,sci-dev-id = <194>; |
88 |
| - |
89 |
| - ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */ |
90 |
| - <0x2>; /* TX_CHAN */ |
91 |
| - ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */ |
92 |
| - <0x4>; /* RX_CHAN */ |
93 |
| - ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ |
94 |
| - dma-coherent; |
| 56 | + dma-controller@285c0000 { |
95 | 57 | u-boot,dm-spl;
|
96 | 58 | };
|
97 | 59 | };
|
98 |
| - |
99 |
| - mcu_conf: scm_conf@40f00000 { |
100 |
| - compatible = "syscon"; |
101 |
| - reg = <0x0 0x40f00000 0x0 0x20000>; |
102 |
| - }; |
103 |
| - |
104 |
| - mcu_cpsw: cpsw_nuss@046000000 { |
105 |
| - compatible = "ti,am654-cpsw-nuss"; |
106 |
| - #address-cells = <2>; |
107 |
| - #size-cells = <2>; |
108 |
| - reg = <0x0 0x46000000 0x0 0x200000>; |
109 |
| - reg-names = "cpsw_nuss"; |
110 |
| - ranges; |
111 |
| - dma-coherent; |
112 |
| - clocks = <&k3_clks 5 10>; |
113 |
| - clock-names = "fck"; |
114 |
| - power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>; |
115 |
| - ti,psil-base = <0x7000>; |
116 |
| - |
117 |
| - dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>, |
118 |
| - <&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>, |
119 |
| - <&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>, |
120 |
| - <&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>, |
121 |
| - <&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>, |
122 |
| - <&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>, |
123 |
| - <&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>, |
124 |
| - <&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>, |
125 |
| - <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>; |
126 |
| - dma-names = "tx0", "tx1", "tx2", "tx3", |
127 |
| - "tx4", "tx5", "tx6", "tx7", |
128 |
| - "rx"; |
129 |
| - |
130 |
| - ports { |
131 |
| - #address-cells = <1>; |
132 |
| - #size-cells = <0>; |
133 |
| - host: host@0 { |
134 |
| - reg = <0>; |
135 |
| - ti,label = "host"; |
136 |
| - }; |
137 |
| - |
138 |
| - cpsw_port1: port@1 { |
139 |
| - reg = <1>; |
140 |
| - ti,mac-only; |
141 |
| - ti,label = "port1"; |
142 |
| - ti,syscon-efuse = <&mcu_conf 0x200>; |
143 |
| - }; |
144 |
| - }; |
145 |
| - |
146 |
| - davinci_mdio: mdio { |
147 |
| - #address-cells = <1>; |
148 |
| - #size-cells = <0>; |
149 |
| - bus_freq = <1000000>; |
150 |
| - }; |
151 |
| - |
152 |
| - ti,psil-config0 { |
153 |
| - linux,udma-mode = <UDMA_PKT_MODE>; |
154 |
| - statictr-type = <PSIL_STATIC_TR_NONE>; |
155 |
| - ti,needs-epib; |
156 |
| - ti,psd-size = <16>; |
157 |
| - }; |
158 |
| - |
159 |
| - ti,psil-config1 { |
160 |
| - linux,udma-mode = <UDMA_PKT_MODE>; |
161 |
| - statictr-type = <PSIL_STATIC_TR_NONE>; |
162 |
| - ti,needs-epib; |
163 |
| - ti,psd-size = <16>; |
164 |
| - }; |
165 |
| - |
166 |
| - ti,psil-config2 { |
167 |
| - linux,udma-mode = <UDMA_PKT_MODE>; |
168 |
| - statictr-type = <PSIL_STATIC_TR_NONE>; |
169 |
| - ti,needs-epib; |
170 |
| - ti,psd-size = <16>; |
171 |
| - }; |
172 |
| - |
173 |
| - ti,psil-config3 { |
174 |
| - linux,udma-mode = <UDMA_PKT_MODE>; |
175 |
| - statictr-type = <PSIL_STATIC_TR_NONE>; |
176 |
| - ti,needs-epib; |
177 |
| - ti,psd-size = <16>; |
178 |
| - }; |
179 |
| - |
180 |
| - ti,psil-config4 { |
181 |
| - linux,udma-mode = <UDMA_PKT_MODE>; |
182 |
| - statictr-type = <PSIL_STATIC_TR_NONE>; |
183 |
| - ti,needs-epib; |
184 |
| - ti,psd-size = <16>; |
185 |
| - }; |
186 |
| - |
187 |
| - ti,psil-config5 { |
188 |
| - linux,udma-mode = <UDMA_PKT_MODE>; |
189 |
| - statictr-type = <PSIL_STATIC_TR_NONE>; |
190 |
| - ti,needs-epib; |
191 |
| - ti,psd-size = <16>; |
192 |
| - }; |
193 |
| - |
194 |
| - ti,psil-config6 { |
195 |
| - linux,udma-mode = <UDMA_PKT_MODE>; |
196 |
| - statictr-type = <PSIL_STATIC_TR_NONE>; |
197 |
| - ti,needs-epib; |
198 |
| - ti,psd-size = <16>; |
199 |
| - }; |
200 |
| - |
201 |
| - ti,psil-config7 { |
202 |
| - linux,udma-mode = <UDMA_PKT_MODE>; |
203 |
| - statictr-type = <PSIL_STATIC_TR_NONE>; |
204 |
| - ti,needs-epib; |
205 |
| - ti,psd-size = <16>; |
206 |
| - }; |
207 |
| - }; |
208 | 60 | };
|
209 | 61 |
|
210 | 62 | &cbass_wakeup {
|
|
366 | 218 | reg = <0x0 0x46000000 0x0 0x200000>,
|
367 | 219 | <0x0 0x40f00200 0x0 0x2>;
|
368 | 220 | reg-names = "cpsw_nuss", "mac_efuse";
|
| 221 | + /delete-property/ ranges; |
369 | 222 |
|
370 | 223 | cpsw-phy-sel@40f04040 {
|
371 | 224 | compatible = "ti,am654-cpsw-phy-sel";
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|
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