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trinitrini
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Merge tag 'mips-pull-2022-07-13' of https://source.denx.de/u-boot/custodians/u-boot-mips
- MIPS: add drivers and board support for Mediatek MT7621 SoC
2 parents 854d6de + dd6bf53 commit 58f3dc5

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‎MAINTAINERS

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Original file line numberDiff line numberDiff line change
@@ -1032,15 +1032,23 @@ R: GSS_MTK_Uboot_upstream <[email protected]>
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S: Maintained
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F: arch/mips/mach-mtmips/
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F: arch/mips/dts/mt7620.dtsi
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F: arch/mips/dts/mt7621.dtsi
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F: arch/mips/dts/mt7620-u-boot.dtsi
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F: arch/mips/dts/mt7621-u-boot.dtsi
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F: include/configs/mt7620.h
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F: include/configs/mt7621.h
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F: include/dt-bindings/clock/mt7620-clk.h
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F: include/dt-bindings/clock/mt7621-clk.h
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F: include/dt-bindings/clock/mt7628-clk.h
10391043
F: include/dt-bindings/reset/mt7620-reset.h
1044+
F: include/dt-bindings/reset/mt7621-reset.h
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F: include/dt-bindings/reset/mt7628-reset.h
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F: drivers/clk/mtmips/
10421047
F: drivers/pinctrl/mtmips/
10431048
F: drivers/gpio/mt7620_gpio.c
1049+
F: drivers/mtd/nand/raw/mt7621_nand.c
1050+
F: drivers/mtd/nand/raw/mt7621_nand.h
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F: drivers/mtd/nand/raw/mt7621_nand_spl.c
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F: drivers/net/mt7620-eth.c
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F: drivers/phy/mt7620-usb-phy.c
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F: drivers/reset/reset-mtmips.c

‎arch/mips/Makefile

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Original file line numberDiff line numberDiff line change
@@ -4,6 +4,11 @@ head-y := arch/mips/cpu/start.o
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ifeq ($(CONFIG_SPL_BUILD),y)
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head-$(CONFIG_ARCH_JZ47XX) := arch/mips/mach-jz47xx/start.o
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head-$(CONFIG_SOC_MT7621) := arch/mips/mach-mtmips/mt7621/spl/start.o
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endif
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ifeq ($(CONFIG_TPL_BUILD),y)
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head-$(CONFIG_SOC_MT7621) := arch/mips/mach-mtmips/mt7621/tpl/start.o
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endif
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libs-y += arch/mips/cpu/

‎arch/mips/cpu/u-boot-spl.lds

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Original file line numberDiff line numberDiff line change
@@ -13,7 +13,9 @@ SECTIONS
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. = ALIGN(4);
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.text : {
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__text_start = .;
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*(.text*)
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__text_end = .;
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} > .spl_mem
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. = ALIGN(4);
@@ -36,6 +38,7 @@ SECTIONS
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. = ALIGN(4);
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__image_copy_end = .;
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__image_copy_len = __image_copy_end - __text_start;
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_image_binary_end = .;
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‎arch/mips/dts/Makefile

+2
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@ dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
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dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
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dtb-$(CONFIG_BOARD_MT7620_RFB) += mediatek,mt7620-rfb.dtb
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dtb-$(CONFIG_BOARD_MT7620_MT7530_RFB) += mediatek,mt7620-mt7530-rfb.dtb
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dtb-$(CONFIG_BOARD_MT7621_RFB) += mediatek,mt7621-rfb.dtb
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dtb-$(CONFIG_BOARD_MT7621_NAND_RFB) += mediatek,mt7621-nand-rfb.dtb
1921
dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb
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dtb-$(CONFIG_BOARD_GARDENA_SMART_GATEWAY_MT7688) += gardena-smart-gateway-mt7688.dtb
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dtb-$(CONFIG_BOARD_LINKIT_SMART_7688) += linkit-smart-7688.dtb

‎arch/mips/dts/mediatek,mt7621-nand-rfb.dts

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,67 @@
1+
// SPDX-License-Identifier: GPL-2.0
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/*
3+
* Copyright (C) 2022 MediaTek Inc. All rights reserved.
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*
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* Author: Weijie Gao <[email protected]>
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*/
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/dts-v1/;
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#include "mt7621.dtsi"
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/ {
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compatible = "mediatek,mt7621-nand-rfb", "mediatek,mt7621-soc";
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model = "MediaTek MT7621 RFB (NAND)";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = &uart0;
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};
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};
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&pinctrl {
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state_default: pin_state {
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nand {
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groups = "spi", "sdxc";
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function = "nand";
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};
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gpios {
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groups = "i2c", "uart3", "pcie reset";
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function = "gpio";
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};
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wdt {
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groups = "wdt";
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function = "wdt rst";
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};
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jtag {
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groups = "jtag";
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function = "jtag";
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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&eth {
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status = "okay";
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};
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&ssusb {
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status = "okay";
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};
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&u3phy {
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status = "okay";
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};

‎arch/mips/dts/mediatek,mt7621-rfb.dts

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@@ -0,0 +1,82 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 MediaTek Inc. All rights reserved.
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*
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* Author: Weijie Gao <[email protected]>
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*/
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/dts-v1/;
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#include "mt7621.dtsi"
11+
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/ {
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compatible = "mediatek,mt7621-rfb", "mediatek,mt7621-soc";
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model = "MediaTek MT7621 RFB (SPI-NOR)";
15+
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aliases {
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serial0 = &uart0;
18+
spi0 = &spi;
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};
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chosen {
22+
stdout-path = &uart0;
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};
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};
25+
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&pinctrl {
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state_default: pin_state {
28+
gpios {
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groups = "i2c", "uart3", "pcie reset";
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function = "gpio";
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};
32+
33+
wdt {
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groups = "wdt";
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function = "wdt rst";
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};
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jtag {
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groups = "jtag";
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function = "jtag";
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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&spi {
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status = "okay";
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num-cs = <2>;
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <25000000>;
62+
reg = <0>;
63+
};
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};
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&eth {
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status = "okay";
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};
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&mmc {
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cap-sd-highspeed;
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status = "okay";
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};
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&ssusb {
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status = "okay";
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};
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&u3phy {
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status = "okay";
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};

‎arch/mips/dts/mt7621-u-boot.dtsi

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@@ -0,0 +1,111 @@
1+
// SPDX-License-Identifier: GPL-2.0
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/*
3+
* Copyright (C) 2022 MediaTek Inc. All rights reserved.
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*
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* Author: Weijie Gao <[email protected]>
6+
*/
7+
8+
#include <linux/stringify.h>
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/ {
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binman: binman {
12+
multiple-images;
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};
14+
};
15+
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&sysc {
17+
u-boot,dm-pre-reloc;
18+
};
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&reboot {
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u-boot,dm-pre-reloc;
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};
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&clkctrl {
25+
u-boot,dm-pre-reloc;
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};
27+
28+
&rstctrl {
29+
u-boot,dm-pre-reloc;
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};
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32+
&pinctrl {
33+
u-boot,dm-pre-reloc;
34+
};
35+
36+
&uart0 {
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u-boot,dm-pre-reloc;
38+
};
39+
40+
&uart1 {
41+
u-boot,dm-pre-reloc;
42+
};
43+
44+
&uart2 {
45+
u-boot,dm-pre-reloc;
46+
};
47+
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&binman {
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u-boot-spl-ddr {
50+
align = <4>;
51+
align-size = <4>;
52+
filename = "u-boot-spl-ddr.bin";
53+
pad-byte = <0xff>;
54+
55+
u-boot-spl {
56+
align-end = <4>;
57+
filename = "u-boot-spl.bin";
58+
};
59+
60+
stage_bin {
61+
filename = "mt7621_stage_sram.bin";
62+
type = "blob-ext";
63+
};
64+
};
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66+
spl-img {
67+
filename = "u-boot-spl-ddr.img";
68+
69+
mkimage {
70+
#ifdef CONFIG_MT7621_BOOT_FROM_NAND
71+
args = "-T", "mtk_image", "-n", "mt7621=1",
72+
"-a", __stringify(CONFIG_SPL_TEXT_BASE),
73+
"-e", __stringify(CONFIG_SPL_TEXT_BASE);
74+
#else
75+
args = "-A", "mips", "-T", "standalone", "-O", "u-boot",
76+
"-C", "none", "-n", "MT7621 U-Boot SPL",
77+
"-a", __stringify(CONFIG_SPL_TEXT_BASE),
78+
"-e", __stringify(CONFIG_SPL_TEXT_BASE);
79+
#endif
80+
81+
blob {
82+
filename = "u-boot-spl-ddr.bin";
83+
};
84+
};
85+
};
86+
87+
mt7621-uboot {
88+
filename = "u-boot-mt7621.bin";
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pad-byte = <0xff>;
90+
91+
#ifndef CONFIG_MT7621_BOOT_FROM_NAND
92+
u-boot-tpl {
93+
align-end = <4>;
94+
filename = "u-boot-tpl.bin";
95+
};
96+
#endif
97+
98+
spl {
99+
#ifdef CONFIG_MT7621_BOOT_FROM_NAND
100+
align-end = <0x1000>;
101+
#endif
102+
filename = "u-boot-spl-ddr.img";
103+
type = "blob";
104+
};
105+
106+
u-boot {
107+
filename = "u-boot-lzma.img";
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type = "blob";
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};
110+
};
111+
};

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