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This repository was archived by the owner on Oct 3, 2024. It is now read-only.

Commit aca05bf

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Merge remote-tracking branch 'origin/gvt-next' into gvt-staging
2 parents 9620296 + 65ee729 commit aca05bf

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4 files changed

+6
-6
lines changed

4 files changed

+6
-6
lines changed

drivers/gpu/drm/i915/gvt/aperture_gm.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -298,7 +298,7 @@ static int alloc_resource(struct intel_vgpu *vgpu,
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}
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/**
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* inte_gvt_free_vgpu_resource - free HW resource owned by a vGPU
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* intel_vgpu_free_resource() - free HW resource owned by a vGPU
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* @vgpu: a vGPU
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*
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* This function is used to free the HW resource owned by a vGPU.
@@ -328,7 +328,7 @@ void intel_vgpu_reset_resource(struct intel_vgpu *vgpu)
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}
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/**
331-
* intel_alloc_vgpu_resource - allocate HW resource for a vGPU
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* intel_vgpu_alloc_resource() - allocate HW resource for a vGPU
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* @vgpu: vGPU
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* @param: vGPU creation params
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*

drivers/gpu/drm/i915/gvt/gtt.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -2341,7 +2341,7 @@ static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
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gvt_vgpu_err("fail to populate guest ggtt entry\n");
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/* guest driver may read/write the entry when partial
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* update the entry in this situation p2m will fail
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* settting the shadow entry to point to a scratch page
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* setting the shadow entry to point to a scratch page
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*/
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ops->set_pfn(&m, gvt->gtt.scratch_mfn);
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} else

drivers/gpu/drm/i915/gvt/handlers.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -905,7 +905,7 @@ static int update_fdi_rx_iir_status(struct intel_vgpu *vgpu,
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else if (FDI_RX_IMR_TO_PIPE(offset) != INVALID_INDEX)
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index = FDI_RX_IMR_TO_PIPE(offset);
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else {
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gvt_vgpu_err("Unsupport registers %x\n", offset);
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gvt_vgpu_err("Unsupported registers %x\n", offset);
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return -EINVAL;
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}
911911

@@ -3052,7 +3052,7 @@ int intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
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}
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/**
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* intel_t_default_mmio_write - default MMIO write handler
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* intel_vgpu_default_mmio_write() - default MMIO write handler
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* @vgpu: a vGPU
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* @offset: access offset
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* @p_data: write data buffer

drivers/gpu/drm/i915/gvt/mmio_context.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -546,7 +546,7 @@ static void switch_mmio(struct intel_vgpu *pre,
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}
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/**
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* intel_gvt_switch_render_mmio - switch mmio context of specific engine
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* intel_gvt_switch_mmio - switch mmio context of specific engine
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* @pre: the last vGPU that own the engine
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* @next: the vGPU to switch to
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* @engine: the engine

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