Added ForceUniform compiler options for RT pipeline

_OS_DESCRIPTION

Author: LihaczewskiV

IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp

@@ -969,16 +969,17 @@ void AddLegalizationPasses(CodeGenContext& ctx, IGCPassManager& mpm, PSSignature
         mpm.add(createVectorBitCastOptPass());
     }
 
-    bool csForceUniformSurfaceSampler = ( ctx.type == ShaderType::COMPUTE_SHADER && ctx.getModuleMetaData()->csInfo.forceUniformSurfaceSampler );
-    bool csForceUniformBuffer = ( ctx.type == ShaderType::COMPUTE_SHADER && ctx.getModuleMetaData()->csInfo.forceUniformBuffer );
+    bool forceUniformSurfaceSampler = ctx.getModuleMetaData()->compOpt.ForceUniformSurfaceSampler;
+    bool forceUniformBuffer = ctx.getModuleMetaData()->compOpt.ForceUniformBuffer;
+
     if (ctx.m_instrTypes.hasUniformAssumptions ||
         IGC_IS_FLAG_ENABLED(ForceUniformSurfaceSampler) ||
-        csForceUniformSurfaceSampler ||
+        forceUniformSurfaceSampler ||
         IGC_IS_FLAG_ENABLED(ForceUniformBuffer) ||
-        csForceUniformBuffer ) {
+        forceUniformBuffer ) {
         mpm.add(new UniformAssumptions(
-                        IGC_IS_FLAG_ENABLED(ForceUniformSurfaceSampler) || csForceUniformSurfaceSampler,
-                        IGC_IS_FLAG_ENABLED(ForceUniformBuffer) || csForceUniformBuffer )
+                        IGC_IS_FLAG_ENABLED(ForceUniformSurfaceSampler) || forceUniformSurfaceSampler,
+                        IGC_IS_FLAG_ENABLED(ForceUniformBuffer) || forceUniformBuffer )
         );
     }
 

IGC/common/MDFrameWork.h

@@ -470,6 +470,8 @@ enum class ShaderTypeMD
         bool WaEnableALTModeVisaWA                      = false;
         bool EnableLdStCombineforLoad                   = false;
         bool EnableLdStCombinewithDummyLoad             = false;
+        bool ForceUniformBuffer                         = false;
+        bool ForceUniformSurfaceSampler                 = false;
         bool EnableIndependentSharedMemoryFenceFunctionality = false;
         bool NewSpillCostFunction                       = false;
         bool EnableVRT                                  = false;
@@ -516,8 +518,6 @@ enum class ShaderTypeMD
         bool disableSplitOnSpill = false;
         bool enableNewSpillCostFunction = false;
         bool forceVISAPreSched = false;
-        bool forceUniformBuffer = false;
-        bool forceUniformSurfaceSampler = false;
         // disables dispatch along y and tiled order optimizations
         bool disableLocalIdOrderOptimizations = false;
         // force disables dispatch along y optimization