stm32mp153c-lxa-tac-gen3.dts pinmux

[marckleinebudde]

Where does the pinmux of GPIO G 10 happen?

meta-lxatac/meta-lxatac-bsp/recipes-kernel/linux/files/patches/0102-ARM-dts-stm32-lxa-tac-Add-support-for-generation-3-d.patch

Lines 294 to 305 in 8ac553f

	+&spi2 {
	+ adc@0 {
	+ compatible = "ti,lmp92064";
	+ reg = <0>;
	+
	+ reset-gpios = <&gpiog 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	+ shunt-resistor-micro-ohms = <15000>;
	+ spi-max-frequency = <5000000>;
	+ vdd-supply = <&reg_pb_3v3>;
	+ vdig-supply = <&reg_pb_3v3>;
	+ };
	+};

@a3f says this is OK.

Do we want to have a gpio-line-names property for GPIO G?

@hnez

[hnez]

Sorry for the late reply, I've not used Discussions before and the notification got buried between other mails.
I've refined my mail filters now to prevent that from happening again.

---

We have discussed the topics out-of-band in the meantime. But I will summarize here for the record.

Where does the pinmux of GPIO G 10 happen?

The pinmuxing for -gpios = <…> entries has thus far just worked for me on STM32MP1, as in: the pin is automatically muxed as GPIO output with the correct open drain etc. config.
I don't know if this is the right way to do it though or if we should indeed have pinmux config for these pins as well.

Do we want to have a gpio-line-names property for GPIO G?

We already have one in the common .dtsi file, but we likely want to move it into the different .dtses because generation 3 TACs now have the previously mentioned power board ADC reset pin on PG10, while the previous two generations did not.