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| 1 | +; RUN: opt < %s -mtriple=riscv64 -mattr=+v -p loop-vectorize -pass-remarks-analysis=loop-vectorize -S 2>&1 | FileCheck %s |
| 2 | + |
| 3 | +; CHECK: remark: <unknown>:0:0: the cost-model indicates that interleaving is not beneficial |
| 4 | +define float @s311(float %a_0, float %s311_sum) { |
| 5 | +; CHECK-LABEL: define float @s311( |
| 6 | +; CHECK-SAME: float [[A_0:%.*]], float [[S311_SUM:%.*]]) #[[ATTR0:[0-9]+]] { |
| 7 | +; CHECK-NEXT: [[ENTRY:.*]]: |
| 8 | +; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32() |
| 9 | +; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[TMP0]], 4 |
| 10 | +; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 1200, [[TMP1]] |
| 11 | +; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| 12 | +; CHECK: [[VECTOR_PH]]: |
| 13 | +; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vscale.i32() |
| 14 | +; CHECK-NEXT: [[TMP3:%.*]] = mul i32 [[TMP2]], 4 |
| 15 | +; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 1200, [[TMP3]] |
| 16 | +; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 1200, [[N_MOD_VF]] |
| 17 | +; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vscale.i32() |
| 18 | +; CHECK-NEXT: [[TMP5:%.*]] = mul i32 [[TMP4]], 4 |
| 19 | +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x float> poison, float [[A_0]], i64 0 |
| 20 | +; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x float> [[BROADCAST_SPLATINSERT]], <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer |
| 21 | +; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| 22 | +; CHECK: [[VECTOR_BODY]]: |
| 23 | +; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| 24 | +; CHECK-NEXT: [[VEC_PHI:%.*]] = phi float [ [[S311_SUM]], %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ] |
| 25 | +; CHECK-NEXT: [[TMP6]] = call float @llvm.vector.reduce.fadd.nxv4f32(float [[VEC_PHI]], <vscale x 4 x float> [[BROADCAST_SPLAT]]) |
| 26 | +; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], [[TMP5]] |
| 27 | +; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] |
| 28 | +; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| 29 | +; CHECK: [[MIDDLE_BLOCK]]: |
| 30 | +; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 1200, [[N_VEC]] |
| 31 | +; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| 32 | +; CHECK: [[SCALAR_PH]]: |
| 33 | +; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| 34 | +; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP6]], %[[MIDDLE_BLOCK]] ], [ [[S311_SUM]], %[[ENTRY]] ] |
| 35 | +; CHECK-NEXT: br label %[[LOOP:.*]] |
| 36 | +; CHECK: [[LOOP]]: |
| 37 | +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ] |
| 38 | +; CHECK-NEXT: [[RED:%.*]] = phi float [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[RED_NEXT:%.*]], %[[LOOP]] ] |
| 39 | +; CHECK-NEXT: [[RED_NEXT]] = fadd float [[A_0]], [[RED]] |
| 40 | +; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1 |
| 41 | +; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[IV_NEXT]], 1200 |
| 42 | +; CHECK-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]] |
| 43 | +; CHECK: [[EXIT]]: |
| 44 | +; CHECK-NEXT: [[RED_LCSSA:%.*]] = phi float [ [[RED_NEXT]], %[[LOOP]] ], [ [[TMP6]], %[[MIDDLE_BLOCK]] ] |
| 45 | +; CHECK-NEXT: ret float [[RED_LCSSA]] |
| 46 | +; |
| 47 | +entry: |
| 48 | + br label %loop |
| 49 | + |
| 50 | +loop: |
| 51 | + %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] |
| 52 | + %red = phi float [ %s311_sum, %entry ], [ %red.next, %loop ] |
| 53 | + %red.next = fadd float %a_0, %red |
| 54 | + %iv.next = add nuw nsw i32 %iv, 1 |
| 55 | + %exitcond = icmp eq i32 %iv.next, 1200 |
| 56 | + br i1 %exitcond, label %exit, label %loop |
| 57 | + |
| 58 | +exit: |
| 59 | + %red.lcssa = phi float [ %red.next, %loop ] |
| 60 | + ret float %red.lcssa |
| 61 | +} |
| 62 | +;. |
| 63 | +; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} |
| 64 | +; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} |
| 65 | +; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} |
| 66 | +; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} |
| 67 | +;. |
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